arch/arm64/boot/dts/amlogic/meson-g12a.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Copyright (c) 2018 Amlogic, Inc. All rights reserved.
   4  */
   5
   6 #include "meson-g12.dtsi"
   7
   8 / {
   9         compatible = "amlogic,g12a";
  10
  11         cpus {
  12                 #address-cells = <0x2>;
  13                 #size-cells = <0x0>;
  14
  15                 cpu0: cpu@0 {
  16                         device_type = "cpu";
  17                         compatible = "arm,cortex-a53";
  18                         reg = <0x0 0x0>;
  19                         enable-method = "psci";
  20                         next-level-cache = <&l2>;
  21                         #cooling-cells = <2>;
  22                 };
  23
  24                 cpu1: cpu@1 {
  25                         device_type = "cpu";
  26                         compatible = "arm,cortex-a53";
  27                         reg = <0x0 0x1>;
  28                         enable-method = "psci";
  29                         next-level-cache = <&l2>;
  30                         #cooling-cells = <2>;
  31                 };
  32
  33                 cpu2: cpu@2 {
  34                         device_type = "cpu";
  35                         compatible = "arm,cortex-a53";
  36                         reg = <0x0 0x2>;
  37                         enable-method = "psci";
  38                         next-level-cache = <&l2>;
  39                         #cooling-cells = <2>;
  40                 };
  41
  42                 cpu3: cpu@3 {
  43                         device_type = "cpu";
  44                         compatible = "arm,cortex-a53";
  45                         reg = <0x0 0x3>;
  46                         enable-method = "psci";
  47                         next-level-cache = <&l2>;
  48                         #cooling-cells = <2>;
  49                 };
  50
  51                 l2: l2-cache0 {
  52                         compatible = "cache";
  53                         cache-level = <2>;
  54                         cache-unified;
  55                 };
  56         };
  57
  58         cpu_opp_table: opp-table {
  59                 compatible = "operating-points-v2";
  60                 opp-shared;
  61
  62                 opp-1000000000 {
  63                         opp-hz = /bits/ 64 <1000000000>;
  64                         opp-microvolt = <731000>;
  65                 };
  66
  67                 opp-1200000000 {
  68                         opp-hz = /bits/ 64 <1200000000>;
  69                         opp-microvolt = <731000>;
  70                 };
  71
  72                 opp-1398000000 {
  73                         opp-hz = /bits/ 64 <1398000000>;
  74                         opp-microvolt = <761000>;
  75                 };
  76
  77                 opp-1512000000 {
  78                         opp-hz = /bits/ 64 <1512000000>;
  79                         opp-microvolt = <791000>;
  80                 };
  81
  82                 opp-1608000000 {
  83                         opp-hz = /bits/ 64 <1608000000>;
  84                         opp-microvolt = <831000>;
  85                 };
  86
  87                 opp-1704000000 {
  88                         opp-hz = /bits/ 64 <1704000000>;
  89                         opp-microvolt = <861000>;
  90                 };
  91
  92                 opp-1800000000 {
  93                         opp-hz = /bits/ 64 <1800000000>;
  94                         opp-microvolt = <981000>;
  95                 };
  96         };
  97 };
  98
  99 &cpu_thermal {
 100         cooling-maps {
 101                 map0 {
 102                         trip = <&cpu_passive>;
 103                         cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
 104                                         <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
 105                                         <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
 106                                         <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
 107                 };
 108
 109                 map1 {
 110                         trip = <&cpu_hot>;
 111                         cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
 112                                         <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
 113                                         <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
 114                                         <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
 115                 };
 116         };
 117 };
 118
 119 &pmu {
 120         compatible = "amlogic,g12a-ddr-pmu";
 121 };