1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2018 Amlogic, Inc. All rights reserved.
6 #include <dt-bindings/phy/phy.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/clock/g12a-clkc.h>
9 #include <dt-bindings/clock/g12a-aoclkc.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/interrupt-controller/amlogic,meson-g12a-gpio-intc.h>
13 #include <dt-bindings/reset/amlogic,meson-g12a-reset.h>
14 #include <dt-bindings/thermal/thermal.h>
17 interrupt-parent = <&gic>;
22 mmc0 = &sd_emmc_b; /* SD card */
23 mmc1 = &sd_emmc_c; /* eMMC */
24 mmc2 = &sd_emmc_a; /* SDIO */
32 simplefb_cvbs: framebuffer-cvbs {
33 compatible = "amlogic,simple-framebuffer",
35 amlogic,pipeline = "vpu-cvbs";
36 clocks = <&clkc CLKID_HDMI>,
37 <&clkc CLKID_HTX_PCLK>,
38 <&clkc CLKID_VPU_INTR>;
42 simplefb_hdmi: framebuffer-hdmi {
43 compatible = "amlogic,simple-framebuffer",
45 amlogic,pipeline = "vpu-hdmi";
46 clocks = <&clkc CLKID_HDMI>,
47 <&clkc CLKID_HTX_PCLK>,
48 <&clkc CLKID_VPU_INTR>;
54 compatible = "amlogic,meson-gxbb-efuse";
55 clocks = <&clkc CLKID_EFUSE>;
59 secure-monitor = <&sm>;
62 gpu_opp_table: opp-table-gpu {
63 compatible = "operating-points-v2";
66 opp-hz = /bits/ 64 <124999998>;
67 opp-microvolt = <800000>;
70 opp-hz = /bits/ 64 <249999996>;
71 opp-microvolt = <800000>;
74 opp-hz = /bits/ 64 <285714281>;
75 opp-microvolt = <800000>;
78 opp-hz = /bits/ 64 <399999994>;
79 opp-microvolt = <800000>;
82 opp-hz = /bits/ 64 <499999992>;
83 opp-microvolt = <800000>;
86 opp-hz = /bits/ 64 <666666656>;
87 opp-microvolt = <800000>;
90 opp-hz = /bits/ 64 <799999987>;
91 opp-microvolt = <800000>;
96 compatible = "arm,psci-1.0";
101 #address-cells = <2>;
105 /* 3 MiB reserved for ARM Trusted Firmware (BL31) */
106 secmon_reserved: secmon@5000000 {
107 reg = <0x0 0x05000000 0x0 0x300000>;
111 /* 32 MiB reserved for ARM Trusted Firmware (BL32) */
112 secmon_reserved_bl32: secmon@5300000 {
113 reg = <0x0 0x05300000 0x0 0x2000000>;
118 compatible = "shared-dma-pool";
120 size = <0x0 0x10000000>;
121 alignment = <0x0 0x400000>;
127 compatible = "amlogic,meson-gxbb-sm";
131 compatible = "simple-bus";
132 #address-cells = <2>;
136 pcie: pcie@fc000000 {
137 compatible = "amlogic,g12a-pcie", "snps,dw-pcie";
138 reg = <0x0 0xfc000000 0x0 0x400000>,
139 <0x0 0xff648000 0x0 0x2000>,
140 <0x0 0xfc400000 0x0 0x200000>;
141 reg-names = "elbi", "cfg", "config";
142 interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
143 #interrupt-cells = <1>;
144 interrupt-map-mask = <0 0 0 0>;
145 interrupt-map = <0 0 0 0 &gic GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
146 bus-range = <0x0 0xff>;
147 #address-cells = <3>;
150 ranges = <0x81000000 0 0 0x0 0xfc600000 0 0x00100000>,
151 <0x82000000 0 0xfc700000 0x0 0xfc700000 0 0x1900000>;
153 clocks = <&clkc CLKID_PCIE_PHY
154 &clkc CLKID_PCIE_COMB
155 &clkc CLKID_PCIE_PLL>;
156 clock-names = "general",
159 resets = <&reset RESET_PCIE_CTRL_A>,
160 <&reset RESET_PCIE_APB>;
161 reset-names = "port",
164 phys = <&usb3_pcie_phy PHY_TYPE_PCIE>;
169 ethmac: ethernet@ff3f0000 {
170 compatible = "amlogic,meson-g12a-dwmac",
173 reg = <0x0 0xff3f0000 0x0 0x10000>,
174 <0x0 0xff634540 0x0 0x8>;
175 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
176 interrupt-names = "macirq";
177 clocks = <&clkc CLKID_ETH>,
178 <&clkc CLKID_FCLK_DIV2>,
180 <&clkc CLKID_FCLK_DIV2>;
181 clock-names = "stmmaceth", "clkin0", "clkin1",
183 rx-fifo-depth = <4096>;
184 tx-fifo-depth = <2048>;
188 #address-cells = <1>;
190 compatible = "snps,dwmac-mdio";
195 compatible = "simple-bus";
196 reg = <0x0 0xff600000 0x0 0x200000>;
197 #address-cells = <2>;
199 ranges = <0x0 0x0 0x0 0xff600000 0x0 0x200000>;
202 compatible = "amlogic,meson-g12a-dw-hdmi";
203 reg = <0x0 0x0 0x0 0x10000>;
204 interrupts = <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>;
205 resets = <&reset RESET_HDMITX_CAPB3>,
206 <&reset RESET_HDMITX_PHY>,
207 <&reset RESET_HDMITX>;
208 reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy";
209 clocks = <&clkc CLKID_HDMI>,
210 <&clkc CLKID_HTX_PCLK>,
211 <&clkc CLKID_VPU_INTR>;
212 clock-names = "isfr", "iahb", "venci";
213 #address-cells = <1>;
215 #sound-dai-cells = <0>;
219 hdmi_tx_venc_port: port@0 {
222 hdmi_tx_in: endpoint {
223 remote-endpoint = <&hdmi_tx_out>;
228 hdmi_tx_tmds_port: port@1 {
233 apb_efuse: bus@30000 {
234 compatible = "simple-bus";
235 reg = <0x0 0x30000 0x0 0x2000>;
236 #address-cells = <2>;
238 ranges = <0x0 0x0 0x0 0x30000 0x0 0x2000>;
241 compatible = "amlogic,meson-rng";
242 reg = <0x0 0x218 0x0 0x4>;
243 clocks = <&clkc CLKID_RNG0>;
244 clock-names = "core";
248 acodec: audio-controller@32000 {
249 compatible = "amlogic,t9015";
250 reg = <0x0 0x32000 0x0 0x14>;
251 #sound-dai-cells = <0>;
252 sound-name-prefix = "ACODEC";
253 clocks = <&clkc CLKID_AUDIO_CODEC>;
254 clock-names = "pclk";
255 resets = <&reset RESET_AUDIO_CODEC>;
260 compatible = "simple-bus";
261 reg = <0x0 0x34400 0x0 0x400>;
262 #address-cells = <2>;
264 ranges = <0x0 0x0 0x0 0x34400 0x0 0x400>;
266 periphs_pinctrl: pinctrl@40 {
267 compatible = "amlogic,meson-g12a-periphs-pinctrl";
268 #address-cells = <2>;
273 reg = <0x0 0x40 0x0 0x4c>,
275 <0x0 0x120 0x0 0x18>,
276 <0x0 0x2c0 0x0 0x40>,
277 <0x0 0x340 0x0 0x1c>;
285 gpio-ranges = <&periphs_pinctrl 0 0 86>;
288 cec_ao_a_h_pins: cec_ao_a_h {
290 groups = "cec_ao_a_h";
291 function = "cec_ao_a_h";
296 cec_ao_b_h_pins: cec_ao_b_h {
298 groups = "cec_ao_b_h";
299 function = "cec_ao_b_h";
304 emmc_ctrl_pins: emmc-ctrl {
309 drive-strength-microamp = <4000>;
316 drive-strength-microamp = <4000>;
320 emmc_data_4b_pins: emmc-data-4b {
322 groups = "emmc_nand_d0",
328 drive-strength-microamp = <4000>;
332 emmc_data_8b_pins: emmc-data-8b {
334 groups = "emmc_nand_d0",
344 drive-strength-microamp = <4000>;
348 emmc_ds_pins: emmc-ds {
350 groups = "emmc_nand_ds";
353 drive-strength-microamp = <4000>;
357 emmc_clk_gate_pins: emmc_clk_gate {
360 function = "gpio_periphs";
362 drive-strength-microamp = <4000>;
366 hdmitx_ddc_pins: hdmitx_ddc {
368 groups = "hdmitx_sda",
372 drive-strength-microamp = <4000>;
376 hdmitx_hpd_pins: hdmitx_hpd {
378 groups = "hdmitx_hpd_in";
385 i2c0_sda_c_pins: i2c0-sda-c {
387 groups = "i2c0_sda_c";
390 drive-strength-microamp = <3000>;
395 i2c0_sck_c_pins: i2c0-sck-c {
397 groups = "i2c0_sck_c";
400 drive-strength-microamp = <3000>;
404 i2c0_sda_z0_pins: i2c0-sda-z0 {
406 groups = "i2c0_sda_z0";
409 drive-strength-microamp = <3000>;
413 i2c0_sck_z1_pins: i2c0-sck-z1 {
415 groups = "i2c0_sck_z1";
418 drive-strength-microamp = <3000>;
422 i2c0_sda_z7_pins: i2c0-sda-z7 {
424 groups = "i2c0_sda_z7";
427 drive-strength-microamp = <3000>;
431 i2c0_sda_z8_pins: i2c0-sda-z8 {
433 groups = "i2c0_sda_z8";
436 drive-strength-microamp = <3000>;
440 i2c1_sda_x_pins: i2c1-sda-x {
442 groups = "i2c1_sda_x";
445 drive-strength-microamp = <3000>;
449 i2c1_sck_x_pins: i2c1-sck-x {
451 groups = "i2c1_sck_x";
454 drive-strength-microamp = <3000>;
458 i2c1_sda_h2_pins: i2c1-sda-h2 {
460 groups = "i2c1_sda_h2";
463 drive-strength-microamp = <3000>;
467 i2c1_sck_h3_pins: i2c1-sck-h3 {
469 groups = "i2c1_sck_h3";
472 drive-strength-microamp = <3000>;
476 i2c1_sda_h6_pins: i2c1-sda-h6 {
478 groups = "i2c1_sda_h6";
481 drive-strength-microamp = <3000>;
485 i2c1_sck_h7_pins: i2c1-sck-h7 {
487 groups = "i2c1_sck_h7";
490 drive-strength-microamp = <3000>;
494 i2c2_sda_x_pins: i2c2-sda-x {
496 groups = "i2c2_sda_x";
499 drive-strength-microamp = <3000>;
503 i2c2_sck_x_pins: i2c2-sck-x {
505 groups = "i2c2_sck_x";
508 drive-strength-microamp = <3000>;
512 i2c2_sda_z_pins: i2c2-sda-z {
514 groups = "i2c2_sda_z";
517 drive-strength-microamp = <3000>;
521 i2c2_sck_z_pins: i2c2-sck-z {
523 groups = "i2c2_sck_z";
526 drive-strength-microamp = <3000>;
530 i2c3_sda_h_pins: i2c3-sda-h {
532 groups = "i2c3_sda_h";
535 drive-strength-microamp = <3000>;
539 i2c3_sck_h_pins: i2c3-sck-h {
541 groups = "i2c3_sck_h";
544 drive-strength-microamp = <3000>;
548 i2c3_sda_a_pins: i2c3-sda-a {
550 groups = "i2c3_sda_a";
553 drive-strength-microamp = <3000>;
557 i2c3_sck_a_pins: i2c3-sck-a {
559 groups = "i2c3_sck_a";
562 drive-strength-microamp = <3000>;
566 mclk0_a_pins: mclk0-a {
571 drive-strength-microamp = <3000>;
575 mclk1_a_pins: mclk1-a {
580 drive-strength-microamp = <3000>;
584 mclk1_x_pins: mclk1-x {
589 drive-strength-microamp = <3000>;
593 mclk1_z_pins: mclk1-z {
598 drive-strength-microamp = <3000>;
613 pdm_din0_a_pins: pdm-din0-a {
615 groups = "pdm_din0_a";
621 pdm_din0_c_pins: pdm-din0-c {
623 groups = "pdm_din0_c";
629 pdm_din0_x_pins: pdm-din0-x {
631 groups = "pdm_din0_x";
637 pdm_din0_z_pins: pdm-din0-z {
639 groups = "pdm_din0_z";
645 pdm_din1_a_pins: pdm-din1-a {
647 groups = "pdm_din1_a";
653 pdm_din1_c_pins: pdm-din1-c {
655 groups = "pdm_din1_c";
661 pdm_din1_x_pins: pdm-din1-x {
663 groups = "pdm_din1_x";
669 pdm_din1_z_pins: pdm-din1-z {
671 groups = "pdm_din1_z";
677 pdm_din2_a_pins: pdm-din2-a {
679 groups = "pdm_din2_a";
685 pdm_din2_c_pins: pdm-din2-c {
687 groups = "pdm_din2_c";
693 pdm_din2_x_pins: pdm-din2-x {
695 groups = "pdm_din2_x";
701 pdm_din2_z_pins: pdm-din2-z {
703 groups = "pdm_din2_z";
709 pdm_din3_a_pins: pdm-din3-a {
711 groups = "pdm_din3_a";
717 pdm_din3_c_pins: pdm-din3-c {
719 groups = "pdm_din3_c";
725 pdm_din3_x_pins: pdm-din3-x {
727 groups = "pdm_din3_x";
733 pdm_din3_z_pins: pdm-din3-z {
735 groups = "pdm_din3_z";
741 pdm_dclk_a_pins: pdm-dclk-a {
743 groups = "pdm_dclk_a";
746 drive-strength-microamp = <500>;
750 pdm_dclk_c_pins: pdm-dclk-c {
752 groups = "pdm_dclk_c";
755 drive-strength-microamp = <500>;
759 pdm_dclk_x_pins: pdm-dclk-x {
761 groups = "pdm_dclk_x";
764 drive-strength-microamp = <500>;
768 pdm_dclk_z_pins: pdm-dclk-z {
770 groups = "pdm_dclk_z";
773 drive-strength-microamp = <500>;
785 pwm_b_x7_pins: pwm-b-x7 {
793 pwm_b_x19_pins: pwm-b-x19 {
795 groups = "pwm_b_x19";
801 pwm_c_c_pins: pwm-c-c {
809 pwm_c_x5_pins: pwm-c-x5 {
817 pwm_c_x8_pins: pwm-c-x8 {
825 pwm_d_x3_pins: pwm-d-x3 {
833 pwm_d_x6_pins: pwm-d-x6 {
849 pwm_f_z_pins: pwm-f-z {
857 pwm_f_a_pins: pwm-f-a {
865 pwm_f_x_pins: pwm-f-x {
873 pwm_f_h_pins: pwm-f-h {
881 sdcard_c_pins: sdcard_c {
883 groups = "sdcard_d0_c",
890 drive-strength-microamp = <4000>;
894 groups = "sdcard_clk_c";
897 drive-strength-microamp = <4000>;
901 sdcard_clk_gate_c_pins: sdcard_clk_gate_c {
904 function = "gpio_periphs";
906 drive-strength-microamp = <4000>;
910 sdcard_z_pins: sdcard_z {
912 groups = "sdcard_d0_z",
919 drive-strength-microamp = <4000>;
923 groups = "sdcard_clk_z";
926 drive-strength-microamp = <4000>;
930 sdcard_clk_gate_z_pins: sdcard_clk_gate_z {
933 function = "gpio_periphs";
935 drive-strength-microamp = <4000>;
949 drive-strength-microamp = <4000>;
953 sdio_clk_gate_pins: sdio_clk_gate {
956 function = "gpio_periphs";
958 drive-strength-microamp = <4000>;
962 spdif_in_a10_pins: spdif-in-a10 {
964 groups = "spdif_in_a10";
965 function = "spdif_in";
970 spdif_in_a12_pins: spdif-in-a12 {
972 groups = "spdif_in_a12";
973 function = "spdif_in";
978 spdif_in_h_pins: spdif-in-h {
980 groups = "spdif_in_h";
981 function = "spdif_in";
986 spdif_out_h_pins: spdif-out-h {
988 groups = "spdif_out_h";
989 function = "spdif_out";
990 drive-strength-microamp = <500>;
995 spdif_out_a11_pins: spdif-out-a11 {
997 groups = "spdif_out_a11";
998 function = "spdif_out";
999 drive-strength-microamp = <500>;
1004 spdif_out_a13_pins: spdif-out-a13 {
1006 groups = "spdif_out_a13";
1007 function = "spdif_out";
1008 drive-strength-microamp = <500>;
1013 spicc0_x_pins: spicc0-x {
1015 groups = "spi0_mosi_x",
1019 drive-strength-microamp = <4000>;
1024 spicc0_ss0_x_pins: spicc0-ss0-x {
1026 groups = "spi0_ss0_x";
1028 drive-strength-microamp = <4000>;
1033 spicc0_c_pins: spicc0-c {
1035 groups = "spi0_mosi_c",
1040 drive-strength-microamp = <4000>;
1045 spicc1_pins: spicc1 {
1047 groups = "spi1_mosi",
1051 drive-strength-microamp = <4000>;
1055 spicc1_ss0_pins: spicc1-ss0 {
1057 groups = "spi1_ss0";
1059 drive-strength-microamp = <4000>;
1064 tdm_a_din0_pins: tdm-a-din0 {
1066 groups = "tdm_a_din0";
1073 tdm_a_din1_pins: tdm-a-din1 {
1075 groups = "tdm_a_din1";
1081 tdm_a_dout0_pins: tdm-a-dout0 {
1083 groups = "tdm_a_dout0";
1086 drive-strength-microamp = <3000>;
1090 tdm_a_dout1_pins: tdm-a-dout1 {
1092 groups = "tdm_a_dout1";
1095 drive-strength-microamp = <3000>;
1099 tdm_a_fs_pins: tdm-a-fs {
1101 groups = "tdm_a_fs";
1104 drive-strength-microamp = <3000>;
1108 tdm_a_sclk_pins: tdm-a-sclk {
1110 groups = "tdm_a_sclk";
1113 drive-strength-microamp = <3000>;
1117 tdm_a_slv_fs_pins: tdm-a-slv-fs {
1119 groups = "tdm_a_slv_fs";
1126 tdm_a_slv_sclk_pins: tdm-a-slv-sclk {
1128 groups = "tdm_a_slv_sclk";
1134 tdm_b_din0_pins: tdm-b-din0 {
1136 groups = "tdm_b_din0";
1142 tdm_b_din1_pins: tdm-b-din1 {
1144 groups = "tdm_b_din1";
1150 tdm_b_din2_pins: tdm-b-din2 {
1152 groups = "tdm_b_din2";
1158 tdm_b_din3_a_pins: tdm-b-din3-a {
1160 groups = "tdm_b_din3_a";
1166 tdm_b_din3_h_pins: tdm-b-din3-h {
1168 groups = "tdm_b_din3_h";
1174 tdm_b_dout0_pins: tdm-b-dout0 {
1176 groups = "tdm_b_dout0";
1179 drive-strength-microamp = <3000>;
1183 tdm_b_dout1_pins: tdm-b-dout1 {
1185 groups = "tdm_b_dout1";
1188 drive-strength-microamp = <3000>;
1192 tdm_b_dout2_pins: tdm-b-dout2 {
1194 groups = "tdm_b_dout2";
1197 drive-strength-microamp = <3000>;
1201 tdm_b_dout3_a_pins: tdm-b-dout3-a {
1203 groups = "tdm_b_dout3_a";
1206 drive-strength-microamp = <3000>;
1210 tdm_b_dout3_h_pins: tdm-b-dout3-h {
1212 groups = "tdm_b_dout3_h";
1215 drive-strength-microamp = <3000>;
1219 tdm_b_fs_pins: tdm-b-fs {
1221 groups = "tdm_b_fs";
1224 drive-strength-microamp = <3000>;
1228 tdm_b_sclk_pins: tdm-b-sclk {
1230 groups = "tdm_b_sclk";
1233 drive-strength-microamp = <3000>;
1237 tdm_b_slv_fs_pins: tdm-b-slv-fs {
1239 groups = "tdm_b_slv_fs";
1245 tdm_b_slv_sclk_pins: tdm-b-slv-sclk {
1247 groups = "tdm_b_slv_sclk";
1253 tdm_c_din0_a_pins: tdm-c-din0-a {
1255 groups = "tdm_c_din0_a";
1261 tdm_c_din0_z_pins: tdm-c-din0-z {
1263 groups = "tdm_c_din0_z";
1269 tdm_c_din1_a_pins: tdm-c-din1-a {
1271 groups = "tdm_c_din1_a";
1277 tdm_c_din1_z_pins: tdm-c-din1-z {
1279 groups = "tdm_c_din1_z";
1285 tdm_c_din2_a_pins: tdm-c-din2-a {
1287 groups = "tdm_c_din2_a";
1293 eth_leds_pins: eth-leds {
1295 groups = "eth_link_led",
1304 groups = "eth_mdio",
1314 drive-strength-microamp = <4000>;
1319 eth_rgmii_pins: eth-rgmii {
1321 groups = "eth_rxd2_rgmii",
1327 drive-strength-microamp = <4000>;
1332 tdm_c_din2_z_pins: tdm-c-din2-z {
1334 groups = "tdm_c_din2_z";
1340 tdm_c_din3_a_pins: tdm-c-din3-a {
1342 groups = "tdm_c_din3_a";
1348 tdm_c_din3_z_pins: tdm-c-din3-z {
1350 groups = "tdm_c_din3_z";
1356 tdm_c_dout0_a_pins: tdm-c-dout0-a {
1358 groups = "tdm_c_dout0_a";
1361 drive-strength-microamp = <3000>;
1365 tdm_c_dout0_z_pins: tdm-c-dout0-z {
1367 groups = "tdm_c_dout0_z";
1370 drive-strength-microamp = <3000>;
1374 tdm_c_dout1_a_pins: tdm-c-dout1-a {
1376 groups = "tdm_c_dout1_a";
1379 drive-strength-microamp = <3000>;
1383 tdm_c_dout1_z_pins: tdm-c-dout1-z {
1385 groups = "tdm_c_dout1_z";
1388 drive-strength-microamp = <3000>;
1392 tdm_c_dout2_a_pins: tdm-c-dout2-a {
1394 groups = "tdm_c_dout2_a";
1397 drive-strength-microamp = <3000>;
1401 tdm_c_dout2_z_pins: tdm-c-dout2-z {
1403 groups = "tdm_c_dout2_z";
1406 drive-strength-microamp = <3000>;
1410 tdm_c_dout3_a_pins: tdm-c-dout3-a {
1412 groups = "tdm_c_dout3_a";
1415 drive-strength-microamp = <3000>;
1419 tdm_c_dout3_z_pins: tdm-c-dout3-z {
1421 groups = "tdm_c_dout3_z";
1424 drive-strength-microamp = <3000>;
1428 tdm_c_fs_a_pins: tdm-c-fs-a {
1430 groups = "tdm_c_fs_a";
1433 drive-strength-microamp = <3000>;
1437 tdm_c_fs_z_pins: tdm-c-fs-z {
1439 groups = "tdm_c_fs_z";
1442 drive-strength-microamp = <3000>;
1446 tdm_c_sclk_a_pins: tdm-c-sclk-a {
1448 groups = "tdm_c_sclk_a";
1451 drive-strength-microamp = <3000>;
1455 tdm_c_sclk_z_pins: tdm-c-sclk-z {
1457 groups = "tdm_c_sclk_z";
1460 drive-strength-microamp = <3000>;
1464 tdm_c_slv_fs_a_pins: tdm-c-slv-fs-a {
1466 groups = "tdm_c_slv_fs_a";
1472 tdm_c_slv_fs_z_pins: tdm-c-slv-fs-z {
1474 groups = "tdm_c_slv_fs_z";
1480 tdm_c_slv_sclk_a_pins: tdm-c-slv-sclk-a {
1482 groups = "tdm_c_slv_sclk_a";
1488 tdm_c_slv_sclk_z_pins: tdm-c-slv-sclk-z {
1490 groups = "tdm_c_slv_sclk_z";
1496 uart_a_pins: uart-a {
1498 groups = "uart_a_tx",
1500 function = "uart_a";
1505 uart_a_cts_rts_pins: uart-a-cts-rts {
1507 groups = "uart_a_cts",
1509 function = "uart_a";
1514 uart_b_pins: uart-b {
1516 groups = "uart_b_tx",
1518 function = "uart_b";
1523 uart_c_pins: uart-c {
1525 groups = "uart_c_tx",
1527 function = "uart_c";
1532 uart_c_cts_rts_pins: uart-c-cts-rts {
1534 groups = "uart_c_cts",
1536 function = "uart_c";
1543 cpu_temp: temperature-sensor@34800 {
1544 compatible = "amlogic,g12a-cpu-thermal",
1545 "amlogic,g12a-thermal";
1546 reg = <0x0 0x34800 0x0 0x50>;
1547 interrupts = <GIC_SPI 35 IRQ_TYPE_EDGE_RISING>;
1548 clocks = <&clkc CLKID_TS>;
1549 #thermal-sensor-cells = <0>;
1550 amlogic,ao-secure = <&sec_AO>;
1553 ddr_temp: temperature-sensor@34c00 {
1554 compatible = "amlogic,g12a-ddr-thermal",
1555 "amlogic,g12a-thermal";
1556 reg = <0x0 0x34c00 0x0 0x50>;
1557 interrupts = <GIC_SPI 36 IRQ_TYPE_EDGE_RISING>;
1558 clocks = <&clkc CLKID_TS>;
1559 #thermal-sensor-cells = <0>;
1560 amlogic,ao-secure = <&sec_AO>;
1563 usb2_phy0: phy@36000 {
1564 compatible = "amlogic,g12a-usb2-phy";
1565 reg = <0x0 0x36000 0x0 0x2000>;
1567 clock-names = "xtal";
1568 resets = <&reset RESET_USB_PHY20>;
1569 reset-names = "phy";
1574 compatible = "simple-bus";
1575 #address-cells = <2>;
1577 ranges = <0x0 0x0 0x0 0x38000 0x0 0x2000>;
1579 canvas: video-lut@48 {
1580 compatible = "amlogic,canvas";
1581 reg = <0x0 0x48 0x0 0x14>;
1585 reg = <0x0 0x80 0x0 0x40>,
1586 <0x0 0xc00 0x0 0x40>;
1587 interrupts = <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>;
1591 usb2_phy1: phy@3a000 {
1592 compatible = "amlogic,g12a-usb2-phy";
1593 reg = <0x0 0x3a000 0x0 0x2000>;
1595 clock-names = "xtal";
1596 resets = <&reset RESET_USB_PHY21>;
1597 reset-names = "phy";
1602 compatible = "simple-bus";
1603 reg = <0x0 0x3c000 0x0 0x1400>;
1604 #address-cells = <2>;
1606 ranges = <0x0 0x0 0x0 0x3c000 0x0 0x1400>;
1608 hhi: system-controller@0 {
1609 compatible = "amlogic,meson-gx-hhi-sysctrl",
1610 "simple-mfd", "syscon";
1611 reg = <0 0 0 0x400>;
1613 clkc: clock-controller {
1614 compatible = "amlogic,g12a-clkc";
1617 clock-names = "xtal";
1620 pwrc: power-controller {
1621 compatible = "amlogic,meson-g12a-pwrc";
1622 #power-domain-cells = <1>;
1623 amlogic,ao-sysctrl = <&rti>;
1624 resets = <&reset RESET_VIU>,
1625 <&reset RESET_VENC>,
1626 <&reset RESET_VCBUS>,
1627 <&reset RESET_BT656>,
1628 <&reset RESET_RDMA>,
1629 <&reset RESET_VENCI>,
1630 <&reset RESET_VENCP>,
1631 <&reset RESET_VDAC>,
1632 <&reset RESET_VDI6>,
1633 <&reset RESET_VENCL>,
1634 <&reset RESET_VID_LOCK>;
1635 reset-names = "viu", "venc", "vcbus", "bt656",
1636 "rdma", "venci", "vencp", "vdac",
1637 "vdi6", "vencl", "vid_lock";
1638 clocks = <&clkc CLKID_VPU>,
1640 clock-names = "vpu", "vapb";
1642 * VPU clocking is provided by two identical clock paths
1643 * VPU_0 and VPU_1 muxed to a single clock by a glitch
1644 * free mux to safely change frequency while running.
1645 * Same for VAPB but with a final gate after the glitch free mux.
1647 assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
1648 <&clkc CLKID_VPU_0>,
1649 <&clkc CLKID_VPU>, /* Glitch free mux */
1650 <&clkc CLKID_VAPB_0_SEL>,
1651 <&clkc CLKID_VAPB_0>,
1652 <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */
1653 assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
1654 <0>, /* Do Nothing */
1655 <&clkc CLKID_VPU_0>,
1656 <&clkc CLKID_FCLK_DIV4>,
1657 <0>, /* Do Nothing */
1658 <&clkc CLKID_VAPB_0>;
1659 assigned-clock-rates = <0>, /* Do Nothing */
1661 <0>, /* Do Nothing */
1662 <0>, /* Do Nothing */
1664 <0>; /* Do Nothing */
1669 usb3_pcie_phy: phy@46000 {
1670 compatible = "amlogic,g12a-usb3-pcie-phy";
1671 reg = <0x0 0x46000 0x0 0x2000>;
1672 clocks = <&clkc CLKID_PCIE_PLL>;
1673 clock-names = "ref_clk";
1674 resets = <&reset RESET_PCIE_PHY>;
1675 reset-names = "phy";
1676 assigned-clocks = <&clkc CLKID_PCIE_PLL>;
1677 assigned-clock-rates = <100000000>;
1681 eth_phy: mdio-multiplexer@4c000 {
1682 compatible = "amlogic,g12a-mdio-mux";
1683 reg = <0x0 0x4c000 0x0 0xa4>;
1684 clocks = <&clkc CLKID_ETH_PHY>,
1686 <&clkc CLKID_MPLL_50M>;
1687 clock-names = "pclk", "clkin0", "clkin1";
1688 mdio-parent-bus = <&mdio0>;
1689 #address-cells = <1>;
1694 #address-cells = <1>;
1700 #address-cells = <1>;
1703 internal_ephy: ethernet-phy@8 {
1704 compatible = "ethernet-phy-id0180.3301",
1705 "ethernet-phy-ieee802.3-c22";
1706 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
1714 aobus: bus@ff800000 {
1715 compatible = "simple-bus";
1716 reg = <0x0 0xff800000 0x0 0x100000>;
1717 #address-cells = <2>;
1719 ranges = <0x0 0x0 0x0 0xff800000 0x0 0x100000>;
1722 compatible = "amlogic,meson-gx-ao-sysctrl",
1723 "simple-mfd", "syscon";
1724 reg = <0x0 0x0 0x0 0x100>;
1725 #address-cells = <2>;
1727 ranges = <0x0 0x0 0x0 0x0 0x0 0x100>;
1729 clkc_AO: clock-controller {
1730 compatible = "amlogic,meson-g12a-aoclkc";
1733 clocks = <&xtal>, <&clkc CLKID_CLK81>;
1734 clock-names = "xtal", "mpeg-clk";
1737 ao_pinctrl: pinctrl {
1738 compatible = "amlogic,meson-g12a-aobus-pinctrl";
1739 #address-cells = <2>;
1744 reg = <0x0 0x14 0x0 0x8>,
1746 <0x0 0x24 0x0 0x14>;
1752 gpio-ranges = <&ao_pinctrl 0 0 15>;
1755 i2c_ao_sck_pins: i2c_ao_sck_pins {
1757 groups = "i2c_ao_sck";
1758 function = "i2c_ao";
1760 drive-strength-microamp = <3000>;
1764 i2c_ao_sda_pins: i2c_ao_sda {
1766 groups = "i2c_ao_sda";
1767 function = "i2c_ao";
1769 drive-strength-microamp = <3000>;
1773 i2c_ao_sck_e_pins: i2c_ao_sck_e {
1775 groups = "i2c_ao_sck_e";
1776 function = "i2c_ao";
1778 drive-strength-microamp = <3000>;
1782 i2c_ao_sda_e_pins: i2c_ao_sda_e {
1784 groups = "i2c_ao_sda_e";
1785 function = "i2c_ao";
1787 drive-strength-microamp = <3000>;
1791 mclk0_ao_pins: mclk0-ao {
1793 groups = "mclk0_ao";
1794 function = "mclk0_ao";
1796 drive-strength-microamp = <3000>;
1800 tdm_ao_b_din0_pins: tdm-ao-b-din0 {
1802 groups = "tdm_ao_b_din0";
1803 function = "tdm_ao_b";
1808 spdif_ao_out_pins: spdif-ao-out {
1810 groups = "spdif_ao_out";
1811 function = "spdif_ao_out";
1812 drive-strength-microamp = <500>;
1817 tdm_ao_b_din1_pins: tdm-ao-b-din1 {
1819 groups = "tdm_ao_b_din1";
1820 function = "tdm_ao_b";
1825 tdm_ao_b_din2_pins: tdm-ao-b-din2 {
1827 groups = "tdm_ao_b_din2";
1828 function = "tdm_ao_b";
1833 tdm_ao_b_dout0_pins: tdm-ao-b-dout0 {
1835 groups = "tdm_ao_b_dout0";
1836 function = "tdm_ao_b";
1838 drive-strength-microamp = <3000>;
1842 tdm_ao_b_dout1_pins: tdm-ao-b-dout1 {
1844 groups = "tdm_ao_b_dout1";
1845 function = "tdm_ao_b";
1847 drive-strength-microamp = <3000>;
1851 tdm_ao_b_dout2_pins: tdm-ao-b-dout2 {
1853 groups = "tdm_ao_b_dout2";
1854 function = "tdm_ao_b";
1856 drive-strength-microamp = <3000>;
1860 tdm_ao_b_fs_pins: tdm-ao-b-fs {
1862 groups = "tdm_ao_b_fs";
1863 function = "tdm_ao_b";
1865 drive-strength-microamp = <3000>;
1869 tdm_ao_b_sclk_pins: tdm-ao-b-sclk {
1871 groups = "tdm_ao_b_sclk";
1872 function = "tdm_ao_b";
1874 drive-strength-microamp = <3000>;
1878 tdm_ao_b_slv_fs_pins: tdm-ao-b-slv-fs {
1880 groups = "tdm_ao_b_slv_fs";
1881 function = "tdm_ao_b";
1886 tdm_ao_b_slv_sclk_pins: tdm-ao-b-slv-sclk {
1888 groups = "tdm_ao_b_slv_sclk";
1889 function = "tdm_ao_b";
1894 uart_ao_a_pins: uart-a-ao {
1896 groups = "uart_ao_a_tx",
1898 function = "uart_ao_a";
1903 uart_ao_a_cts_rts_pins: uart-ao-a-cts-rts {
1905 groups = "uart_ao_a_cts",
1907 function = "uart_ao_a";
1912 uart_ao_b_2_3_pins: uart-ao-b-2-3 {
1914 groups = "uart_ao_b_tx_2",
1916 function = "uart_ao_b";
1921 uart_ao_b_8_9_pins: uart-ao-b-8-9 {
1923 groups = "uart_ao_b_tx_8",
1925 function = "uart_ao_b";
1930 uart_ao_b_cts_rts_pins: uart-ao-b-cts-rts {
1932 groups = "uart_ao_b_cts",
1934 function = "uart_ao_b";
1939 pwm_a_e_pins: pwm-a-e {
1942 function = "pwm_a_e";
1947 pwm_ao_a_pins: pwm-ao-a {
1949 groups = "pwm_ao_a";
1950 function = "pwm_ao_a";
1955 pwm_ao_b_pins: pwm-ao-b {
1957 groups = "pwm_ao_b";
1958 function = "pwm_ao_b";
1963 pwm_ao_c_4_pins: pwm-ao-c-4 {
1965 groups = "pwm_ao_c_4";
1966 function = "pwm_ao_c";
1971 pwm_ao_c_6_pins: pwm-ao-c-6 {
1973 groups = "pwm_ao_c_6";
1974 function = "pwm_ao_c";
1979 pwm_ao_d_5_pins: pwm-ao-d-5 {
1981 groups = "pwm_ao_d_5";
1982 function = "pwm_ao_d";
1987 pwm_ao_d_10_pins: pwm-ao-d-10 {
1989 groups = "pwm_ao_d_10";
1990 function = "pwm_ao_d";
1995 pwm_ao_d_e_pins: pwm-ao-d-e {
1997 groups = "pwm_ao_d_e";
1998 function = "pwm_ao_d";
2002 remote_input_ao_pins: remote-input-ao {
2004 groups = "remote_ao_input";
2005 function = "remote_ao_input";
2013 compatible = "amlogic,meson-vrtc";
2014 reg = <0x0 0x000a8 0x0 0x4>;
2018 compatible = "amlogic,meson-gx-ao-cec";
2019 reg = <0x0 0x00100 0x0 0x14>;
2020 interrupts = <GIC_SPI 199 IRQ_TYPE_EDGE_RISING>;
2021 clocks = <&clkc_AO CLKID_AO_CEC>;
2022 clock-names = "core";
2023 status = "disabled";
2026 sec_AO: ao-secure@140 {
2027 compatible = "amlogic,meson-gx-ao-secure", "syscon";
2028 reg = <0x0 0x140 0x0 0x140>;
2029 amlogic,has-chip-id;
2033 compatible = "amlogic,meson-g12a-ao-cec";
2034 reg = <0x0 0x00280 0x0 0x1c>;
2035 interrupts = <GIC_SPI 203 IRQ_TYPE_EDGE_RISING>;
2036 clocks = <&clkc_AO CLKID_AO_CTS_OSCIN>;
2037 clock-names = "oscin";
2038 status = "disabled";
2041 pwm_AO_cd: pwm@2000 {
2042 compatible = "amlogic,meson-g12a-ao-pwm-cd";
2043 reg = <0x0 0x2000 0x0 0x20>;
2045 status = "disabled";
2048 uart_AO: serial@3000 {
2049 compatible = "amlogic,meson-g12a-uart",
2050 "amlogic,meson-gx-uart",
2051 "amlogic,meson-ao-uart";
2052 reg = <0x0 0x3000 0x0 0x18>;
2053 interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
2054 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART>, <&xtal>;
2055 clock-names = "xtal", "pclk", "baud";
2056 status = "disabled";
2059 uart_AO_B: serial@4000 {
2060 compatible = "amlogic,meson-g12a-uart",
2061 "amlogic,meson-gx-uart",
2062 "amlogic,meson-ao-uart";
2063 reg = <0x0 0x4000 0x0 0x18>;
2064 interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
2065 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>;
2066 clock-names = "xtal", "pclk", "baud";
2067 status = "disabled";
2071 compatible = "amlogic,meson-axg-i2c";
2072 status = "disabled";
2073 reg = <0x0 0x05000 0x0 0x20>;
2074 interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
2075 #address-cells = <1>;
2077 clocks = <&clkc CLKID_I2C>;
2080 pwm_AO_ab: pwm@7000 {
2081 compatible = "amlogic,meson-g12a-ao-pwm-ab";
2082 reg = <0x0 0x7000 0x0 0x20>;
2084 status = "disabled";
2088 compatible = "amlogic,meson-gxbb-ir";
2089 reg = <0x0 0x8000 0x0 0x20>;
2090 interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
2091 status = "disabled";
2095 compatible = "amlogic,meson-g12a-saradc",
2096 "amlogic,meson-saradc";
2097 reg = <0x0 0x9000 0x0 0x48>;
2098 #io-channel-cells = <1>;
2099 interrupts = <GIC_SPI 200 IRQ_TYPE_EDGE_RISING>;
2101 <&clkc_AO CLKID_AO_SAR_ADC>,
2102 <&clkc_AO CLKID_AO_SAR_ADC_CLK>,
2103 <&clkc_AO CLKID_AO_SAR_ADC_SEL>;
2104 clock-names = "clkin", "core", "adc_clk", "adc_sel";
2105 status = "disabled";
2109 vdec: video-decoder@ff620000 {
2110 compatible = "amlogic,g12a-vdec";
2111 reg = <0x0 0xff620000 0x0 0x10000>,
2112 <0x0 0xffd0e180 0x0 0xe4>;
2113 reg-names = "dos", "esparser";
2114 interrupts = <GIC_SPI 44 IRQ_TYPE_EDGE_RISING>,
2115 <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>;
2116 interrupt-names = "vdec", "esparser";
2118 amlogic,ao-sysctrl = <&rti>;
2119 amlogic,canvas = <&canvas>;
2121 clocks = <&clkc CLKID_PARSER>,
2123 <&clkc CLKID_VDEC_1>,
2124 <&clkc CLKID_VDEC_HEVC>,
2125 <&clkc CLKID_VDEC_HEVCF>;
2126 clock-names = "dos_parser", "dos", "vdec_1",
2127 "vdec_hevc", "vdec_hevcf";
2128 resets = <&reset RESET_PARSER>;
2129 reset-names = "esparser";
2133 compatible = "amlogic,meson-g12a-vpu";
2134 reg = <0x0 0xff900000 0x0 0x100000>,
2135 <0x0 0xff63c000 0x0 0x1000>;
2136 reg-names = "vpu", "hhi";
2137 interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
2138 #address-cells = <1>;
2140 amlogic,canvas = <&canvas>;
2142 /* CVBS VDAC output port */
2143 cvbs_vdac_port: port@0 {
2147 /* HDMI-TX output port */
2148 hdmi_tx_port: port@1 {
2151 hdmi_tx_out: endpoint {
2152 remote-endpoint = <&hdmi_tx_in>;
2157 gic: interrupt-controller@ffc01000 {
2158 compatible = "arm,gic-400";
2159 reg = <0x0 0xffc01000 0 0x1000>,
2160 <0x0 0xffc02000 0 0x2000>,
2161 <0x0 0xffc04000 0 0x2000>,
2162 <0x0 0xffc06000 0 0x2000>;
2163 interrupt-controller;
2164 interrupts = <GIC_PPI 9
2165 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
2166 #interrupt-cells = <3>;
2167 #address-cells = <0>;
2170 cbus: bus@ffd00000 {
2171 compatible = "simple-bus";
2172 reg = <0x0 0xffd00000 0x0 0x100000>;
2173 #address-cells = <2>;
2175 ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x100000>;
2177 reset: reset-controller@1004 {
2178 compatible = "amlogic,meson-axg-reset";
2179 reg = <0x0 0x1004 0x0 0x9c>;
2183 gpio_intc: interrupt-controller@f080 {
2184 compatible = "amlogic,meson-g12a-gpio-intc",
2185 "amlogic,meson-gpio-intc";
2186 reg = <0x0 0xf080 0x0 0x10>;
2187 interrupt-controller;
2188 #interrupt-cells = <2>;
2189 amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
2192 watchdog: watchdog@f0d0 {
2193 compatible = "amlogic,meson-gxbb-wdt";
2194 reg = <0x0 0xf0d0 0x0 0x10>;
2199 compatible = "amlogic,meson-g12a-spicc";
2200 reg = <0x0 0x13000 0x0 0x44>;
2201 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
2202 clocks = <&clkc CLKID_SPICC0>,
2203 <&clkc CLKID_SPICC0_SCLK>;
2204 clock-names = "core", "pclk";
2205 #address-cells = <1>;
2207 status = "disabled";
2211 compatible = "amlogic,meson-g12a-spicc";
2212 reg = <0x0 0x15000 0x0 0x44>;
2213 interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
2214 clocks = <&clkc CLKID_SPICC1>,
2215 <&clkc CLKID_SPICC1_SCLK>;
2216 clock-names = "core", "pclk";
2217 #address-cells = <1>;
2219 status = "disabled";
2223 compatible = "amlogic,meson-gxbb-spifc";
2224 status = "disabled";
2225 reg = <0x0 0x14000 0x0 0x80>;
2226 #address-cells = <1>;
2228 clocks = <&clkc CLKID_CLK81>;
2232 compatible = "amlogic,meson-g12a-ee-pwm";
2233 reg = <0x0 0x19000 0x0 0x20>;
2235 status = "disabled";
2239 compatible = "amlogic,meson-g12a-ee-pwm";
2240 reg = <0x0 0x1a000 0x0 0x20>;
2242 status = "disabled";
2246 compatible = "amlogic,meson-g12a-ee-pwm";
2247 reg = <0x0 0x1b000 0x0 0x20>;
2249 status = "disabled";
2253 compatible = "amlogic,meson-axg-i2c";
2254 status = "disabled";
2255 reg = <0x0 0x1c000 0x0 0x20>;
2256 interrupts = <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>;
2257 #address-cells = <1>;
2259 clocks = <&clkc CLKID_I2C>;
2263 compatible = "amlogic,meson-axg-i2c";
2264 status = "disabled";
2265 reg = <0x0 0x1d000 0x0 0x20>;
2266 interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
2267 #address-cells = <1>;
2269 clocks = <&clkc CLKID_I2C>;
2273 compatible = "amlogic,meson-axg-i2c";
2274 status = "disabled";
2275 reg = <0x0 0x1e000 0x0 0x20>;
2276 interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;
2277 #address-cells = <1>;
2279 clocks = <&clkc CLKID_I2C>;
2283 compatible = "amlogic,meson-axg-i2c";
2284 status = "disabled";
2285 reg = <0x0 0x1f000 0x0 0x20>;
2286 interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
2287 #address-cells = <1>;
2289 clocks = <&clkc CLKID_I2C>;
2292 clk_msr: clock-measure@18000 {
2293 compatible = "amlogic,meson-g12a-clk-measure";
2294 reg = <0x0 0x18000 0x0 0x10>;
2297 uart_C: serial@22000 {
2298 compatible = "amlogic,meson-g12a-uart",
2299 "amlogic,meson-gx-uart";
2300 reg = <0x0 0x22000 0x0 0x18>;
2301 interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
2302 clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>;
2303 clock-names = "xtal", "pclk", "baud";
2304 status = "disabled";
2307 uart_B: serial@23000 {
2308 compatible = "amlogic,meson-g12a-uart",
2309 "amlogic,meson-gx-uart";
2310 reg = <0x0 0x23000 0x0 0x18>;
2311 interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
2312 clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
2313 clock-names = "xtal", "pclk", "baud";
2314 status = "disabled";
2317 uart_A: serial@24000 {
2318 compatible = "amlogic,meson-g12a-uart",
2319 "amlogic,meson-gx-uart";
2320 reg = <0x0 0x24000 0x0 0x18>;
2321 interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
2322 clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
2323 clock-names = "xtal", "pclk", "baud";
2324 status = "disabled";
2329 sd_emmc_a: mmc@ffe03000 {
2330 compatible = "amlogic,meson-axg-mmc";
2331 reg = <0x0 0xffe03000 0x0 0x800>;
2332 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
2333 status = "disabled";
2334 clocks = <&clkc CLKID_SD_EMMC_A>,
2335 <&clkc CLKID_SD_EMMC_A_CLK0>,
2336 <&clkc CLKID_FCLK_DIV2>;
2337 clock-names = "core", "clkin0", "clkin1";
2338 resets = <&reset RESET_SD_EMMC_A>;
2341 sd_emmc_b: mmc@ffe05000 {
2342 compatible = "amlogic,meson-axg-mmc";
2343 reg = <0x0 0xffe05000 0x0 0x800>;
2344 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
2345 status = "disabled";
2346 clocks = <&clkc CLKID_SD_EMMC_B>,
2347 <&clkc CLKID_SD_EMMC_B_CLK0>,
2348 <&clkc CLKID_FCLK_DIV2>;
2349 clock-names = "core", "clkin0", "clkin1";
2350 resets = <&reset RESET_SD_EMMC_B>;
2353 sd_emmc_c: mmc@ffe07000 {
2354 compatible = "amlogic,meson-axg-mmc";
2355 reg = <0x0 0xffe07000 0x0 0x800>;
2356 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
2357 status = "disabled";
2358 clocks = <&clkc CLKID_SD_EMMC_C>,
2359 <&clkc CLKID_SD_EMMC_C_CLK0>,
2360 <&clkc CLKID_FCLK_DIV2>;
2361 clock-names = "core", "clkin0", "clkin1";
2362 resets = <&reset RESET_SD_EMMC_C>;
2366 status = "disabled";
2367 compatible = "amlogic,meson-g12a-usb-ctrl";
2368 reg = <0x0 0xffe09000 0x0 0xa0>;
2369 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
2370 #address-cells = <2>;
2374 clocks = <&clkc CLKID_USB>;
2375 resets = <&reset RESET_USB>;
2379 phys = <&usb2_phy0>, <&usb2_phy1>,
2380 <&usb3_pcie_phy PHY_TYPE_USB3>;
2381 phy-names = "usb2-phy0", "usb2-phy1", "usb3-phy0";
2383 dwc2: usb@ff400000 {
2384 compatible = "amlogic,meson-g12a-usb", "snps,dwc2";
2385 reg = <0x0 0xff400000 0x0 0x40000>;
2386 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
2387 clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
2388 clock-names = "otg";
2389 phys = <&usb2_phy1>;
2390 phy-names = "usb2-phy";
2391 dr_mode = "peripheral";
2392 g-rx-fifo-size = <192>;
2393 g-np-tx-fifo-size = <128>;
2394 g-tx-fifo-size = <128 128 16 16 16>;
2397 dwc3: usb@ff500000 {
2398 compatible = "snps,dwc3";
2399 reg = <0x0 0xff500000 0x0 0x100000>;
2400 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
2402 snps,dis_u2_susphy_quirk;
2403 snps,quirk-frame-length-adjustment = <0x20>;
2404 snps,parkmode-disable-ss-quirk;
2408 mali: gpu@ffe40000 {
2409 compatible = "amlogic,meson-g12a-mali", "arm,mali-bifrost";
2410 reg = <0x0 0xffe40000 0x0 0x40000>;
2411 interrupt-parent = <&gic>;
2412 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
2413 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
2414 <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>;
2415 interrupt-names = "job", "mmu", "gpu";
2416 clocks = <&clkc CLKID_MALI>;
2417 resets = <&reset RESET_DVALIN_CAPB3>, <&reset RESET_DVALIN>;
2418 operating-points-v2 = <&gpu_opp_table>;
2419 #cooling-cells = <2>;
2424 cpu_thermal: cpu-thermal {
2425 polling-delay = <1000>;
2426 polling-delay-passive = <100>;
2427 thermal-sensors = <&cpu_temp>;
2430 cpu_passive: cpu-passive {
2431 temperature = <85000>; /* millicelsius */
2432 hysteresis = <2000>; /* millicelsius */
2437 temperature = <95000>; /* millicelsius */
2438 hysteresis = <2000>; /* millicelsius */
2442 cpu_critical: cpu-critical {
2443 temperature = <110000>; /* millicelsius */
2444 hysteresis = <2000>; /* millicelsius */
2450 ddr_thermal: ddr-thermal {
2451 polling-delay = <1000>;
2452 polling-delay-passive = <100>;
2453 thermal-sensors = <&ddr_temp>;
2456 ddr_passive: ddr-passive {
2457 temperature = <85000>; /* millicelsius */
2458 hysteresis = <2000>; /* millicelsius */
2462 ddr_critical: ddr-critical {
2463 temperature = <110000>; /* millicelsius */
2464 hysteresis = <2000>; /* millicelsius */
2471 trip = <&ddr_passive>;
2472 cooling-device = <&mali THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
2479 compatible = "arm,armv8-timer";
2480 interrupts = <GIC_PPI 13
2481 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
2483 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
2485 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
2487 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
2488 arm,no-tick-in-suspend;
2492 compatible = "fixed-clock";
2493 clock-frequency = <24000000>;
2494 clock-output-names = "xtal";
2499 compatible = "vivante,gc";
2500 reg = <0x0 0xff100000 0x0 0x20000>;
2501 interrupts = <0 147 4>;
2502 clocks = <&clkc CLKID_NNA_CORE_CLK>,
2503 <&clkc CLKID_NNA_AXI_CLK>;
2504 clock-names = "core", "bus";
2505 resets = <&reset RESET_NNA>;
2506 status = "disabled";