1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2018 Amlogic, Inc. All rights reserved.
6 #include <dt-bindings/phy/phy.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/clock/axg-audio-clkc.h>
9 #include <dt-bindings/clock/g12a-clkc.h>
10 #include <dt-bindings/clock/g12a-aoclkc.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
14 #include <dt-bindings/reset/amlogic,meson-g12a-audio-reset.h>
15 #include <dt-bindings/reset/amlogic,meson-g12a-reset.h>
18 interrupt-parent = <&gic>;
22 tdmif_a: audio-controller-0 {
23 compatible = "amlogic,axg-tdm-iface";
24 #sound-dai-cells = <0>;
25 sound-name-prefix = "TDM_A";
26 clocks = <&clkc_audio AUD_CLKID_MST_A_MCLK>,
27 <&clkc_audio AUD_CLKID_MST_A_SCLK>,
28 <&clkc_audio AUD_CLKID_MST_A_LRCLK>;
29 clock-names = "mclk", "sclk", "lrclk";
33 tdmif_b: audio-controller-1 {
34 compatible = "amlogic,axg-tdm-iface";
35 #sound-dai-cells = <0>;
36 sound-name-prefix = "TDM_B";
37 clocks = <&clkc_audio AUD_CLKID_MST_B_MCLK>,
38 <&clkc_audio AUD_CLKID_MST_B_SCLK>,
39 <&clkc_audio AUD_CLKID_MST_B_LRCLK>;
40 clock-names = "mclk", "sclk", "lrclk";
44 tdmif_c: audio-controller-2 {
45 compatible = "amlogic,axg-tdm-iface";
46 #sound-dai-cells = <0>;
47 sound-name-prefix = "TDM_C";
48 clocks = <&clkc_audio AUD_CLKID_MST_C_MCLK>,
49 <&clkc_audio AUD_CLKID_MST_C_SCLK>,
50 <&clkc_audio AUD_CLKID_MST_C_LRCLK>;
51 clock-names = "mclk", "sclk", "lrclk";
56 compatible = "amlogic,meson-gxbb-efuse";
57 clocks = <&clkc CLKID_EFUSE>;
64 compatible = "arm,psci-1.0";
73 /* 3 MiB reserved for ARM Trusted Firmware (BL31) */
74 secmon_reserved: secmon@5000000 {
75 reg = <0x0 0x05000000 0x0 0x300000>;
79 /* 32 MiB reserved for ARM Trusted Firmware (BL32) */
80 secmon_reserved_bl32: secmon@5300000 {
81 reg = <0x0 0x05300000 0x0 0x2000000>;
86 compatible = "shared-dma-pool";
88 size = <0x0 0x10000000>;
89 alignment = <0x0 0x400000>;
95 compatible = "amlogic,meson-gxbb-sm";
99 compatible = "simple-bus";
100 #address-cells = <2>;
104 ethmac: ethernet@ff3f0000 {
105 compatible = "amlogic,meson-axg-dwmac",
108 reg = <0x0 0xff3f0000 0x0 0x10000>,
109 <0x0 0xff634540 0x0 0x8>;
110 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
111 interrupt-names = "macirq";
112 clocks = <&clkc CLKID_ETH>,
113 <&clkc CLKID_FCLK_DIV2>,
115 clock-names = "stmmaceth", "clkin0", "clkin1";
116 rx-fifo-depth = <4096>;
117 tx-fifo-depth = <2048>;
121 #address-cells = <1>;
123 compatible = "snps,dwmac-mdio";
128 compatible = "simple-bus";
129 reg = <0x0 0xff600000 0x0 0x200000>;
130 #address-cells = <2>;
132 ranges = <0x0 0x0 0x0 0xff600000 0x0 0x200000>;
135 compatible = "amlogic,meson-g12a-dw-hdmi";
136 reg = <0x0 0x0 0x0 0x10000>;
137 interrupts = <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>;
138 resets = <&reset RESET_HDMITX_CAPB3>,
139 <&reset RESET_HDMITX_PHY>,
140 <&reset RESET_HDMITX>;
141 reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy";
142 clocks = <&clkc CLKID_HDMI>,
143 <&clkc CLKID_HTX_PCLK>,
144 <&clkc CLKID_VPU_INTR>;
145 clock-names = "isfr", "iahb", "venci";
146 #address-cells = <1>;
148 #sound-dai-cells = <0>;
152 hdmi_tx_venc_port: port@0 {
155 hdmi_tx_in: endpoint {
156 remote-endpoint = <&hdmi_tx_out>;
161 hdmi_tx_tmds_port: port@1 {
166 apb_efuse: bus@30000 {
167 compatible = "simple-bus";
168 reg = <0x0 0x30000 0x0 0x2000>;
169 #address-cells = <2>;
171 ranges = <0x0 0x0 0x0 0x30000 0x0 0x2000>;
174 compatible = "amlogic,meson-rng";
175 reg = <0x0 0x218 0x0 0x4>;
176 clocks = <&clkc CLKID_RNG0>;
177 clock-names = "core";
182 compatible = "simple-bus";
183 reg = <0x0 0x34400 0x0 0x400>;
184 #address-cells = <2>;
186 ranges = <0x0 0x0 0x0 0x34400 0x0 0x400>;
188 periphs_pinctrl: pinctrl@40 {
189 compatible = "amlogic,meson-g12a-periphs-pinctrl";
190 #address-cells = <2>;
195 reg = <0x0 0x40 0x0 0x4c>,
197 <0x0 0x120 0x0 0x18>,
198 <0x0 0x2c0 0x0 0x40>,
199 <0x0 0x340 0x0 0x1c>;
207 gpio-ranges = <&periphs_pinctrl 0 0 86>;
210 cec_ao_a_h_pins: cec_ao_a_h {
212 groups = "cec_ao_a_h";
213 function = "cec_ao_a_h";
218 cec_ao_b_h_pins: cec_ao_b_h {
220 groups = "cec_ao_b_h";
221 function = "cec_ao_b_h";
228 groups = "emmc_nand_d0",
239 drive-strength-microamp = <4000>;
246 drive-strength-microamp = <4000>;
250 emmc_ds_pins: emmc-ds {
252 groups = "emmc_nand_ds";
255 drive-strength-microamp = <4000>;
259 emmc_clk_gate_pins: emmc_clk_gate {
262 function = "gpio_periphs";
264 drive-strength-microamp = <4000>;
268 hdmitx_ddc_pins: hdmitx_ddc {
270 groups = "hdmitx_sda",
274 drive-strength-microamp = <4000>;
278 hdmitx_hpd_pins: hdmitx_hpd {
280 groups = "hdmitx_hpd_in";
287 i2c0_sda_c_pins: i2c0-sda-c {
289 groups = "i2c0_sda_c";
292 drive-strength-microamp = <3000>;
297 i2c0_sck_c_pins: i2c0-sck-c {
299 groups = "i2c0_sck_c";
302 drive-strength-microamp = <3000>;
306 i2c0_sda_z0_pins: i2c0-sda-z0 {
308 groups = "i2c0_sda_z0";
311 drive-strength-microamp = <3000>;
315 i2c0_sck_z1_pins: i2c0-sck-z1 {
317 groups = "i2c0_sck_z1";
320 drive-strength-microamp = <3000>;
324 i2c0_sda_z7_pins: i2c0-sda-z7 {
326 groups = "i2c0_sda_z7";
329 drive-strength-microamp = <3000>;
333 i2c0_sda_z8_pins: i2c0-sda-z8 {
335 groups = "i2c0_sda_z8";
338 drive-strength-microamp = <3000>;
342 i2c1_sda_x_pins: i2c1-sda-x {
344 groups = "i2c1_sda_x";
347 drive-strength-microamp = <3000>;
351 i2c1_sck_x_pins: i2c1-sck-x {
353 groups = "i2c1_sck_x";
356 drive-strength-microamp = <3000>;
360 i2c1_sda_h2_pins: i2c1-sda-h2 {
362 groups = "i2c1_sda_h2";
365 drive-strength-microamp = <3000>;
369 i2c1_sck_h3_pins: i2c1-sck-h3 {
371 groups = "i2c1_sck_h3";
374 drive-strength-microamp = <3000>;
378 i2c1_sda_h6_pins: i2c1-sda-h6 {
380 groups = "i2c1_sda_h6";
383 drive-strength-microamp = <3000>;
387 i2c1_sck_h7_pins: i2c1-sck-h7 {
389 groups = "i2c1_sck_h7";
392 drive-strength-microamp = <3000>;
396 i2c2_sda_x_pins: i2c2-sda-x {
398 groups = "i2c2_sda_x";
401 drive-strength-microamp = <3000>;
405 i2c2_sck_x_pins: i2c2-sck-x {
407 groups = "i2c2_sck_x";
410 drive-strength-microamp = <3000>;
414 i2c2_sda_z_pins: i2c2-sda-z {
416 groups = "i2c2_sda_z";
419 drive-strength-microamp = <3000>;
423 i2c2_sck_z_pins: i2c2-sck-z {
425 groups = "i2c2_sck_z";
428 drive-strength-microamp = <3000>;
432 i2c3_sda_h_pins: i2c3-sda-h {
434 groups = "i2c3_sda_h";
437 drive-strength-microamp = <3000>;
441 i2c3_sck_h_pins: i2c3-sck-h {
443 groups = "i2c3_sck_h";
446 drive-strength-microamp = <3000>;
450 i2c3_sda_a_pins: i2c3-sda-a {
452 groups = "i2c3_sda_a";
455 drive-strength-microamp = <3000>;
459 i2c3_sck_a_pins: i2c3-sck-a {
461 groups = "i2c3_sck_a";
464 drive-strength-microamp = <3000>;
468 mclk0_a_pins: mclk0-a {
473 drive-strength-microamp = <3000>;
477 mclk1_a_pins: mclk1-a {
482 drive-strength-microamp = <3000>;
486 mclk1_x_pins: mclk1-x {
491 drive-strength-microamp = <3000>;
495 mclk1_z_pins: mclk1-z {
500 drive-strength-microamp = <3000>;
504 pdm_din0_a_pins: pdm-din0-a {
506 groups = "pdm_din0_a";
512 pdm_din0_c_pins: pdm-din0-c {
514 groups = "pdm_din0_c";
520 pdm_din0_x_pins: pdm-din0-x {
522 groups = "pdm_din0_x";
528 pdm_din0_z_pins: pdm-din0-z {
530 groups = "pdm_din0_z";
536 pdm_din1_a_pins: pdm-din1-a {
538 groups = "pdm_din1_a";
544 pdm_din1_c_pins: pdm-din1-c {
546 groups = "pdm_din1_c";
552 pdm_din1_x_pins: pdm-din1-x {
554 groups = "pdm_din1_x";
560 pdm_din1_z_pins: pdm-din1-z {
562 groups = "pdm_din1_z";
568 pdm_din2_a_pins: pdm-din2-a {
570 groups = "pdm_din2_a";
576 pdm_din2_c_pins: pdm-din2-c {
578 groups = "pdm_din2_c";
584 pdm_din2_x_pins: pdm-din2-x {
586 groups = "pdm_din2_x";
592 pdm_din2_z_pins: pdm-din2-z {
594 groups = "pdm_din2_z";
600 pdm_din3_a_pins: pdm-din3-a {
602 groups = "pdm_din3_a";
608 pdm_din3_c_pins: pdm-din3-c {
610 groups = "pdm_din3_c";
616 pdm_din3_x_pins: pdm-din3-x {
618 groups = "pdm_din3_x";
624 pdm_din3_z_pins: pdm-din3-z {
626 groups = "pdm_din3_z";
632 pdm_dclk_a_pins: pdm-dclk-a {
634 groups = "pdm_dclk_a";
637 drive-strength-microamp = <500>;
641 pdm_dclk_c_pins: pdm-dclk-c {
643 groups = "pdm_dclk_c";
646 drive-strength-microamp = <500>;
650 pdm_dclk_x_pins: pdm-dclk-x {
652 groups = "pdm_dclk_x";
655 drive-strength-microamp = <500>;
659 pdm_dclk_z_pins: pdm-dclk-z {
661 groups = "pdm_dclk_z";
664 drive-strength-microamp = <500>;
676 pwm_b_x7_pins: pwm-b-x7 {
684 pwm_b_x19_pins: pwm-b-x19 {
686 groups = "pwm_b_x19";
692 pwm_c_c_pins: pwm-c-c {
700 pwm_c_x5_pins: pwm-c-x5 {
708 pwm_c_x8_pins: pwm-c-x8 {
716 pwm_d_x3_pins: pwm-d-x3 {
724 pwm_d_x6_pins: pwm-d-x6 {
740 pwm_f_x_pins: pwm-f-x {
748 pwm_f_h_pins: pwm-f-h {
756 sdcard_c_pins: sdcard_c {
758 groups = "sdcard_d0_c",
765 drive-strength-microamp = <4000>;
769 groups = "sdcard_clk_c";
772 drive-strength-microamp = <4000>;
776 sdcard_clk_gate_c_pins: sdcard_clk_gate_c {
779 function = "gpio_periphs";
781 drive-strength-microamp = <4000>;
785 sdcard_z_pins: sdcard_z {
787 groups = "sdcard_d0_z",
794 drive-strength-microamp = <4000>;
798 groups = "sdcard_clk_z";
801 drive-strength-microamp = <4000>;
805 sdcard_clk_gate_z_pins: sdcard_clk_gate_z {
808 function = "gpio_periphs";
810 drive-strength-microamp = <4000>;
824 drive-strength-microamp = <4000>;
828 sdio_clk_gate_pins: sdio_clk_gate {
831 function = "gpio_periphs";
833 drive-strength-microamp = <4000>;
837 spdif_in_a10_pins: spdif-in-a10 {
839 groups = "spdif_in_a10";
840 function = "spdif_in";
845 spdif_in_a12_pins: spdif-in-a12 {
847 groups = "spdif_in_a12";
848 function = "spdif_in";
853 spdif_in_h_pins: spdif-in-h {
855 groups = "spdif_in_h";
856 function = "spdif_in";
861 spdif_out_h_pins: spdif-out-h {
863 groups = "spdif_out_h";
864 function = "spdif_out";
865 drive-strength-microamp = <500>;
870 spdif_out_a11_pins: spdif-out-a11 {
872 groups = "spdif_out_a11";
873 function = "spdif_out";
874 drive-strength-microamp = <500>;
879 spdif_out_a13_pins: spdif-out-a13 {
881 groups = "spdif_out_a13";
882 function = "spdif_out";
883 drive-strength-microamp = <500>;
888 tdm_a_din0_pins: tdm-a-din0 {
890 groups = "tdm_a_din0";
897 tdm_a_din1_pins: tdm-a-din1 {
899 groups = "tdm_a_din1";
905 tdm_a_dout0_pins: tdm-a-dout0 {
907 groups = "tdm_a_dout0";
910 drive-strength-microamp = <3000>;
914 tdm_a_dout1_pins: tdm-a-dout1 {
916 groups = "tdm_a_dout1";
919 drive-strength-microamp = <3000>;
923 tdm_a_fs_pins: tdm-a-fs {
928 drive-strength-microamp = <3000>;
932 tdm_a_sclk_pins: tdm-a-sclk {
934 groups = "tdm_a_sclk";
937 drive-strength-microamp = <3000>;
941 tdm_a_slv_fs_pins: tdm-a-slv-fs {
943 groups = "tdm_a_slv_fs";
950 tdm_a_slv_sclk_pins: tdm-a-slv-sclk {
952 groups = "tdm_a_slv_sclk";
958 tdm_b_din0_pins: tdm-b-din0 {
960 groups = "tdm_b_din0";
966 tdm_b_din1_pins: tdm-b-din1 {
968 groups = "tdm_b_din1";
974 tdm_b_din2_pins: tdm-b-din2 {
976 groups = "tdm_b_din2";
982 tdm_b_din3_a_pins: tdm-b-din3-a {
984 groups = "tdm_b_din3_a";
990 tdm_b_din3_h_pins: tdm-b-din3-h {
992 groups = "tdm_b_din3_h";
998 tdm_b_dout0_pins: tdm-b-dout0 {
1000 groups = "tdm_b_dout0";
1003 drive-strength-microamp = <3000>;
1007 tdm_b_dout1_pins: tdm-b-dout1 {
1009 groups = "tdm_b_dout1";
1012 drive-strength-microamp = <3000>;
1016 tdm_b_dout2_pins: tdm-b-dout2 {
1018 groups = "tdm_b_dout2";
1021 drive-strength-microamp = <3000>;
1025 tdm_b_dout3_a_pins: tdm-b-dout3-a {
1027 groups = "tdm_b_dout3_a";
1030 drive-strength-microamp = <3000>;
1034 tdm_b_dout3_h_pins: tdm-b-dout3-h {
1036 groups = "tdm_b_dout3_h";
1039 drive-strength-microamp = <3000>;
1043 tdm_b_fs_pins: tdm-b-fs {
1045 groups = "tdm_b_fs";
1048 drive-strength-microamp = <3000>;
1052 tdm_b_sclk_pins: tdm-b-sclk {
1054 groups = "tdm_b_sclk";
1057 drive-strength-microamp = <3000>;
1061 tdm_b_slv_fs_pins: tdm-b-slv-fs {
1063 groups = "tdm_b_slv_fs";
1069 tdm_b_slv_sclk_pins: tdm-b-slv-sclk {
1071 groups = "tdm_b_slv_sclk";
1077 tdm_c_din0_a_pins: tdm-c-din0-a {
1079 groups = "tdm_c_din0_a";
1085 tdm_c_din0_z_pins: tdm-c-din0-z {
1087 groups = "tdm_c_din0_z";
1093 tdm_c_din1_a_pins: tdm-c-din1-a {
1095 groups = "tdm_c_din1_a";
1101 tdm_c_din1_z_pins: tdm-c-din1-z {
1103 groups = "tdm_c_din1_z";
1109 tdm_c_din2_a_pins: tdm-c-din2-a {
1111 groups = "tdm_c_din2_a";
1117 eth_leds_pins: eth-leds {
1119 groups = "eth_link_led",
1128 groups = "eth_mdio",
1138 drive-strength-microamp = <4000>;
1143 eth_rgmii_pins: eth-rgmii {
1145 groups = "eth_rxd2_rgmii",
1151 drive-strength-microamp = <4000>;
1156 tdm_c_din2_z_pins: tdm-c-din2-z {
1158 groups = "tdm_c_din2_z";
1164 tdm_c_din3_a_pins: tdm-c-din3-a {
1166 groups = "tdm_c_din3_a";
1172 tdm_c_din3_z_pins: tdm-c-din3-z {
1174 groups = "tdm_c_din3_z";
1180 tdm_c_dout0_a_pins: tdm-c-dout0-a {
1182 groups = "tdm_c_dout0_a";
1185 drive-strength-microamp = <3000>;
1189 tdm_c_dout0_z_pins: tdm-c-dout0-z {
1191 groups = "tdm_c_dout0_z";
1194 drive-strength-microamp = <3000>;
1198 tdm_c_dout1_a_pins: tdm-c-dout1-a {
1200 groups = "tdm_c_dout1_a";
1203 drive-strength-microamp = <3000>;
1207 tdm_c_dout1_z_pins: tdm-c-dout1-z {
1209 groups = "tdm_c_dout1_z";
1212 drive-strength-microamp = <3000>;
1216 tdm_c_dout2_a_pins: tdm-c-dout2-a {
1218 groups = "tdm_c_dout2_a";
1221 drive-strength-microamp = <3000>;
1225 tdm_c_dout2_z_pins: tdm-c-dout2-z {
1227 groups = "tdm_c_dout2_z";
1230 drive-strength-microamp = <3000>;
1234 tdm_c_dout3_a_pins: tdm-c-dout3-a {
1236 groups = "tdm_c_dout3_a";
1239 drive-strength-microamp = <3000>;
1243 tdm_c_dout3_z_pins: tdm-c-dout3-z {
1245 groups = "tdm_c_dout3_z";
1248 drive-strength-microamp = <3000>;
1252 tdm_c_fs_a_pins: tdm-c-fs-a {
1254 groups = "tdm_c_fs_a";
1257 drive-strength-microamp = <3000>;
1261 tdm_c_fs_z_pins: tdm-c-fs-z {
1263 groups = "tdm_c_fs_z";
1266 drive-strength-microamp = <3000>;
1270 tdm_c_sclk_a_pins: tdm-c-sclk-a {
1272 groups = "tdm_c_sclk_a";
1275 drive-strength-microamp = <3000>;
1279 tdm_c_sclk_z_pins: tdm-c-sclk-z {
1281 groups = "tdm_c_sclk_z";
1284 drive-strength-microamp = <3000>;
1288 tdm_c_slv_fs_a_pins: tdm-c-slv-fs-a {
1290 groups = "tdm_c_slv_fs_a";
1296 tdm_c_slv_fs_z_pins: tdm-c-slv-fs-z {
1298 groups = "tdm_c_slv_fs_z";
1304 tdm_c_slv_sclk_a_pins: tdm-c-slv-sclk-a {
1306 groups = "tdm_c_slv_sclk_a";
1312 tdm_c_slv_sclk_z_pins: tdm-c-slv-sclk-z {
1314 groups = "tdm_c_slv_sclk_z";
1320 uart_a_pins: uart-a {
1322 groups = "uart_a_tx",
1324 function = "uart_a";
1329 uart_a_cts_rts_pins: uart-a-cts-rts {
1331 groups = "uart_a_cts",
1333 function = "uart_a";
1338 uart_b_pins: uart-b {
1340 groups = "uart_b_tx",
1342 function = "uart_b";
1347 uart_c_pins: uart-c {
1349 groups = "uart_c_tx",
1351 function = "uart_c";
1356 uart_c_cts_rts_pins: uart-c-cts-rts {
1358 groups = "uart_c_cts",
1360 function = "uart_c";
1367 usb2_phy0: phy@36000 {
1368 compatible = "amlogic,g12a-usb2-phy";
1369 reg = <0x0 0x36000 0x0 0x2000>;
1371 clock-names = "xtal";
1372 resets = <&reset RESET_USB_PHY20>;
1373 reset-names = "phy";
1378 compatible = "simple-bus";
1379 #address-cells = <2>;
1381 ranges = <0x0 0x0 0x0 0x38000 0x0 0x2000>;
1383 canvas: video-lut@48 {
1384 compatible = "amlogic,canvas";
1385 reg = <0x0 0x48 0x0 0x14>;
1389 usb2_phy1: phy@3a000 {
1390 compatible = "amlogic,g12a-usb2-phy";
1391 reg = <0x0 0x3a000 0x0 0x2000>;
1393 clock-names = "xtal";
1394 resets = <&reset RESET_USB_PHY21>;
1395 reset-names = "phy";
1400 compatible = "simple-bus";
1401 reg = <0x0 0x3c000 0x0 0x1400>;
1402 #address-cells = <2>;
1404 ranges = <0x0 0x0 0x0 0x3c000 0x0 0x1400>;
1406 hhi: system-controller@0 {
1407 compatible = "amlogic,meson-gx-hhi-sysctrl",
1408 "simple-mfd", "syscon";
1409 reg = <0 0 0 0x400>;
1411 clkc: clock-controller {
1412 compatible = "amlogic,g12a-clkc";
1415 clock-names = "xtal";
1418 pwrc: power-controller {
1419 compatible = "amlogic,meson-g12a-pwrc";
1420 #power-domain-cells = <1>;
1421 amlogic,ao-sysctrl = <&rti>;
1422 resets = <&reset RESET_VIU>,
1423 <&reset RESET_VENC>,
1424 <&reset RESET_VCBUS>,
1425 <&reset RESET_BT656>,
1426 <&reset RESET_RDMA>,
1427 <&reset RESET_VENCI>,
1428 <&reset RESET_VENCP>,
1429 <&reset RESET_VDAC>,
1430 <&reset RESET_VDI6>,
1431 <&reset RESET_VENCL>,
1432 <&reset RESET_VID_LOCK>;
1433 reset-names = "viu", "venc", "vcbus", "bt656",
1434 "rdma", "venci", "vencp", "vdac",
1435 "vdi6", "vencl", "vid_lock";
1436 clocks = <&clkc CLKID_VPU>,
1438 clock-names = "vpu", "vapb";
1440 * VPU clocking is provided by two identical clock paths
1441 * VPU_0 and VPU_1 muxed to a single clock by a glitch
1442 * free mux to safely change frequency while running.
1443 * Same for VAPB but with a final gate after the glitch free mux.
1445 assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
1446 <&clkc CLKID_VPU_0>,
1447 <&clkc CLKID_VPU>, /* Glitch free mux */
1448 <&clkc CLKID_VAPB_0_SEL>,
1449 <&clkc CLKID_VAPB_0>,
1450 <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */
1451 assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
1452 <0>, /* Do Nothing */
1453 <&clkc CLKID_VPU_0>,
1454 <&clkc CLKID_FCLK_DIV4>,
1455 <0>, /* Do Nothing */
1456 <&clkc CLKID_VAPB_0>;
1457 assigned-clock-rates = <0>, /* Do Nothing */
1459 <0>, /* Do Nothing */
1460 <0>, /* Do Nothing */
1462 <0>; /* Do Nothing */
1467 pdm: audio-controller@40000 {
1468 compatible = "amlogic,g12a-pdm",
1470 reg = <0x0 0x40000 0x0 0x34>;
1471 #sound-dai-cells = <0>;
1472 sound-name-prefix = "PDM";
1473 clocks = <&clkc_audio AUD_CLKID_PDM>,
1474 <&clkc_audio AUD_CLKID_PDM_DCLK>,
1475 <&clkc_audio AUD_CLKID_PDM_SYSCLK>;
1476 clock-names = "pclk", "dclk", "sysclk";
1477 status = "disabled";
1481 compatible = "simple-bus";
1482 reg = <0x0 0x42000 0x0 0x2000>;
1483 #address-cells = <2>;
1485 ranges = <0x0 0x0 0x0 0x42000 0x0 0x2000>;
1487 clkc_audio: clock-controller@0 {
1488 status = "disabled";
1489 compatible = "amlogic,g12a-audio-clkc";
1490 reg = <0x0 0x0 0x0 0xb4>;
1494 clocks = <&clkc CLKID_AUDIO>,
1495 <&clkc CLKID_MPLL0>,
1496 <&clkc CLKID_MPLL1>,
1497 <&clkc CLKID_MPLL2>,
1498 <&clkc CLKID_MPLL3>,
1499 <&clkc CLKID_HIFI_PLL>,
1500 <&clkc CLKID_FCLK_DIV3>,
1501 <&clkc CLKID_FCLK_DIV4>,
1502 <&clkc CLKID_GP0_PLL>;
1503 clock-names = "pclk",
1513 resets = <&reset RESET_AUDIO>;
1516 toddr_a: audio-controller@100 {
1517 compatible = "amlogic,g12a-toddr",
1518 "amlogic,axg-toddr";
1519 reg = <0x0 0x100 0x0 0x2c>;
1520 #sound-dai-cells = <0>;
1521 sound-name-prefix = "TODDR_A";
1522 interrupts = <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>;
1523 clocks = <&clkc_audio AUD_CLKID_TODDR_A>;
1524 resets = <&arb AXG_ARB_TODDR_A>;
1525 status = "disabled";
1528 toddr_b: audio-controller@140 {
1529 compatible = "amlogic,g12a-toddr",
1530 "amlogic,axg-toddr";
1531 reg = <0x0 0x140 0x0 0x2c>;
1532 #sound-dai-cells = <0>;
1533 sound-name-prefix = "TODDR_B";
1534 interrupts = <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>;
1535 clocks = <&clkc_audio AUD_CLKID_TODDR_B>;
1536 resets = <&arb AXG_ARB_TODDR_B>;
1537 status = "disabled";
1540 toddr_c: audio-controller@180 {
1541 compatible = "amlogic,g12a-toddr",
1542 "amlogic,axg-toddr";
1543 reg = <0x0 0x180 0x0 0x2c>;
1544 #sound-dai-cells = <0>;
1545 sound-name-prefix = "TODDR_C";
1546 interrupts = <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>;
1547 clocks = <&clkc_audio AUD_CLKID_TODDR_C>;
1548 resets = <&arb AXG_ARB_TODDR_C>;
1549 status = "disabled";
1552 frddr_a: audio-controller@1c0 {
1553 compatible = "amlogic,g12a-frddr",
1554 "amlogic,axg-frddr";
1555 reg = <0x0 0x1c0 0x0 0x2c>;
1556 #sound-dai-cells = <0>;
1557 sound-name-prefix = "FRDDR_A";
1558 interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>;
1559 clocks = <&clkc_audio AUD_CLKID_FRDDR_A>;
1560 resets = <&arb AXG_ARB_FRDDR_A>;
1561 status = "disabled";
1564 frddr_b: audio-controller@200 {
1565 compatible = "amlogic,g12a-frddr",
1566 "amlogic,axg-frddr";
1567 reg = <0x0 0x200 0x0 0x2c>;
1568 #sound-dai-cells = <0>;
1569 sound-name-prefix = "FRDDR_B";
1570 interrupts = <GIC_SPI 153 IRQ_TYPE_EDGE_RISING>;
1571 clocks = <&clkc_audio AUD_CLKID_FRDDR_B>;
1572 resets = <&arb AXG_ARB_FRDDR_B>;
1573 status = "disabled";
1576 frddr_c: audio-controller@240 {
1577 compatible = "amlogic,g12a-frddr",
1578 "amlogic,axg-frddr";
1579 reg = <0x0 0x240 0x0 0x2c>;
1580 #sound-dai-cells = <0>;
1581 sound-name-prefix = "FRDDR_C";
1582 interrupts = <GIC_SPI 154 IRQ_TYPE_EDGE_RISING>;
1583 clocks = <&clkc_audio AUD_CLKID_FRDDR_C>;
1584 resets = <&arb AXG_ARB_FRDDR_C>;
1585 status = "disabled";
1588 arb: reset-controller@280 {
1589 status = "disabled";
1590 compatible = "amlogic,meson-axg-audio-arb";
1591 reg = <0x0 0x280 0x0 0x4>;
1593 clocks = <&clkc_audio AUD_CLKID_DDR_ARB>;
1596 tdmin_a: audio-controller@300 {
1597 compatible = "amlogic,g12a-tdmin",
1598 "amlogic,axg-tdmin";
1599 reg = <0x0 0x300 0x0 0x40>;
1600 sound-name-prefix = "TDMIN_A";
1601 resets = <&clkc_audio AUD_RESET_TDMIN_A>;
1602 clocks = <&clkc_audio AUD_CLKID_TDMIN_A>,
1603 <&clkc_audio AUD_CLKID_TDMIN_A_SCLK>,
1604 <&clkc_audio AUD_CLKID_TDMIN_A_SCLK_SEL>,
1605 <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>,
1606 <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>;
1607 clock-names = "pclk", "sclk", "sclk_sel",
1608 "lrclk", "lrclk_sel";
1609 status = "disabled";
1612 tdmin_b: audio-controller@340 {
1613 compatible = "amlogic,g12a-tdmin",
1614 "amlogic,axg-tdmin";
1615 reg = <0x0 0x340 0x0 0x40>;
1616 sound-name-prefix = "TDMIN_B";
1617 resets = <&clkc_audio AUD_RESET_TDMIN_B>;
1618 clocks = <&clkc_audio AUD_CLKID_TDMIN_B>,
1619 <&clkc_audio AUD_CLKID_TDMIN_B_SCLK>,
1620 <&clkc_audio AUD_CLKID_TDMIN_B_SCLK_SEL>,
1621 <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>,
1622 <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>;
1623 clock-names = "pclk", "sclk", "sclk_sel",
1624 "lrclk", "lrclk_sel";
1625 status = "disabled";
1628 tdmin_c: audio-controller@380 {
1629 compatible = "amlogic,g12a-tdmin",
1630 "amlogic,axg-tdmin";
1631 reg = <0x0 0x380 0x0 0x40>;
1632 sound-name-prefix = "TDMIN_C";
1633 resets = <&clkc_audio AUD_RESET_TDMIN_C>;
1634 clocks = <&clkc_audio AUD_CLKID_TDMIN_C>,
1635 <&clkc_audio AUD_CLKID_TDMIN_C_SCLK>,
1636 <&clkc_audio AUD_CLKID_TDMIN_C_SCLK_SEL>,
1637 <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>,
1638 <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>;
1639 clock-names = "pclk", "sclk", "sclk_sel",
1640 "lrclk", "lrclk_sel";
1641 status = "disabled";
1644 tdmin_lb: audio-controller@3c0 {
1645 compatible = "amlogic,g12a-tdmin",
1646 "amlogic,axg-tdmin";
1647 reg = <0x0 0x3c0 0x0 0x40>;
1648 sound-name-prefix = "TDMIN_LB";
1649 resets = <&clkc_audio AUD_RESET_TDMIN_LB>;
1650 clocks = <&clkc_audio AUD_CLKID_TDMIN_LB>,
1651 <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK>,
1652 <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK_SEL>,
1653 <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>,
1654 <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>;
1655 clock-names = "pclk", "sclk", "sclk_sel",
1656 "lrclk", "lrclk_sel";
1657 status = "disabled";
1660 spdifin: audio-controller@400 {
1661 compatible = "amlogic,g12a-spdifin",
1662 "amlogic,axg-spdifin";
1663 reg = <0x0 0x400 0x0 0x30>;
1664 #sound-dai-cells = <0>;
1665 sound-name-prefix = "SPDIFIN";
1666 interrupts = <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
1667 clocks = <&clkc_audio AUD_CLKID_SPDIFIN>,
1668 <&clkc_audio AUD_CLKID_SPDIFIN_CLK>;
1669 clock-names = "pclk", "refclk";
1670 status = "disabled";
1673 spdifout: audio-controller@480 {
1674 compatible = "amlogic,g12a-spdifout",
1675 "amlogic,axg-spdifout";
1676 reg = <0x0 0x480 0x0 0x50>;
1677 #sound-dai-cells = <0>;
1678 sound-name-prefix = "SPDIFOUT";
1679 clocks = <&clkc_audio AUD_CLKID_SPDIFOUT>,
1680 <&clkc_audio AUD_CLKID_SPDIFOUT_CLK>;
1681 clock-names = "pclk", "mclk";
1682 status = "disabled";
1685 tdmout_a: audio-controller@500 {
1686 compatible = "amlogic,g12a-tdmout";
1687 reg = <0x0 0x500 0x0 0x40>;
1688 sound-name-prefix = "TDMOUT_A";
1689 resets = <&clkc_audio AUD_RESET_TDMOUT_A>;
1690 clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>,
1691 <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>,
1692 <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>,
1693 <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>,
1694 <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>;
1695 clock-names = "pclk", "sclk", "sclk_sel",
1696 "lrclk", "lrclk_sel";
1697 status = "disabled";
1700 tdmout_b: audio-controller@540 {
1701 compatible = "amlogic,g12a-tdmout";
1702 reg = <0x0 0x540 0x0 0x40>;
1703 sound-name-prefix = "TDMOUT_B";
1704 resets = <&clkc_audio AUD_RESET_TDMOUT_B>;
1705 clocks = <&clkc_audio AUD_CLKID_TDMOUT_B>,
1706 <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK>,
1707 <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK_SEL>,
1708 <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>,
1709 <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>;
1710 clock-names = "pclk", "sclk", "sclk_sel",
1711 "lrclk", "lrclk_sel";
1712 status = "disabled";
1715 tdmout_c: audio-controller@580 {
1716 compatible = "amlogic,g12a-tdmout";
1717 reg = <0x0 0x580 0x0 0x40>;
1718 sound-name-prefix = "TDMOUT_C";
1719 resets = <&clkc_audio AUD_RESET_TDMOUT_C>;
1720 clocks = <&clkc_audio AUD_CLKID_TDMOUT_C>,
1721 <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK>,
1722 <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK_SEL>,
1723 <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>,
1724 <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>;
1725 clock-names = "pclk", "sclk", "sclk_sel",
1726 "lrclk", "lrclk_sel";
1727 status = "disabled";
1730 spdifout_b: audio-controller@680 {
1731 compatible = "amlogic,g12a-spdifout",
1732 "amlogic,axg-spdifout";
1733 reg = <0x0 0x680 0x0 0x50>;
1734 #sound-dai-cells = <0>;
1735 sound-name-prefix = "SPDIFOUT_B";
1736 clocks = <&clkc_audio AUD_CLKID_SPDIFOUT_B>,
1737 <&clkc_audio AUD_CLKID_SPDIFOUT_B_CLK>;
1738 clock-names = "pclk", "mclk";
1739 status = "disabled";
1742 tohdmitx: audio-controller@744 {
1743 compatible = "amlogic,g12a-tohdmitx";
1744 reg = <0x0 0x744 0x0 0x4>;
1745 #sound-dai-cells = <1>;
1746 sound-name-prefix = "TOHDMITX";
1747 status = "disabled";
1751 usb3_pcie_phy: phy@46000 {
1752 compatible = "amlogic,g12a-usb3-pcie-phy";
1753 reg = <0x0 0x46000 0x0 0x2000>;
1754 clocks = <&clkc CLKID_PCIE_PLL>;
1755 clock-names = "ref_clk";
1756 resets = <&reset RESET_PCIE_PHY>;
1757 reset-names = "phy";
1758 assigned-clocks = <&clkc CLKID_PCIE_PLL>;
1759 assigned-clock-rates = <100000000>;
1763 eth_phy: mdio-multiplexer@4c000 {
1764 compatible = "amlogic,g12a-mdio-mux";
1765 reg = <0x0 0x4c000 0x0 0xa4>;
1766 clocks = <&clkc CLKID_ETH_PHY>,
1768 <&clkc CLKID_MPLL_50M>;
1769 clock-names = "pclk", "clkin0", "clkin1";
1770 mdio-parent-bus = <&mdio0>;
1771 #address-cells = <1>;
1776 #address-cells = <1>;
1782 #address-cells = <1>;
1785 internal_ephy: ethernet-phy@8 {
1786 compatible = "ethernet-phy-id0180.3301",
1787 "ethernet-phy-ieee802.3-c22";
1788 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
1796 aobus: bus@ff800000 {
1797 compatible = "simple-bus";
1798 reg = <0x0 0xff800000 0x0 0x100000>;
1799 #address-cells = <2>;
1801 ranges = <0x0 0x0 0x0 0xff800000 0x0 0x100000>;
1804 compatible = "amlogic,meson-gx-ao-sysctrl",
1805 "simple-mfd", "syscon";
1806 reg = <0x0 0x0 0x0 0x100>;
1807 #address-cells = <2>;
1809 ranges = <0x0 0x0 0x0 0x0 0x0 0x100>;
1811 clkc_AO: clock-controller {
1812 compatible = "amlogic,meson-g12a-aoclkc";
1815 clocks = <&xtal>, <&clkc CLKID_CLK81>;
1816 clock-names = "xtal", "mpeg-clk";
1819 ao_pinctrl: pinctrl@14 {
1820 compatible = "amlogic,meson-g12a-aobus-pinctrl";
1821 #address-cells = <2>;
1826 reg = <0x0 0x14 0x0 0x8>,
1828 <0x0 0x24 0x0 0x14>;
1834 gpio-ranges = <&ao_pinctrl 0 0 15>;
1837 i2c_ao_sck_pins: i2c_ao_sck_pins {
1839 groups = "i2c_ao_sck";
1840 function = "i2c_ao";
1842 drive-strength-microamp = <3000>;
1846 i2c_ao_sda_pins: i2c_ao_sda {
1848 groups = "i2c_ao_sda";
1849 function = "i2c_ao";
1851 drive-strength-microamp = <3000>;
1855 i2c_ao_sck_e_pins: i2c_ao_sck_e {
1857 groups = "i2c_ao_sck_e";
1858 function = "i2c_ao";
1860 drive-strength-microamp = <3000>;
1864 i2c_ao_sda_e_pins: i2c_ao_sda_e {
1866 groups = "i2c_ao_sda_e";
1867 function = "i2c_ao";
1869 drive-strength-microamp = <3000>;
1873 mclk0_ao_pins: mclk0-ao {
1875 groups = "mclk0_ao";
1876 function = "mclk0_ao";
1878 drive-strength-microamp = <3000>;
1882 tdm_ao_b_din0_pins: tdm-ao-b-din0 {
1884 groups = "tdm_ao_b_din0";
1885 function = "tdm_ao_b";
1890 spdif_ao_out_pins: spdif-ao-out {
1892 groups = "spdif_ao_out";
1893 function = "spdif_ao_out";
1894 drive-strength-microamp = <500>;
1899 tdm_ao_b_din1_pins: tdm-ao-b-din1 {
1901 groups = "tdm_ao_b_din1";
1902 function = "tdm_ao_b";
1907 tdm_ao_b_din2_pins: tdm-ao-b-din2 {
1909 groups = "tdm_ao_b_din2";
1910 function = "tdm_ao_b";
1915 tdm_ao_b_dout0_pins: tdm-ao-b-dout0 {
1917 groups = "tdm_ao_b_dout0";
1918 function = "tdm_ao_b";
1920 drive-strength-microamp = <3000>;
1924 tdm_ao_b_dout1_pins: tdm-ao-b-dout1 {
1926 groups = "tdm_ao_b_dout1";
1927 function = "tdm_ao_b";
1929 drive-strength-microamp = <3000>;
1933 tdm_ao_b_dout2_pins: tdm-ao-b-dout2 {
1935 groups = "tdm_ao_b_dout2";
1936 function = "tdm_ao_b";
1938 drive-strength-microamp = <3000>;
1942 tdm_ao_b_fs_pins: tdm-ao-b-fs {
1944 groups = "tdm_ao_b_fs";
1945 function = "tdm_ao_b";
1947 drive-strength-microamp = <3000>;
1951 tdm_ao_b_sclk_pins: tdm-ao-b-sclk {
1953 groups = "tdm_ao_b_sclk";
1954 function = "tdm_ao_b";
1956 drive-strength-microamp = <3000>;
1960 tdm_ao_b_slv_fs_pins: tdm-ao-b-slv-fs {
1962 groups = "tdm_ao_b_slv_fs";
1963 function = "tdm_ao_b";
1968 tdm_ao_b_slv_sclk_pins: tdm-ao-b-slv-sclk {
1970 groups = "tdm_ao_b_slv_sclk";
1971 function = "tdm_ao_b";
1976 uart_ao_a_pins: uart-a-ao {
1978 groups = "uart_ao_a_tx",
1980 function = "uart_ao_a";
1985 uart_ao_a_cts_rts_pins: uart-ao-a-cts-rts {
1987 groups = "uart_ao_a_cts",
1989 function = "uart_ao_a";
1994 pwm_a_e_pins: pwm-a-e {
1997 function = "pwm_a_e";
2002 pwm_ao_a_pins: pwm-ao-a {
2004 groups = "pwm_ao_a";
2005 function = "pwm_ao_a";
2010 pwm_ao_b_pins: pwm-ao-b {
2012 groups = "pwm_ao_b";
2013 function = "pwm_ao_b";
2018 pwm_ao_c_4_pins: pwm-ao-c-4 {
2020 groups = "pwm_ao_c_4";
2021 function = "pwm_ao_c";
2026 pwm_ao_c_6_pins: pwm-ao-c-6 {
2028 groups = "pwm_ao_c_6";
2029 function = "pwm_ao_c";
2034 pwm_ao_d_5_pins: pwm-ao-d-5 {
2036 groups = "pwm_ao_d_5";
2037 function = "pwm_ao_d";
2042 pwm_ao_d_10_pins: pwm-ao-d-10 {
2044 groups = "pwm_ao_d_10";
2045 function = "pwm_ao_d";
2050 pwm_ao_d_e_pins: pwm-ao-d-e {
2052 groups = "pwm_ao_d_e";
2053 function = "pwm_ao_d";
2057 remote_input_ao_pins: remote-input-ao {
2059 groups = "remote_ao_input";
2060 function = "remote_ao_input";
2068 compatible = "amlogic,meson-vrtc";
2069 reg = <0x0 0x000a8 0x0 0x4>;
2073 compatible = "amlogic,meson-gx-ao-cec";
2074 reg = <0x0 0x00100 0x0 0x14>;
2075 interrupts = <GIC_SPI 199 IRQ_TYPE_EDGE_RISING>;
2076 clocks = <&clkc_AO CLKID_AO_CEC>;
2077 clock-names = "core";
2078 status = "disabled";
2081 sec_AO: ao-secure@140 {
2082 compatible = "amlogic,meson-gx-ao-secure", "syscon";
2083 reg = <0x0 0x140 0x0 0x140>;
2084 amlogic,has-chip-id;
2088 compatible = "amlogic,meson-g12a-ao-cec";
2089 reg = <0x0 0x00280 0x0 0x1c>;
2090 interrupts = <GIC_SPI 203 IRQ_TYPE_EDGE_RISING>;
2091 clocks = <&clkc_AO CLKID_AO_CTS_OSCIN>;
2092 clock-names = "oscin";
2093 status = "disabled";
2096 pwm_AO_cd: pwm@2000 {
2097 compatible = "amlogic,meson-g12a-ao-pwm-cd";
2098 reg = <0x0 0x2000 0x0 0x20>;
2100 status = "disabled";
2103 uart_AO: serial@3000 {
2104 compatible = "amlogic,meson-gx-uart",
2105 "amlogic,meson-ao-uart";
2106 reg = <0x0 0x3000 0x0 0x18>;
2107 interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
2108 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART>, <&xtal>;
2109 clock-names = "xtal", "pclk", "baud";
2110 status = "disabled";
2113 uart_AO_B: serial@4000 {
2114 compatible = "amlogic,meson-gx-uart",
2115 "amlogic,meson-ao-uart";
2116 reg = <0x0 0x4000 0x0 0x18>;
2117 interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
2118 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>;
2119 clock-names = "xtal", "pclk", "baud";
2120 status = "disabled";
2124 compatible = "amlogic,meson-axg-i2c";
2125 status = "disabled";
2126 reg = <0x0 0x05000 0x0 0x20>;
2127 interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
2128 #address-cells = <1>;
2130 clocks = <&clkc CLKID_I2C>;
2133 pwm_AO_ab: pwm@7000 {
2134 compatible = "amlogic,meson-g12a-ao-pwm-ab";
2135 reg = <0x0 0x7000 0x0 0x20>;
2137 status = "disabled";
2141 compatible = "amlogic,meson-gxbb-ir";
2142 reg = <0x0 0x8000 0x0 0x20>;
2143 interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
2144 status = "disabled";
2148 compatible = "amlogic,meson-g12a-saradc",
2149 "amlogic,meson-saradc";
2150 reg = <0x0 0x9000 0x0 0x48>;
2151 #io-channel-cells = <1>;
2152 interrupts = <GIC_SPI 200 IRQ_TYPE_EDGE_RISING>;
2154 <&clkc_AO CLKID_AO_SAR_ADC>,
2155 <&clkc_AO CLKID_AO_SAR_ADC_CLK>,
2156 <&clkc_AO CLKID_AO_SAR_ADC_SEL>;
2157 clock-names = "clkin", "core", "adc_clk", "adc_sel";
2158 status = "disabled";
2163 compatible = "amlogic,meson-g12a-vpu";
2164 reg = <0x0 0xff900000 0x0 0x100000>,
2165 <0x0 0xff63c000 0x0 0x1000>;
2166 reg-names = "vpu", "hhi";
2167 interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
2168 #address-cells = <1>;
2170 amlogic,canvas = <&canvas>;
2172 /* CVBS VDAC output port */
2173 cvbs_vdac_port: port@0 {
2177 /* HDMI-TX output port */
2178 hdmi_tx_port: port@1 {
2181 hdmi_tx_out: endpoint {
2182 remote-endpoint = <&hdmi_tx_in>;
2187 gic: interrupt-controller@ffc01000 {
2188 compatible = "arm,gic-400";
2189 reg = <0x0 0xffc01000 0 0x1000>,
2190 <0x0 0xffc02000 0 0x2000>,
2191 <0x0 0xffc04000 0 0x2000>,
2192 <0x0 0xffc06000 0 0x2000>;
2193 interrupt-controller;
2194 interrupts = <GIC_PPI 9
2195 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
2196 #interrupt-cells = <3>;
2197 #address-cells = <0>;
2200 cbus: bus@ffd00000 {
2201 compatible = "simple-bus";
2202 reg = <0x0 0xffd00000 0x0 0x100000>;
2203 #address-cells = <2>;
2205 ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x100000>;
2207 reset: reset-controller@1004 {
2208 compatible = "amlogic,meson-axg-reset";
2209 reg = <0x0 0x1004 0x0 0x9c>;
2213 gpio_intc: interrupt-controller@f080 {
2214 compatible = "amlogic,meson-g12a-gpio-intc",
2215 "amlogic,meson-gpio-intc";
2216 reg = <0x0 0xf080 0x0 0x10>;
2217 interrupt-controller;
2218 #interrupt-cells = <2>;
2219 amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
2223 compatible = "amlogic,meson-g12a-ee-pwm";
2224 reg = <0x0 0x19000 0x0 0x20>;
2226 status = "disabled";
2230 compatible = "amlogic,meson-g12a-ee-pwm";
2231 reg = <0x0 0x1a000 0x0 0x20>;
2233 status = "disabled";
2237 compatible = "amlogic,meson-g12a-ee-pwm";
2238 reg = <0x0 0x1b000 0x0 0x20>;
2240 status = "disabled";
2244 compatible = "amlogic,meson-axg-i2c";
2245 status = "disabled";
2246 reg = <0x0 0x1c000 0x0 0x20>;
2247 interrupts = <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>;
2248 #address-cells = <1>;
2250 clocks = <&clkc CLKID_I2C>;
2254 compatible = "amlogic,meson-axg-i2c";
2255 status = "disabled";
2256 reg = <0x0 0x1d000 0x0 0x20>;
2257 interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
2258 #address-cells = <1>;
2260 clocks = <&clkc CLKID_I2C>;
2264 compatible = "amlogic,meson-axg-i2c";
2265 status = "disabled";
2266 reg = <0x0 0x1e000 0x0 0x20>;
2267 interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;
2268 #address-cells = <1>;
2270 clocks = <&clkc CLKID_I2C>;
2274 compatible = "amlogic,meson-axg-i2c";
2275 status = "disabled";
2276 reg = <0x0 0x1f000 0x0 0x20>;
2277 interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
2278 #address-cells = <1>;
2280 clocks = <&clkc CLKID_I2C>;
2283 clk_msr: clock-measure@18000 {
2284 compatible = "amlogic,meson-g12a-clk-measure";
2285 reg = <0x0 0x18000 0x0 0x10>;
2288 uart_C: serial@22000 {
2289 compatible = "amlogic,meson-gx-uart";
2290 reg = <0x0 0x22000 0x0 0x18>;
2291 interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
2292 clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>;
2293 clock-names = "xtal", "pclk", "baud";
2294 status = "disabled";
2297 uart_B: serial@23000 {
2298 compatible = "amlogic,meson-gx-uart";
2299 reg = <0x0 0x23000 0x0 0x18>;
2300 interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
2301 clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
2302 clock-names = "xtal", "pclk", "baud";
2303 status = "disabled";
2306 uart_A: serial@24000 {
2307 compatible = "amlogic,meson-gx-uart";
2308 reg = <0x0 0x24000 0x0 0x18>;
2309 interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
2310 clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
2311 clock-names = "xtal", "pclk", "baud";
2312 status = "disabled";
2316 sd_emmc_a: sd@ffe03000 {
2317 compatible = "amlogic,meson-axg-mmc";
2318 reg = <0x0 0xffe03000 0x0 0x800>;
2319 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
2320 status = "disabled";
2321 clocks = <&clkc CLKID_SD_EMMC_A>,
2322 <&clkc CLKID_SD_EMMC_A_CLK0>,
2323 <&clkc CLKID_FCLK_DIV2>;
2324 clock-names = "core", "clkin0", "clkin1";
2325 resets = <&reset RESET_SD_EMMC_A>;
2328 sd_emmc_b: sd@ffe05000 {
2329 compatible = "amlogic,meson-axg-mmc";
2330 reg = <0x0 0xffe05000 0x0 0x800>;
2331 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
2332 status = "disabled";
2333 clocks = <&clkc CLKID_SD_EMMC_B>,
2334 <&clkc CLKID_SD_EMMC_B_CLK0>,
2335 <&clkc CLKID_FCLK_DIV2>;
2336 clock-names = "core", "clkin0", "clkin1";
2337 resets = <&reset RESET_SD_EMMC_B>;
2340 sd_emmc_c: mmc@ffe07000 {
2341 compatible = "amlogic,meson-axg-mmc";
2342 reg = <0x0 0xffe07000 0x0 0x800>;
2343 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
2344 status = "disabled";
2345 clocks = <&clkc CLKID_SD_EMMC_C>,
2346 <&clkc CLKID_SD_EMMC_C_CLK0>,
2347 <&clkc CLKID_FCLK_DIV2>;
2348 clock-names = "core", "clkin0", "clkin1";
2349 resets = <&reset RESET_SD_EMMC_C>;
2353 status = "disabled";
2354 compatible = "amlogic,meson-g12a-usb-ctrl";
2355 reg = <0x0 0xffe09000 0x0 0xa0>;
2356 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
2357 #address-cells = <2>;
2361 clocks = <&clkc CLKID_USB>;
2362 resets = <&reset RESET_USB>;
2366 phys = <&usb2_phy0>, <&usb2_phy1>,
2367 <&usb3_pcie_phy PHY_TYPE_USB3>;
2368 phy-names = "usb2-phy0", "usb2-phy1", "usb3-phy0";
2370 dwc2: usb@ff400000 {
2371 compatible = "amlogic,meson-g12a-usb", "snps,dwc2";
2372 reg = <0x0 0xff400000 0x0 0x40000>;
2373 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
2374 clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
2375 clock-names = "otg";
2376 phys = <&usb2_phy1>;
2377 phy-names = "usb2-phy";
2378 dr_mode = "peripheral";
2379 g-rx-fifo-size = <192>;
2380 g-np-tx-fifo-size = <128>;
2381 g-tx-fifo-size = <128 128 16 16 16>;
2384 dwc3: usb@ff500000 {
2385 compatible = "snps,dwc3";
2386 reg = <0x0 0xff500000 0x0 0x100000>;
2387 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
2389 snps,dis_u2_susphy_quirk;
2390 snps,quirk-frame-length-adjustment = <0x20>;
2391 snps,parkmode-disable-ss-quirk;
2395 mali: gpu@ffe40000 {
2396 compatible = "amlogic,meson-g12a-mali", "arm,mali-bifrost";
2397 reg = <0x0 0xffe40000 0x0 0x40000>;
2398 interrupt-parent = <&gic>;
2399 interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
2400 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
2401 <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
2402 interrupt-names = "gpu", "mmu", "job";
2403 clocks = <&clkc CLKID_MALI>;
2404 resets = <&reset RESET_DVALIN_CAPB3>, <&reset RESET_DVALIN>;
2407 * Mali clocking is provided by two identical clock paths
2408 * MALI_0 and MALI_1 muxed to a single clock by a glitch
2409 * free mux to safely change frequency while running.
2411 assigned-clocks = <&clkc CLKID_MALI_0_SEL>,
2412 <&clkc CLKID_MALI_0>,
2413 <&clkc CLKID_MALI>; /* Glitch free mux */
2414 assigned-clock-parents = <&clkc CLKID_FCLK_DIV2P5>,
2415 <0>, /* Do Nothing */
2416 <&clkc CLKID_MALI_0>;
2417 assigned-clock-rates = <0>, /* Do Nothing */
2419 <0>; /* Do Nothing */
2424 compatible = "arm,armv8-timer";
2425 interrupts = <GIC_PPI 13
2426 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
2428 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
2430 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
2432 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
2433 arm,no-tick-in-suspend;
2437 compatible = "fixed-clock";
2438 clock-frequency = <24000000>;
2439 clock-output-names = "xtal";