1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2018 Amlogic, Inc. All rights reserved.
6 #include <dt-bindings/phy/phy.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/clock/g12a-clkc.h>
9 #include <dt-bindings/clock/g12a-aoclkc.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/reset/amlogic,meson-g12a-reset.h>
13 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
21 mmc0 = &sd_emmc_b; /* SD card */
22 mmc1 = &sd_emmc_c; /* eMMC */
23 mmc2 = &sd_emmc_a; /* SDIO */
31 simplefb_cvbs: framebuffer-cvbs {
32 compatible = "amlogic,simple-framebuffer",
34 amlogic,pipeline = "vpu-cvbs";
35 clocks = <&clkc CLKID_HDMI>,
36 <&clkc CLKID_HTX_PCLK>,
37 <&clkc CLKID_VPU_INTR>;
41 simplefb_hdmi: framebuffer-hdmi {
42 compatible = "amlogic,simple-framebuffer",
44 amlogic,pipeline = "vpu-hdmi";
45 clocks = <&clkc CLKID_HDMI>,
46 <&clkc CLKID_HTX_PCLK>,
47 <&clkc CLKID_VPU_INTR>;
53 compatible = "amlogic,meson-gxbb-efuse";
54 clocks = <&clkc CLKID_EFUSE>;
58 secure-monitor = <&sm>;
61 gpu_opp_table: opp-table-gpu {
62 compatible = "operating-points-v2";
65 opp-hz = /bits/ 64 <124999998>;
66 opp-microvolt = <800000>;
69 opp-hz = /bits/ 64 <249999996>;
70 opp-microvolt = <800000>;
73 opp-hz = /bits/ 64 <285714281>;
74 opp-microvolt = <800000>;
77 opp-hz = /bits/ 64 <399999994>;
78 opp-microvolt = <800000>;
81 opp-hz = /bits/ 64 <499999992>;
82 opp-microvolt = <800000>;
85 opp-hz = /bits/ 64 <666666656>;
86 opp-microvolt = <800000>;
89 opp-hz = /bits/ 64 <799999987>;
90 opp-microvolt = <800000>;
95 compatible = "arm,psci-1.0";
100 #address-cells = <2>;
104 /* 3 MiB reserved for ARM Trusted Firmware (BL31) */
105 secmon_reserved: secmon@5000000 {
106 reg = <0x0 0x05000000 0x0 0x300000>;
110 /* 32 MiB reserved for ARM Trusted Firmware (BL32) */
111 secmon_reserved_bl32: secmon@5300000 {
112 reg = <0x0 0x05300000 0x0 0x2000000>;
117 compatible = "shared-dma-pool";
119 size = <0x0 0x10000000>;
120 alignment = <0x0 0x400000>;
126 compatible = "amlogic,meson-gxbb-sm";
130 compatible = "simple-bus";
131 #address-cells = <2>;
135 pcie: pcie@fc000000 {
136 compatible = "amlogic,g12a-pcie", "snps,dw-pcie";
137 reg = <0x0 0xfc000000 0x0 0x400000>,
138 <0x0 0xff648000 0x0 0x2000>,
139 <0x0 0xfc400000 0x0 0x200000>;
140 reg-names = "elbi", "cfg", "config";
141 interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
142 #interrupt-cells = <1>;
143 interrupt-map-mask = <0 0 0 0>;
144 interrupt-map = <0 0 0 0 &gic GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
145 bus-range = <0x0 0xff>;
146 #address-cells = <3>;
149 ranges = <0x81000000 0 0 0x0 0xfc600000 0 0x00100000>,
150 <0x82000000 0 0xfc700000 0x0 0xfc700000 0 0x1900000>;
152 clocks = <&clkc CLKID_PCIE_PHY
153 &clkc CLKID_PCIE_COMB
154 &clkc CLKID_PCIE_PLL>;
155 clock-names = "general",
158 resets = <&reset RESET_PCIE_CTRL_A>,
159 <&reset RESET_PCIE_APB>;
160 reset-names = "port",
163 phys = <&usb3_pcie_phy PHY_TYPE_PCIE>;
168 ethmac: ethernet@ff3f0000 {
169 compatible = "amlogic,meson-g12a-dwmac",
172 reg = <0x0 0xff3f0000 0x0 0x10000>,
173 <0x0 0xff634540 0x0 0x8>;
174 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
175 interrupt-names = "macirq";
176 clocks = <&clkc CLKID_ETH>,
177 <&clkc CLKID_FCLK_DIV2>,
179 <&clkc CLKID_FCLK_DIV2>;
180 clock-names = "stmmaceth", "clkin0", "clkin1",
182 rx-fifo-depth = <4096>;
183 tx-fifo-depth = <2048>;
187 #address-cells = <1>;
189 compatible = "snps,dwmac-mdio";
194 compatible = "simple-bus";
195 reg = <0x0 0xff600000 0x0 0x200000>;
196 #address-cells = <2>;
198 ranges = <0x0 0x0 0x0 0xff600000 0x0 0x200000>;
201 compatible = "amlogic,meson-g12a-dw-hdmi";
202 reg = <0x0 0x0 0x0 0x10000>;
203 interrupts = <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>;
204 resets = <&reset RESET_HDMITX_CAPB3>,
205 <&reset RESET_HDMITX_PHY>,
206 <&reset RESET_HDMITX>;
207 reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy";
208 clocks = <&clkc CLKID_HDMI>,
209 <&clkc CLKID_HTX_PCLK>,
210 <&clkc CLKID_VPU_INTR>;
211 clock-names = "isfr", "iahb", "venci";
212 #address-cells = <1>;
214 #sound-dai-cells = <0>;
218 hdmi_tx_venc_port: port@0 {
221 hdmi_tx_in: endpoint {
222 remote-endpoint = <&hdmi_tx_out>;
227 hdmi_tx_tmds_port: port@1 {
232 apb_efuse: bus@30000 {
233 compatible = "simple-bus";
234 reg = <0x0 0x30000 0x0 0x2000>;
235 #address-cells = <2>;
237 ranges = <0x0 0x0 0x0 0x30000 0x0 0x2000>;
240 compatible = "amlogic,meson-rng";
241 reg = <0x0 0x218 0x0 0x4>;
242 clocks = <&clkc CLKID_RNG0>;
243 clock-names = "core";
247 acodec: audio-controller@32000 {
248 compatible = "amlogic,t9015";
249 reg = <0x0 0x32000 0x0 0x14>;
250 #sound-dai-cells = <0>;
251 sound-name-prefix = "ACODEC";
252 clocks = <&clkc CLKID_AUDIO_CODEC>;
253 clock-names = "pclk";
254 resets = <&reset RESET_AUDIO_CODEC>;
259 compatible = "simple-bus";
260 reg = <0x0 0x34400 0x0 0x400>;
261 #address-cells = <2>;
263 ranges = <0x0 0x0 0x0 0x34400 0x0 0x400>;
265 periphs_pinctrl: pinctrl@40 {
266 compatible = "amlogic,meson-g12a-periphs-pinctrl";
267 #address-cells = <2>;
272 reg = <0x0 0x40 0x0 0x4c>,
274 <0x0 0x120 0x0 0x18>,
275 <0x0 0x2c0 0x0 0x40>,
276 <0x0 0x340 0x0 0x1c>;
284 gpio-ranges = <&periphs_pinctrl 0 0 86>;
287 cec_ao_a_h_pins: cec_ao_a_h {
289 groups = "cec_ao_a_h";
290 function = "cec_ao_a_h";
295 cec_ao_b_h_pins: cec_ao_b_h {
297 groups = "cec_ao_b_h";
298 function = "cec_ao_b_h";
303 emmc_ctrl_pins: emmc-ctrl {
308 drive-strength-microamp = <4000>;
315 drive-strength-microamp = <4000>;
319 emmc_data_4b_pins: emmc-data-4b {
321 groups = "emmc_nand_d0",
327 drive-strength-microamp = <4000>;
331 emmc_data_8b_pins: emmc-data-8b {
333 groups = "emmc_nand_d0",
343 drive-strength-microamp = <4000>;
347 emmc_ds_pins: emmc-ds {
349 groups = "emmc_nand_ds";
352 drive-strength-microamp = <4000>;
356 emmc_clk_gate_pins: emmc_clk_gate {
359 function = "gpio_periphs";
361 drive-strength-microamp = <4000>;
365 hdmitx_ddc_pins: hdmitx_ddc {
367 groups = "hdmitx_sda",
371 drive-strength-microamp = <4000>;
375 hdmitx_hpd_pins: hdmitx_hpd {
377 groups = "hdmitx_hpd_in";
384 i2c0_sda_c_pins: i2c0-sda-c {
386 groups = "i2c0_sda_c";
389 drive-strength-microamp = <3000>;
394 i2c0_sck_c_pins: i2c0-sck-c {
396 groups = "i2c0_sck_c";
399 drive-strength-microamp = <3000>;
403 i2c0_sda_z0_pins: i2c0-sda-z0 {
405 groups = "i2c0_sda_z0";
408 drive-strength-microamp = <3000>;
412 i2c0_sck_z1_pins: i2c0-sck-z1 {
414 groups = "i2c0_sck_z1";
417 drive-strength-microamp = <3000>;
421 i2c0_sda_z7_pins: i2c0-sda-z7 {
423 groups = "i2c0_sda_z7";
426 drive-strength-microamp = <3000>;
430 i2c0_sda_z8_pins: i2c0-sda-z8 {
432 groups = "i2c0_sda_z8";
435 drive-strength-microamp = <3000>;
439 i2c1_sda_x_pins: i2c1-sda-x {
441 groups = "i2c1_sda_x";
444 drive-strength-microamp = <3000>;
448 i2c1_sck_x_pins: i2c1-sck-x {
450 groups = "i2c1_sck_x";
453 drive-strength-microamp = <3000>;
457 i2c1_sda_h2_pins: i2c1-sda-h2 {
459 groups = "i2c1_sda_h2";
462 drive-strength-microamp = <3000>;
466 i2c1_sck_h3_pins: i2c1-sck-h3 {
468 groups = "i2c1_sck_h3";
471 drive-strength-microamp = <3000>;
475 i2c1_sda_h6_pins: i2c1-sda-h6 {
477 groups = "i2c1_sda_h6";
480 drive-strength-microamp = <3000>;
484 i2c1_sck_h7_pins: i2c1-sck-h7 {
486 groups = "i2c1_sck_h7";
489 drive-strength-microamp = <3000>;
493 i2c2_sda_x_pins: i2c2-sda-x {
495 groups = "i2c2_sda_x";
498 drive-strength-microamp = <3000>;
502 i2c2_sck_x_pins: i2c2-sck-x {
504 groups = "i2c2_sck_x";
507 drive-strength-microamp = <3000>;
511 i2c2_sda_z_pins: i2c2-sda-z {
513 groups = "i2c2_sda_z";
516 drive-strength-microamp = <3000>;
520 i2c2_sck_z_pins: i2c2-sck-z {
522 groups = "i2c2_sck_z";
525 drive-strength-microamp = <3000>;
529 i2c3_sda_h_pins: i2c3-sda-h {
531 groups = "i2c3_sda_h";
534 drive-strength-microamp = <3000>;
538 i2c3_sck_h_pins: i2c3-sck-h {
540 groups = "i2c3_sck_h";
543 drive-strength-microamp = <3000>;
547 i2c3_sda_a_pins: i2c3-sda-a {
549 groups = "i2c3_sda_a";
552 drive-strength-microamp = <3000>;
556 i2c3_sck_a_pins: i2c3-sck-a {
558 groups = "i2c3_sck_a";
561 drive-strength-microamp = <3000>;
565 mclk0_a_pins: mclk0-a {
570 drive-strength-microamp = <3000>;
574 mclk1_a_pins: mclk1-a {
579 drive-strength-microamp = <3000>;
583 mclk1_x_pins: mclk1-x {
588 drive-strength-microamp = <3000>;
592 mclk1_z_pins: mclk1-z {
597 drive-strength-microamp = <3000>;
612 pdm_din0_a_pins: pdm-din0-a {
614 groups = "pdm_din0_a";
620 pdm_din0_c_pins: pdm-din0-c {
622 groups = "pdm_din0_c";
628 pdm_din0_x_pins: pdm-din0-x {
630 groups = "pdm_din0_x";
636 pdm_din0_z_pins: pdm-din0-z {
638 groups = "pdm_din0_z";
644 pdm_din1_a_pins: pdm-din1-a {
646 groups = "pdm_din1_a";
652 pdm_din1_c_pins: pdm-din1-c {
654 groups = "pdm_din1_c";
660 pdm_din1_x_pins: pdm-din1-x {
662 groups = "pdm_din1_x";
668 pdm_din1_z_pins: pdm-din1-z {
670 groups = "pdm_din1_z";
676 pdm_din2_a_pins: pdm-din2-a {
678 groups = "pdm_din2_a";
684 pdm_din2_c_pins: pdm-din2-c {
686 groups = "pdm_din2_c";
692 pdm_din2_x_pins: pdm-din2-x {
694 groups = "pdm_din2_x";
700 pdm_din2_z_pins: pdm-din2-z {
702 groups = "pdm_din2_z";
708 pdm_din3_a_pins: pdm-din3-a {
710 groups = "pdm_din3_a";
716 pdm_din3_c_pins: pdm-din3-c {
718 groups = "pdm_din3_c";
724 pdm_din3_x_pins: pdm-din3-x {
726 groups = "pdm_din3_x";
732 pdm_din3_z_pins: pdm-din3-z {
734 groups = "pdm_din3_z";
740 pdm_dclk_a_pins: pdm-dclk-a {
742 groups = "pdm_dclk_a";
745 drive-strength-microamp = <500>;
749 pdm_dclk_c_pins: pdm-dclk-c {
751 groups = "pdm_dclk_c";
754 drive-strength-microamp = <500>;
758 pdm_dclk_x_pins: pdm-dclk-x {
760 groups = "pdm_dclk_x";
763 drive-strength-microamp = <500>;
767 pdm_dclk_z_pins: pdm-dclk-z {
769 groups = "pdm_dclk_z";
772 drive-strength-microamp = <500>;
784 pwm_b_x7_pins: pwm-b-x7 {
792 pwm_b_x19_pins: pwm-b-x19 {
794 groups = "pwm_b_x19";
800 pwm_c_c_pins: pwm-c-c {
808 pwm_c_x5_pins: pwm-c-x5 {
816 pwm_c_x8_pins: pwm-c-x8 {
824 pwm_d_x3_pins: pwm-d-x3 {
832 pwm_d_x6_pins: pwm-d-x6 {
848 pwm_f_z_pins: pwm-f-z {
856 pwm_f_a_pins: pwm-f-a {
864 pwm_f_x_pins: pwm-f-x {
872 pwm_f_h_pins: pwm-f-h {
880 sdcard_c_pins: sdcard_c {
882 groups = "sdcard_d0_c",
889 drive-strength-microamp = <4000>;
893 groups = "sdcard_clk_c";
896 drive-strength-microamp = <4000>;
900 sdcard_clk_gate_c_pins: sdcard_clk_gate_c {
903 function = "gpio_periphs";
905 drive-strength-microamp = <4000>;
909 sdcard_z_pins: sdcard_z {
911 groups = "sdcard_d0_z",
918 drive-strength-microamp = <4000>;
922 groups = "sdcard_clk_z";
925 drive-strength-microamp = <4000>;
929 sdcard_clk_gate_z_pins: sdcard_clk_gate_z {
932 function = "gpio_periphs";
934 drive-strength-microamp = <4000>;
948 drive-strength-microamp = <4000>;
952 sdio_clk_gate_pins: sdio_clk_gate {
955 function = "gpio_periphs";
957 drive-strength-microamp = <4000>;
961 spdif_in_a10_pins: spdif-in-a10 {
963 groups = "spdif_in_a10";
964 function = "spdif_in";
969 spdif_in_a12_pins: spdif-in-a12 {
971 groups = "spdif_in_a12";
972 function = "spdif_in";
977 spdif_in_h_pins: spdif-in-h {
979 groups = "spdif_in_h";
980 function = "spdif_in";
985 spdif_out_h_pins: spdif-out-h {
987 groups = "spdif_out_h";
988 function = "spdif_out";
989 drive-strength-microamp = <500>;
994 spdif_out_a11_pins: spdif-out-a11 {
996 groups = "spdif_out_a11";
997 function = "spdif_out";
998 drive-strength-microamp = <500>;
1003 spdif_out_a13_pins: spdif-out-a13 {
1005 groups = "spdif_out_a13";
1006 function = "spdif_out";
1007 drive-strength-microamp = <500>;
1012 spicc0_x_pins: spicc0-x {
1014 groups = "spi0_mosi_x",
1018 drive-strength-microamp = <4000>;
1023 spicc0_ss0_x_pins: spicc0-ss0-x {
1025 groups = "spi0_ss0_x";
1027 drive-strength-microamp = <4000>;
1032 spicc0_c_pins: spicc0-c {
1034 groups = "spi0_mosi_c",
1039 drive-strength-microamp = <4000>;
1044 spicc1_pins: spicc1 {
1046 groups = "spi1_mosi",
1050 drive-strength-microamp = <4000>;
1054 spicc1_ss0_pins: spicc1-ss0 {
1056 groups = "spi1_ss0";
1058 drive-strength-microamp = <4000>;
1063 tdm_a_din0_pins: tdm-a-din0 {
1065 groups = "tdm_a_din0";
1072 tdm_a_din1_pins: tdm-a-din1 {
1074 groups = "tdm_a_din1";
1080 tdm_a_dout0_pins: tdm-a-dout0 {
1082 groups = "tdm_a_dout0";
1085 drive-strength-microamp = <3000>;
1089 tdm_a_dout1_pins: tdm-a-dout1 {
1091 groups = "tdm_a_dout1";
1094 drive-strength-microamp = <3000>;
1098 tdm_a_fs_pins: tdm-a-fs {
1100 groups = "tdm_a_fs";
1103 drive-strength-microamp = <3000>;
1107 tdm_a_sclk_pins: tdm-a-sclk {
1109 groups = "tdm_a_sclk";
1112 drive-strength-microamp = <3000>;
1116 tdm_a_slv_fs_pins: tdm-a-slv-fs {
1118 groups = "tdm_a_slv_fs";
1125 tdm_a_slv_sclk_pins: tdm-a-slv-sclk {
1127 groups = "tdm_a_slv_sclk";
1133 tdm_b_din0_pins: tdm-b-din0 {
1135 groups = "tdm_b_din0";
1141 tdm_b_din1_pins: tdm-b-din1 {
1143 groups = "tdm_b_din1";
1149 tdm_b_din2_pins: tdm-b-din2 {
1151 groups = "tdm_b_din2";
1157 tdm_b_din3_a_pins: tdm-b-din3-a {
1159 groups = "tdm_b_din3_a";
1165 tdm_b_din3_h_pins: tdm-b-din3-h {
1167 groups = "tdm_b_din3_h";
1173 tdm_b_dout0_pins: tdm-b-dout0 {
1175 groups = "tdm_b_dout0";
1178 drive-strength-microamp = <3000>;
1182 tdm_b_dout1_pins: tdm-b-dout1 {
1184 groups = "tdm_b_dout1";
1187 drive-strength-microamp = <3000>;
1191 tdm_b_dout2_pins: tdm-b-dout2 {
1193 groups = "tdm_b_dout2";
1196 drive-strength-microamp = <3000>;
1200 tdm_b_dout3_a_pins: tdm-b-dout3-a {
1202 groups = "tdm_b_dout3_a";
1205 drive-strength-microamp = <3000>;
1209 tdm_b_dout3_h_pins: tdm-b-dout3-h {
1211 groups = "tdm_b_dout3_h";
1214 drive-strength-microamp = <3000>;
1218 tdm_b_fs_pins: tdm-b-fs {
1220 groups = "tdm_b_fs";
1223 drive-strength-microamp = <3000>;
1227 tdm_b_sclk_pins: tdm-b-sclk {
1229 groups = "tdm_b_sclk";
1232 drive-strength-microamp = <3000>;
1236 tdm_b_slv_fs_pins: tdm-b-slv-fs {
1238 groups = "tdm_b_slv_fs";
1244 tdm_b_slv_sclk_pins: tdm-b-slv-sclk {
1246 groups = "tdm_b_slv_sclk";
1252 tdm_c_din0_a_pins: tdm-c-din0-a {
1254 groups = "tdm_c_din0_a";
1260 tdm_c_din0_z_pins: tdm-c-din0-z {
1262 groups = "tdm_c_din0_z";
1268 tdm_c_din1_a_pins: tdm-c-din1-a {
1270 groups = "tdm_c_din1_a";
1276 tdm_c_din1_z_pins: tdm-c-din1-z {
1278 groups = "tdm_c_din1_z";
1284 tdm_c_din2_a_pins: tdm-c-din2-a {
1286 groups = "tdm_c_din2_a";
1292 eth_leds_pins: eth-leds {
1294 groups = "eth_link_led",
1303 groups = "eth_mdio",
1313 drive-strength-microamp = <4000>;
1318 eth_rgmii_pins: eth-rgmii {
1320 groups = "eth_rxd2_rgmii",
1326 drive-strength-microamp = <4000>;
1331 tdm_c_din2_z_pins: tdm-c-din2-z {
1333 groups = "tdm_c_din2_z";
1339 tdm_c_din3_a_pins: tdm-c-din3-a {
1341 groups = "tdm_c_din3_a";
1347 tdm_c_din3_z_pins: tdm-c-din3-z {
1349 groups = "tdm_c_din3_z";
1355 tdm_c_dout0_a_pins: tdm-c-dout0-a {
1357 groups = "tdm_c_dout0_a";
1360 drive-strength-microamp = <3000>;
1364 tdm_c_dout0_z_pins: tdm-c-dout0-z {
1366 groups = "tdm_c_dout0_z";
1369 drive-strength-microamp = <3000>;
1373 tdm_c_dout1_a_pins: tdm-c-dout1-a {
1375 groups = "tdm_c_dout1_a";
1378 drive-strength-microamp = <3000>;
1382 tdm_c_dout1_z_pins: tdm-c-dout1-z {
1384 groups = "tdm_c_dout1_z";
1387 drive-strength-microamp = <3000>;
1391 tdm_c_dout2_a_pins: tdm-c-dout2-a {
1393 groups = "tdm_c_dout2_a";
1396 drive-strength-microamp = <3000>;
1400 tdm_c_dout2_z_pins: tdm-c-dout2-z {
1402 groups = "tdm_c_dout2_z";
1405 drive-strength-microamp = <3000>;
1409 tdm_c_dout3_a_pins: tdm-c-dout3-a {
1411 groups = "tdm_c_dout3_a";
1414 drive-strength-microamp = <3000>;
1418 tdm_c_dout3_z_pins: tdm-c-dout3-z {
1420 groups = "tdm_c_dout3_z";
1423 drive-strength-microamp = <3000>;
1427 tdm_c_fs_a_pins: tdm-c-fs-a {
1429 groups = "tdm_c_fs_a";
1432 drive-strength-microamp = <3000>;
1436 tdm_c_fs_z_pins: tdm-c-fs-z {
1438 groups = "tdm_c_fs_z";
1441 drive-strength-microamp = <3000>;
1445 tdm_c_sclk_a_pins: tdm-c-sclk-a {
1447 groups = "tdm_c_sclk_a";
1450 drive-strength-microamp = <3000>;
1454 tdm_c_sclk_z_pins: tdm-c-sclk-z {
1456 groups = "tdm_c_sclk_z";
1459 drive-strength-microamp = <3000>;
1463 tdm_c_slv_fs_a_pins: tdm-c-slv-fs-a {
1465 groups = "tdm_c_slv_fs_a";
1471 tdm_c_slv_fs_z_pins: tdm-c-slv-fs-z {
1473 groups = "tdm_c_slv_fs_z";
1479 tdm_c_slv_sclk_a_pins: tdm-c-slv-sclk-a {
1481 groups = "tdm_c_slv_sclk_a";
1487 tdm_c_slv_sclk_z_pins: tdm-c-slv-sclk-z {
1489 groups = "tdm_c_slv_sclk_z";
1495 uart_a_pins: uart-a {
1497 groups = "uart_a_tx",
1499 function = "uart_a";
1504 uart_a_cts_rts_pins: uart-a-cts-rts {
1506 groups = "uart_a_cts",
1508 function = "uart_a";
1513 uart_b_pins: uart-b {
1515 groups = "uart_b_tx",
1517 function = "uart_b";
1522 uart_c_pins: uart-c {
1524 groups = "uart_c_tx",
1526 function = "uart_c";
1531 uart_c_cts_rts_pins: uart-c-cts-rts {
1533 groups = "uart_c_cts",
1535 function = "uart_c";
1542 cpu_temp: temperature-sensor@34800 {
1543 compatible = "amlogic,g12a-cpu-thermal",
1544 "amlogic,g12a-thermal";
1545 reg = <0x0 0x34800 0x0 0x50>;
1546 interrupts = <GIC_SPI 35 IRQ_TYPE_EDGE_RISING>;
1547 clocks = <&clkc CLKID_TS>;
1548 #thermal-sensor-cells = <0>;
1549 amlogic,ao-secure = <&sec_AO>;
1552 ddr_temp: temperature-sensor@34c00 {
1553 compatible = "amlogic,g12a-ddr-thermal",
1554 "amlogic,g12a-thermal";
1555 reg = <0x0 0x34c00 0x0 0x50>;
1556 interrupts = <GIC_SPI 36 IRQ_TYPE_EDGE_RISING>;
1557 clocks = <&clkc CLKID_TS>;
1558 #thermal-sensor-cells = <0>;
1559 amlogic,ao-secure = <&sec_AO>;
1562 usb2_phy0: phy@36000 {
1563 compatible = "amlogic,g12a-usb2-phy";
1564 reg = <0x0 0x36000 0x0 0x2000>;
1566 clock-names = "xtal";
1567 resets = <&reset RESET_USB_PHY20>;
1568 reset-names = "phy";
1573 compatible = "simple-bus";
1574 #address-cells = <2>;
1576 ranges = <0x0 0x0 0x0 0x38000 0x0 0x2000>;
1578 canvas: video-lut@48 {
1579 compatible = "amlogic,canvas";
1580 reg = <0x0 0x48 0x0 0x14>;
1584 usb2_phy1: phy@3a000 {
1585 compatible = "amlogic,g12a-usb2-phy";
1586 reg = <0x0 0x3a000 0x0 0x2000>;
1588 clock-names = "xtal";
1589 resets = <&reset RESET_USB_PHY21>;
1590 reset-names = "phy";
1595 compatible = "simple-bus";
1596 reg = <0x0 0x3c000 0x0 0x1400>;
1597 #address-cells = <2>;
1599 ranges = <0x0 0x0 0x0 0x3c000 0x0 0x1400>;
1601 hhi: system-controller@0 {
1602 compatible = "amlogic,meson-gx-hhi-sysctrl",
1603 "simple-mfd", "syscon";
1604 reg = <0 0 0 0x400>;
1606 clkc: clock-controller {
1607 compatible = "amlogic,g12a-clkc";
1610 clock-names = "xtal";
1613 pwrc: power-controller {
1614 compatible = "amlogic,meson-g12a-pwrc";
1615 #power-domain-cells = <1>;
1616 amlogic,ao-sysctrl = <&rti>;
1617 resets = <&reset RESET_VIU>,
1618 <&reset RESET_VENC>,
1619 <&reset RESET_VCBUS>,
1620 <&reset RESET_BT656>,
1621 <&reset RESET_RDMA>,
1622 <&reset RESET_VENCI>,
1623 <&reset RESET_VENCP>,
1624 <&reset RESET_VDAC>,
1625 <&reset RESET_VDI6>,
1626 <&reset RESET_VENCL>,
1627 <&reset RESET_VID_LOCK>;
1628 reset-names = "viu", "venc", "vcbus", "bt656",
1629 "rdma", "venci", "vencp", "vdac",
1630 "vdi6", "vencl", "vid_lock";
1631 clocks = <&clkc CLKID_VPU>,
1633 clock-names = "vpu", "vapb";
1635 * VPU clocking is provided by two identical clock paths
1636 * VPU_0 and VPU_1 muxed to a single clock by a glitch
1637 * free mux to safely change frequency while running.
1638 * Same for VAPB but with a final gate after the glitch free mux.
1640 assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
1641 <&clkc CLKID_VPU_0>,
1642 <&clkc CLKID_VPU>, /* Glitch free mux */
1643 <&clkc CLKID_VAPB_0_SEL>,
1644 <&clkc CLKID_VAPB_0>,
1645 <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */
1646 assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
1647 <0>, /* Do Nothing */
1648 <&clkc CLKID_VPU_0>,
1649 <&clkc CLKID_FCLK_DIV4>,
1650 <0>, /* Do Nothing */
1651 <&clkc CLKID_VAPB_0>;
1652 assigned-clock-rates = <0>, /* Do Nothing */
1654 <0>, /* Do Nothing */
1655 <0>, /* Do Nothing */
1657 <0>; /* Do Nothing */
1662 usb3_pcie_phy: phy@46000 {
1663 compatible = "amlogic,g12a-usb3-pcie-phy";
1664 reg = <0x0 0x46000 0x0 0x2000>;
1665 clocks = <&clkc CLKID_PCIE_PLL>;
1666 clock-names = "ref_clk";
1667 resets = <&reset RESET_PCIE_PHY>;
1668 reset-names = "phy";
1669 assigned-clocks = <&clkc CLKID_PCIE_PLL>;
1670 assigned-clock-rates = <100000000>;
1674 eth_phy: mdio-multiplexer@4c000 {
1675 compatible = "amlogic,g12a-mdio-mux";
1676 reg = <0x0 0x4c000 0x0 0xa4>;
1677 clocks = <&clkc CLKID_ETH_PHY>,
1679 <&clkc CLKID_MPLL_50M>;
1680 clock-names = "pclk", "clkin0", "clkin1";
1681 mdio-parent-bus = <&mdio0>;
1682 #address-cells = <1>;
1687 #address-cells = <1>;
1693 #address-cells = <1>;
1696 internal_ephy: ethernet-phy@8 {
1697 compatible = "ethernet-phy-id0180.3301",
1698 "ethernet-phy-ieee802.3-c22";
1699 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
1707 aobus: bus@ff800000 {
1708 compatible = "simple-bus";
1709 reg = <0x0 0xff800000 0x0 0x100000>;
1710 #address-cells = <2>;
1712 ranges = <0x0 0x0 0x0 0xff800000 0x0 0x100000>;
1715 compatible = "amlogic,meson-gx-ao-sysctrl",
1716 "simple-mfd", "syscon";
1717 reg = <0x0 0x0 0x0 0x100>;
1718 #address-cells = <2>;
1720 ranges = <0x0 0x0 0x0 0x0 0x0 0x100>;
1722 clkc_AO: clock-controller {
1723 compatible = "amlogic,meson-g12a-aoclkc";
1726 clocks = <&xtal>, <&clkc CLKID_CLK81>;
1727 clock-names = "xtal", "mpeg-clk";
1730 ao_pinctrl: pinctrl@14 {
1731 compatible = "amlogic,meson-g12a-aobus-pinctrl";
1732 #address-cells = <2>;
1737 reg = <0x0 0x14 0x0 0x8>,
1739 <0x0 0x24 0x0 0x14>;
1745 gpio-ranges = <&ao_pinctrl 0 0 15>;
1748 i2c_ao_sck_pins: i2c_ao_sck_pins {
1750 groups = "i2c_ao_sck";
1751 function = "i2c_ao";
1753 drive-strength-microamp = <3000>;
1757 i2c_ao_sda_pins: i2c_ao_sda {
1759 groups = "i2c_ao_sda";
1760 function = "i2c_ao";
1762 drive-strength-microamp = <3000>;
1766 i2c_ao_sck_e_pins: i2c_ao_sck_e {
1768 groups = "i2c_ao_sck_e";
1769 function = "i2c_ao";
1771 drive-strength-microamp = <3000>;
1775 i2c_ao_sda_e_pins: i2c_ao_sda_e {
1777 groups = "i2c_ao_sda_e";
1778 function = "i2c_ao";
1780 drive-strength-microamp = <3000>;
1784 mclk0_ao_pins: mclk0-ao {
1786 groups = "mclk0_ao";
1787 function = "mclk0_ao";
1789 drive-strength-microamp = <3000>;
1793 tdm_ao_b_din0_pins: tdm-ao-b-din0 {
1795 groups = "tdm_ao_b_din0";
1796 function = "tdm_ao_b";
1801 spdif_ao_out_pins: spdif-ao-out {
1803 groups = "spdif_ao_out";
1804 function = "spdif_ao_out";
1805 drive-strength-microamp = <500>;
1810 tdm_ao_b_din1_pins: tdm-ao-b-din1 {
1812 groups = "tdm_ao_b_din1";
1813 function = "tdm_ao_b";
1818 tdm_ao_b_din2_pins: tdm-ao-b-din2 {
1820 groups = "tdm_ao_b_din2";
1821 function = "tdm_ao_b";
1826 tdm_ao_b_dout0_pins: tdm-ao-b-dout0 {
1828 groups = "tdm_ao_b_dout0";
1829 function = "tdm_ao_b";
1831 drive-strength-microamp = <3000>;
1835 tdm_ao_b_dout1_pins: tdm-ao-b-dout1 {
1837 groups = "tdm_ao_b_dout1";
1838 function = "tdm_ao_b";
1840 drive-strength-microamp = <3000>;
1844 tdm_ao_b_dout2_pins: tdm-ao-b-dout2 {
1846 groups = "tdm_ao_b_dout2";
1847 function = "tdm_ao_b";
1849 drive-strength-microamp = <3000>;
1853 tdm_ao_b_fs_pins: tdm-ao-b-fs {
1855 groups = "tdm_ao_b_fs";
1856 function = "tdm_ao_b";
1858 drive-strength-microamp = <3000>;
1862 tdm_ao_b_sclk_pins: tdm-ao-b-sclk {
1864 groups = "tdm_ao_b_sclk";
1865 function = "tdm_ao_b";
1867 drive-strength-microamp = <3000>;
1871 tdm_ao_b_slv_fs_pins: tdm-ao-b-slv-fs {
1873 groups = "tdm_ao_b_slv_fs";
1874 function = "tdm_ao_b";
1879 tdm_ao_b_slv_sclk_pins: tdm-ao-b-slv-sclk {
1881 groups = "tdm_ao_b_slv_sclk";
1882 function = "tdm_ao_b";
1887 uart_ao_a_pins: uart-a-ao {
1889 groups = "uart_ao_a_tx",
1891 function = "uart_ao_a";
1896 uart_ao_a_cts_rts_pins: uart-ao-a-cts-rts {
1898 groups = "uart_ao_a_cts",
1900 function = "uart_ao_a";
1905 uart_ao_b_2_3_pins: uart-ao-b-2-3 {
1907 groups = "uart_ao_b_tx_2",
1909 function = "uart_ao_b";
1914 uart_ao_b_8_9_pins: uart-ao-b-8-9 {
1916 groups = "uart_ao_b_tx_8",
1918 function = "uart_ao_b";
1923 uart_ao_b_cts_rts_pins: uart-ao-b-cts-rts {
1925 groups = "uart_ao_b_cts",
1927 function = "uart_ao_b";
1932 pwm_a_e_pins: pwm-a-e {
1935 function = "pwm_a_e";
1940 pwm_ao_a_pins: pwm-ao-a {
1942 groups = "pwm_ao_a";
1943 function = "pwm_ao_a";
1948 pwm_ao_b_pins: pwm-ao-b {
1950 groups = "pwm_ao_b";
1951 function = "pwm_ao_b";
1956 pwm_ao_c_4_pins: pwm-ao-c-4 {
1958 groups = "pwm_ao_c_4";
1959 function = "pwm_ao_c";
1964 pwm_ao_c_6_pins: pwm-ao-c-6 {
1966 groups = "pwm_ao_c_6";
1967 function = "pwm_ao_c";
1972 pwm_ao_d_5_pins: pwm-ao-d-5 {
1974 groups = "pwm_ao_d_5";
1975 function = "pwm_ao_d";
1980 pwm_ao_d_10_pins: pwm-ao-d-10 {
1982 groups = "pwm_ao_d_10";
1983 function = "pwm_ao_d";
1988 pwm_ao_d_e_pins: pwm-ao-d-e {
1990 groups = "pwm_ao_d_e";
1991 function = "pwm_ao_d";
1995 remote_input_ao_pins: remote-input-ao {
1997 groups = "remote_ao_input";
1998 function = "remote_ao_input";
2006 compatible = "amlogic,meson-vrtc";
2007 reg = <0x0 0x000a8 0x0 0x4>;
2011 compatible = "amlogic,meson-gx-ao-cec";
2012 reg = <0x0 0x00100 0x0 0x14>;
2013 interrupts = <GIC_SPI 199 IRQ_TYPE_EDGE_RISING>;
2014 clocks = <&clkc_AO CLKID_AO_CEC>;
2015 clock-names = "core";
2016 status = "disabled";
2019 sec_AO: ao-secure@140 {
2020 compatible = "amlogic,meson-gx-ao-secure", "syscon";
2021 reg = <0x0 0x140 0x0 0x140>;
2022 amlogic,has-chip-id;
2026 compatible = "amlogic,meson-g12a-ao-cec";
2027 reg = <0x0 0x00280 0x0 0x1c>;
2028 interrupts = <GIC_SPI 203 IRQ_TYPE_EDGE_RISING>;
2029 clocks = <&clkc_AO CLKID_AO_CTS_OSCIN>;
2030 clock-names = "oscin";
2031 status = "disabled";
2034 pwm_AO_cd: pwm@2000 {
2035 compatible = "amlogic,meson-g12a-ao-pwm-cd";
2036 reg = <0x0 0x2000 0x0 0x20>;
2038 status = "disabled";
2041 uart_AO: serial@3000 {
2042 compatible = "amlogic,meson-gx-uart",
2043 "amlogic,meson-ao-uart";
2044 reg = <0x0 0x3000 0x0 0x18>;
2045 interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
2046 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART>, <&xtal>;
2047 clock-names = "xtal", "pclk", "baud";
2048 status = "disabled";
2051 uart_AO_B: serial@4000 {
2052 compatible = "amlogic,meson-gx-uart",
2053 "amlogic,meson-ao-uart";
2054 reg = <0x0 0x4000 0x0 0x18>;
2055 interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
2056 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>;
2057 clock-names = "xtal", "pclk", "baud";
2058 status = "disabled";
2062 compatible = "amlogic,meson-axg-i2c";
2063 status = "disabled";
2064 reg = <0x0 0x05000 0x0 0x20>;
2065 interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
2066 #address-cells = <1>;
2068 clocks = <&clkc CLKID_I2C>;
2071 pwm_AO_ab: pwm@7000 {
2072 compatible = "amlogic,meson-g12a-ao-pwm-ab";
2073 reg = <0x0 0x7000 0x0 0x20>;
2075 status = "disabled";
2079 compatible = "amlogic,meson-gxbb-ir";
2080 reg = <0x0 0x8000 0x0 0x20>;
2081 interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
2082 status = "disabled";
2086 compatible = "amlogic,meson-g12a-saradc",
2087 "amlogic,meson-saradc";
2088 reg = <0x0 0x9000 0x0 0x48>;
2089 #io-channel-cells = <1>;
2090 interrupts = <GIC_SPI 200 IRQ_TYPE_EDGE_RISING>;
2092 <&clkc_AO CLKID_AO_SAR_ADC>,
2093 <&clkc_AO CLKID_AO_SAR_ADC_CLK>,
2094 <&clkc_AO CLKID_AO_SAR_ADC_SEL>;
2095 clock-names = "clkin", "core", "adc_clk", "adc_sel";
2096 status = "disabled";
2100 vdec: video-decoder@ff620000 {
2101 compatible = "amlogic,g12a-vdec";
2102 reg = <0x0 0xff620000 0x0 0x10000>,
2103 <0x0 0xffd0e180 0x0 0xe4>;
2104 reg-names = "dos", "esparser";
2105 interrupts = <GIC_SPI 44 IRQ_TYPE_EDGE_RISING>,
2106 <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>;
2107 interrupt-names = "vdec", "esparser";
2109 amlogic,ao-sysctrl = <&rti>;
2110 amlogic,canvas = <&canvas>;
2112 clocks = <&clkc CLKID_PARSER>,
2114 <&clkc CLKID_VDEC_1>,
2115 <&clkc CLKID_VDEC_HEVC>,
2116 <&clkc CLKID_VDEC_HEVCF>;
2117 clock-names = "dos_parser", "dos", "vdec_1",
2118 "vdec_hevc", "vdec_hevcf";
2119 resets = <&reset RESET_PARSER>;
2120 reset-names = "esparser";
2124 compatible = "amlogic,meson-g12a-vpu";
2125 reg = <0x0 0xff900000 0x0 0x100000>,
2126 <0x0 0xff63c000 0x0 0x1000>;
2127 reg-names = "vpu", "hhi";
2128 interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
2129 #address-cells = <1>;
2131 amlogic,canvas = <&canvas>;
2133 /* CVBS VDAC output port */
2134 cvbs_vdac_port: port@0 {
2138 /* HDMI-TX output port */
2139 hdmi_tx_port: port@1 {
2142 hdmi_tx_out: endpoint {
2143 remote-endpoint = <&hdmi_tx_in>;
2148 gic: interrupt-controller@ffc01000 {
2149 compatible = "arm,gic-400";
2150 reg = <0x0 0xffc01000 0 0x1000>,
2151 <0x0 0xffc02000 0 0x2000>,
2152 <0x0 0xffc04000 0 0x2000>,
2153 <0x0 0xffc06000 0 0x2000>;
2154 interrupt-controller;
2155 interrupts = <GIC_PPI 9
2156 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
2157 #interrupt-cells = <3>;
2158 #address-cells = <0>;
2161 cbus: bus@ffd00000 {
2162 compatible = "simple-bus";
2163 reg = <0x0 0xffd00000 0x0 0x100000>;
2164 #address-cells = <2>;
2166 ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x100000>;
2168 reset: reset-controller@1004 {
2169 compatible = "amlogic,meson-axg-reset";
2170 reg = <0x0 0x1004 0x0 0x9c>;
2174 gpio_intc: interrupt-controller@f080 {
2175 compatible = "amlogic,meson-g12a-gpio-intc",
2176 "amlogic,meson-gpio-intc";
2177 reg = <0x0 0xf080 0x0 0x10>;
2178 interrupt-controller;
2179 #interrupt-cells = <2>;
2180 amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
2183 watchdog: watchdog@f0d0 {
2184 compatible = "amlogic,meson-gxbb-wdt";
2185 reg = <0x0 0xf0d0 0x0 0x10>;
2190 compatible = "amlogic,meson-g12a-spicc";
2191 reg = <0x0 0x13000 0x0 0x44>;
2192 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
2193 clocks = <&clkc CLKID_SPICC0>,
2194 <&clkc CLKID_SPICC0_SCLK>;
2195 clock-names = "core", "pclk";
2196 #address-cells = <1>;
2198 status = "disabled";
2202 compatible = "amlogic,meson-g12a-spicc";
2203 reg = <0x0 0x15000 0x0 0x44>;
2204 interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
2205 clocks = <&clkc CLKID_SPICC1>,
2206 <&clkc CLKID_SPICC1_SCLK>;
2207 clock-names = "core", "pclk";
2208 #address-cells = <1>;
2210 status = "disabled";
2214 compatible = "amlogic,meson-gxbb-spifc";
2215 status = "disabled";
2216 reg = <0x0 0x14000 0x0 0x80>;
2217 #address-cells = <1>;
2219 clocks = <&clkc CLKID_CLK81>;
2223 compatible = "amlogic,meson-g12a-ee-pwm";
2224 reg = <0x0 0x19000 0x0 0x20>;
2226 status = "disabled";
2230 compatible = "amlogic,meson-g12a-ee-pwm";
2231 reg = <0x0 0x1a000 0x0 0x20>;
2233 status = "disabled";
2237 compatible = "amlogic,meson-g12a-ee-pwm";
2238 reg = <0x0 0x1b000 0x0 0x20>;
2240 status = "disabled";
2244 compatible = "amlogic,meson-axg-i2c";
2245 status = "disabled";
2246 reg = <0x0 0x1c000 0x0 0x20>;
2247 interrupts = <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>;
2248 #address-cells = <1>;
2250 clocks = <&clkc CLKID_I2C>;
2254 compatible = "amlogic,meson-axg-i2c";
2255 status = "disabled";
2256 reg = <0x0 0x1d000 0x0 0x20>;
2257 interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
2258 #address-cells = <1>;
2260 clocks = <&clkc CLKID_I2C>;
2264 compatible = "amlogic,meson-axg-i2c";
2265 status = "disabled";
2266 reg = <0x0 0x1e000 0x0 0x20>;
2267 interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;
2268 #address-cells = <1>;
2270 clocks = <&clkc CLKID_I2C>;
2274 compatible = "amlogic,meson-axg-i2c";
2275 status = "disabled";
2276 reg = <0x0 0x1f000 0x0 0x20>;
2277 interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
2278 #address-cells = <1>;
2280 clocks = <&clkc CLKID_I2C>;
2283 clk_msr: clock-measure@18000 {
2284 compatible = "amlogic,meson-g12a-clk-measure";
2285 reg = <0x0 0x18000 0x0 0x10>;
2288 uart_C: serial@22000 {
2289 compatible = "amlogic,meson-gx-uart";
2290 reg = <0x0 0x22000 0x0 0x18>;
2291 interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
2292 clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>;
2293 clock-names = "xtal", "pclk", "baud";
2294 status = "disabled";
2297 uart_B: serial@23000 {
2298 compatible = "amlogic,meson-gx-uart";
2299 reg = <0x0 0x23000 0x0 0x18>;
2300 interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
2301 clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
2302 clock-names = "xtal", "pclk", "baud";
2303 status = "disabled";
2306 uart_A: serial@24000 {
2307 compatible = "amlogic,meson-gx-uart";
2308 reg = <0x0 0x24000 0x0 0x18>;
2309 interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
2310 clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
2311 clock-names = "xtal", "pclk", "baud";
2312 status = "disabled";
2317 sd_emmc_a: sd@ffe03000 {
2318 compatible = "amlogic,meson-axg-mmc";
2319 reg = <0x0 0xffe03000 0x0 0x800>;
2320 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
2321 status = "disabled";
2322 clocks = <&clkc CLKID_SD_EMMC_A>,
2323 <&clkc CLKID_SD_EMMC_A_CLK0>,
2324 <&clkc CLKID_FCLK_DIV2>;
2325 clock-names = "core", "clkin0", "clkin1";
2326 resets = <&reset RESET_SD_EMMC_A>;
2329 sd_emmc_b: sd@ffe05000 {
2330 compatible = "amlogic,meson-axg-mmc";
2331 reg = <0x0 0xffe05000 0x0 0x800>;
2332 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
2333 status = "disabled";
2334 clocks = <&clkc CLKID_SD_EMMC_B>,
2335 <&clkc CLKID_SD_EMMC_B_CLK0>,
2336 <&clkc CLKID_FCLK_DIV2>;
2337 clock-names = "core", "clkin0", "clkin1";
2338 resets = <&reset RESET_SD_EMMC_B>;
2341 sd_emmc_c: mmc@ffe07000 {
2342 compatible = "amlogic,meson-axg-mmc";
2343 reg = <0x0 0xffe07000 0x0 0x800>;
2344 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
2345 status = "disabled";
2346 clocks = <&clkc CLKID_SD_EMMC_C>,
2347 <&clkc CLKID_SD_EMMC_C_CLK0>,
2348 <&clkc CLKID_FCLK_DIV2>;
2349 clock-names = "core", "clkin0", "clkin1";
2350 resets = <&reset RESET_SD_EMMC_C>;
2354 status = "disabled";
2355 compatible = "amlogic,meson-g12a-usb-ctrl";
2356 reg = <0x0 0xffe09000 0x0 0xa0>;
2357 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
2358 #address-cells = <2>;
2362 clocks = <&clkc CLKID_USB>;
2363 resets = <&reset RESET_USB>;
2367 phys = <&usb2_phy0>, <&usb2_phy1>,
2368 <&usb3_pcie_phy PHY_TYPE_USB3>;
2369 phy-names = "usb2-phy0", "usb2-phy1", "usb3-phy0";
2371 dwc2: usb@ff400000 {
2372 compatible = "amlogic,meson-g12a-usb", "snps,dwc2";
2373 reg = <0x0 0xff400000 0x0 0x40000>;
2374 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
2375 clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
2376 clock-names = "otg";
2377 phys = <&usb2_phy1>;
2378 phy-names = "usb2-phy";
2379 dr_mode = "peripheral";
2380 g-rx-fifo-size = <192>;
2381 g-np-tx-fifo-size = <128>;
2382 g-tx-fifo-size = <128 128 16 16 16>;
2385 dwc3: usb@ff500000 {
2386 compatible = "snps,dwc3";
2387 reg = <0x0 0xff500000 0x0 0x100000>;
2388 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
2390 snps,dis_u2_susphy_quirk;
2391 snps,quirk-frame-length-adjustment = <0x20>;
2392 snps,parkmode-disable-ss-quirk;
2396 mali: gpu@ffe40000 {
2397 compatible = "amlogic,meson-g12a-mali", "arm,mali-bifrost";
2398 reg = <0x0 0xffe40000 0x0 0x40000>;
2399 interrupt-parent = <&gic>;
2400 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
2401 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
2402 <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>;
2403 interrupt-names = "job", "mmu", "gpu";
2404 clocks = <&clkc CLKID_MALI>;
2405 resets = <&reset RESET_DVALIN_CAPB3>, <&reset RESET_DVALIN>;
2406 operating-points-v2 = <&gpu_opp_table>;
2407 #cooling-cells = <2>;
2412 cpu_thermal: cpu-thermal {
2413 polling-delay = <1000>;
2414 polling-delay-passive = <100>;
2415 thermal-sensors = <&cpu_temp>;
2418 cpu_passive: cpu-passive {
2419 temperature = <85000>; /* millicelsius */
2420 hysteresis = <2000>; /* millicelsius */
2425 temperature = <95000>; /* millicelsius */
2426 hysteresis = <2000>; /* millicelsius */
2430 cpu_critical: cpu-critical {
2431 temperature = <110000>; /* millicelsius */
2432 hysteresis = <2000>; /* millicelsius */
2438 ddr_thermal: ddr-thermal {
2439 polling-delay = <1000>;
2440 polling-delay-passive = <100>;
2441 thermal-sensors = <&ddr_temp>;
2444 ddr_passive: ddr-passive {
2445 temperature = <85000>; /* millicelsius */
2446 hysteresis = <2000>; /* millicelsius */
2450 ddr_critical: ddr-critical {
2451 temperature = <110000>; /* millicelsius */
2452 hysteresis = <2000>; /* millicelsius */
2459 trip = <&ddr_passive>;
2460 cooling-device = <&mali THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
2467 compatible = "arm,armv8-timer";
2468 interrupts = <GIC_PPI 13
2469 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
2471 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
2473 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
2475 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
2476 arm,no-tick-in-suspend;
2480 compatible = "fixed-clock";
2481 clock-frequency = <24000000>;
2482 clock-output-names = "xtal";