1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2017 Amlogic, Inc. All rights reserved.
6 #include <dt-bindings/clock/axg-aoclkc.h>
7 #include <dt-bindings/clock/axg-audio-clkc.h>
8 #include <dt-bindings/clock/axg-clkc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/gpio/meson-axg-gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
14 #include <dt-bindings/reset/amlogic,meson-axg-reset.h>
17 compatible = "amlogic,meson-axg";
19 interrupt-parent = <&gic>;
23 tdmif_a: audio-controller-0 {
24 compatible = "amlogic,axg-tdm-iface";
25 #sound-dai-cells = <0>;
26 sound-name-prefix = "TDM_A";
27 clocks = <&clkc_audio AUD_CLKID_MST_A_MCLK>,
28 <&clkc_audio AUD_CLKID_MST_A_SCLK>,
29 <&clkc_audio AUD_CLKID_MST_A_LRCLK>;
30 clock-names = "mclk", "sclk", "lrclk";
34 tdmif_b: audio-controller-1 {
35 compatible = "amlogic,axg-tdm-iface";
36 #sound-dai-cells = <0>;
37 sound-name-prefix = "TDM_B";
38 clocks = <&clkc_audio AUD_CLKID_MST_B_MCLK>,
39 <&clkc_audio AUD_CLKID_MST_B_SCLK>,
40 <&clkc_audio AUD_CLKID_MST_B_LRCLK>;
41 clock-names = "mclk", "sclk", "lrclk";
45 tdmif_c: audio-controller-2 {
46 compatible = "amlogic,axg-tdm-iface";
47 #sound-dai-cells = <0>;
48 sound-name-prefix = "TDM_C";
49 clocks = <&clkc_audio AUD_CLKID_MST_C_MCLK>,
50 <&clkc_audio AUD_CLKID_MST_C_SCLK>,
51 <&clkc_audio AUD_CLKID_MST_C_LRCLK>;
52 clock-names = "mclk", "sclk", "lrclk";
57 compatible = "arm,cortex-a53-pmu";
58 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
59 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
60 <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
61 <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
62 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
66 #address-cells = <0x2>;
71 compatible = "arm,cortex-a53";
73 enable-method = "psci";
74 next-level-cache = <&l2>;
75 clocks = <&scpi_dvfs 0>;
80 compatible = "arm,cortex-a53";
82 enable-method = "psci";
83 next-level-cache = <&l2>;
84 clocks = <&scpi_dvfs 0>;
89 compatible = "arm,cortex-a53";
91 enable-method = "psci";
92 next-level-cache = <&l2>;
93 clocks = <&scpi_dvfs 0>;
98 compatible = "arm,cortex-a53";
100 enable-method = "psci";
101 next-level-cache = <&l2>;
102 clocks = <&scpi_dvfs 0>;
106 compatible = "cache";
111 compatible = "amlogic,meson-gxbb-sm";
115 compatible = "amlogic,meson-gxbb-efuse";
116 clocks = <&clkc CLKID_EFUSE>;
117 #address-cells = <1>;
123 compatible = "arm,psci-1.0";
128 #address-cells = <2>;
132 /* 16 MiB reserved for Hardware ROM Firmware */
133 hwrom_reserved: hwrom@0 {
134 reg = <0x0 0x0 0x0 0x1000000>;
138 /* Alternate 3 MiB reserved for ARM Trusted Firmware (BL31) */
139 secmon_reserved: secmon@5000000 {
140 reg = <0x0 0x05000000 0x0 0x300000>;
146 compatible = "arm,scpi-pre-1.0";
147 mboxes = <&mailbox 1 &mailbox 2>;
148 shmem = <&cpu_scp_lpri &cpu_scp_hpri>;
150 scpi_clocks: clocks {
151 compatible = "arm,scpi-clocks";
153 scpi_dvfs: clocks-0 {
154 compatible = "arm,scpi-dvfs-clocks";
157 clock-output-names = "vcpu";
161 scpi_sensors: sensors {
162 compatible = "amlogic,meson-gxbb-scpi-sensors", "arm,scpi-sensors";
163 #thermal-sensor-cells = <1>;
168 compatible = "simple-bus";
169 #address-cells = <2>;
173 ethmac: ethernet@ff3f0000 {
174 compatible = "amlogic,meson-axg-dwmac",
177 reg = <0x0 0xff3f0000 0x0 0x10000>,
178 <0x0 0xff634540 0x0 0x8>;
179 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
180 interrupt-names = "macirq";
181 clocks = <&clkc CLKID_ETH>,
182 <&clkc CLKID_FCLK_DIV2>,
184 clock-names = "stmmaceth", "clkin0", "clkin1";
185 rx-fifo-depth = <4096>;
186 tx-fifo-depth = <2048>;
190 pdm: audio-controller@ff632000 {
191 compatible = "amlogic,axg-pdm";
192 reg = <0x0 0xff632000 0x0 0x34>;
193 #sound-dai-cells = <0>;
194 sound-name-prefix = "PDM";
195 clocks = <&clkc_audio AUD_CLKID_PDM>,
196 <&clkc_audio AUD_CLKID_PDM_DCLK>,
197 <&clkc_audio AUD_CLKID_PDM_SYSCLK>;
198 clock-names = "pclk", "dclk", "sysclk";
202 periphs: bus@ff634000 {
203 compatible = "simple-bus";
204 reg = <0x0 0xff634000 0x0 0x2000>;
205 #address-cells = <2>;
207 ranges = <0x0 0x0 0x0 0xff634000 0x0 0x2000>;
210 compatible = "amlogic,meson-rng";
211 reg = <0x0 0x18 0x0 0x4>;
212 clocks = <&clkc CLKID_RNG0>;
213 clock-names = "core";
216 pinctrl_periphs: pinctrl@480 {
217 compatible = "amlogic,meson-axg-periphs-pinctrl";
218 #address-cells = <2>;
223 reg = <0x0 0x00480 0x0 0x40>,
224 <0x0 0x004e8 0x0 0x14>,
225 <0x0 0x00520 0x0 0x14>,
226 <0x0 0x00430 0x0 0x3c>;
227 reg-names = "mux", "pull", "pull-enable", "gpio";
230 gpio-ranges = <&pinctrl_periphs 0 0 86>;
242 i2c1_x_pins: i2c1_x {
244 groups = "i2c1_sck_x",
251 i2c1_z_pins: i2c1_z {
253 groups = "i2c1_sck_z",
260 i2c2_a_pins: i2c2_a {
262 groups = "i2c2_sck_a",
269 i2c2_x_pins: i2c2_x {
271 groups = "i2c2_sck_x",
278 i2c3_a6_pins: i2c3_a6 {
280 groups = "i2c3_sda_a6",
287 i2c3_a12_pins: i2c3_a12 {
289 groups = "i2c3_sda_a12",
296 i2c3_a19_pins: i2c3_a19 {
298 groups = "i2c3_sda_a19",
307 groups = "emmc_nand_d0",
327 emmc_ds_pins: emmc_ds {
335 emmc_clk_gate_pins: emmc_clk_gate {
338 function = "gpio_periphs";
343 eth_rgmii_x_pins: eth-x-rgmii {
345 groups = "eth_mdio_x",
347 "eth_rgmii_rx_clk_x",
364 eth_rgmii_y_pins: eth-y-rgmii {
366 groups = "eth_mdio_y",
368 "eth_rgmii_rx_clk_y",
385 eth_rmii_x_pins: eth-x-rmii {
387 groups = "eth_mdio_x",
389 "eth_rgmii_rx_clk_x",
401 eth_rmii_y_pins: eth-y-rmii {
403 groups = "eth_mdio_y",
405 "eth_rgmii_rx_clk_y",
417 mclk_b_pins: mclk_b {
425 mclk_c_pins: mclk_c {
433 pdm_dclk_a14_pins: pdm_dclk_a14 {
435 groups = "pdm_dclk_a14";
441 pdm_dclk_a19_pins: pdm_dclk_a19 {
443 groups = "pdm_dclk_a19";
449 pdm_din0_pins: pdm_din0 {
457 pdm_din1_pins: pdm_din1 {
465 pdm_din2_pins: pdm_din2 {
473 pdm_din3_pins: pdm_din3 {
481 pwm_a_a_pins: pwm_a_a {
489 pwm_a_x18_pins: pwm_a_x18 {
491 groups = "pwm_a_x18";
497 pwm_a_x20_pins: pwm_a_x20 {
499 groups = "pwm_a_x20";
505 pwm_a_z_pins: pwm_a_z {
513 pwm_b_a_pins: pwm_b_a {
521 pwm_b_x_pins: pwm_b_x {
529 pwm_b_z_pins: pwm_b_z {
537 pwm_c_a_pins: pwm_c_a {
545 pwm_c_x10_pins: pwm_c_x10 {
547 groups = "pwm_c_x10";
553 pwm_c_x17_pins: pwm_c_x17 {
555 groups = "pwm_c_x17";
561 pwm_d_x11_pins: pwm_d_x11 {
563 groups = "pwm_d_x11";
569 pwm_d_x16_pins: pwm_d_x16 {
571 groups = "pwm_d_x16";
595 sdio_clk_gate_pins: sdio_clk_gate {
598 function = "gpio_periphs";
603 spdif_in_z_pins: spdif_in_z {
605 groups = "spdif_in_z";
606 function = "spdif_in";
611 spdif_in_a1_pins: spdif_in_a1 {
613 groups = "spdif_in_a1";
614 function = "spdif_in";
619 spdif_in_a7_pins: spdif_in_a7 {
621 groups = "spdif_in_a7";
622 function = "spdif_in";
627 spdif_in_a19_pins: spdif_in_a19 {
629 groups = "spdif_in_a19";
630 function = "spdif_in";
635 spdif_in_a20_pins: spdif_in_a20 {
637 groups = "spdif_in_a20";
638 function = "spdif_in";
643 spdif_out_a1_pins: spdif_out_a1 {
645 groups = "spdif_out_a1";
646 function = "spdif_out";
651 spdif_out_a11_pins: spdif_out_a11 {
653 groups = "spdif_out_a11";
654 function = "spdif_out";
659 spdif_out_a19_pins: spdif_out_a19 {
661 groups = "spdif_out_a19";
662 function = "spdif_out";
667 spdif_out_a20_pins: spdif_out_a20 {
669 groups = "spdif_out_a20";
670 function = "spdif_out";
675 spdif_out_z_pins: spdif_out_z {
677 groups = "spdif_out_z";
678 function = "spdif_out";
685 groups = "spi0_miso",
693 spi0_ss0_pins: spi0_ss0 {
701 spi0_ss1_pins: spi0_ss1 {
709 spi0_ss2_pins: spi0_ss2 {
717 spi1_a_pins: spi1_a {
719 groups = "spi1_miso_a",
727 spi1_ss0_a_pins: spi1_ss0_a {
729 groups = "spi1_ss0_a";
735 spi1_ss1_pins: spi1_ss1 {
743 spi1_x_pins: spi1_x {
745 groups = "spi1_miso_x",
753 spi1_ss0_x_pins: spi1_ss0_x {
755 groups = "spi1_ss0_x";
761 tdma_din0_pins: tdma_din0 {
763 groups = "tdma_din0";
769 tdma_dout0_x14_pins: tdma_dout0_x14 {
771 groups = "tdma_dout0_x14";
777 tdma_dout0_x15_pins: tdma_dout0_x15 {
779 groups = "tdma_dout0_x15";
785 tdma_dout1_pins: tdma_dout1 {
787 groups = "tdma_dout1";
793 tdma_din1_pins: tdma_din1 {
795 groups = "tdma_din1";
801 tdma_fs_pins: tdma_fs {
809 tdma_fs_slv_pins: tdma_fs_slv {
811 groups = "tdma_fs_slv";
817 tdma_sclk_pins: tdma_sclk {
819 groups = "tdma_sclk";
825 tdma_sclk_slv_pins: tdma_sclk_slv {
827 groups = "tdma_sclk_slv";
833 tdmb_din0_pins: tdmb_din0 {
835 groups = "tdmb_din0";
841 tdmb_din1_pins: tdmb_din1 {
843 groups = "tdmb_din1";
849 tdmb_din2_pins: tdmb_din2 {
851 groups = "tdmb_din2";
857 tdmb_din3_pins: tdmb_din3 {
859 groups = "tdmb_din3";
865 tdmb_dout0_pins: tdmb_dout0 {
867 groups = "tdmb_dout0";
873 tdmb_dout1_pins: tdmb_dout1 {
875 groups = "tdmb_dout1";
881 tdmb_dout2_pins: tdmb_dout2 {
883 groups = "tdmb_dout2";
889 tdmb_dout3_pins: tdmb_dout3 {
891 groups = "tdmb_dout3";
897 tdmb_fs_pins: tdmb_fs {
905 tdmb_fs_slv_pins: tdmb_fs_slv {
907 groups = "tdmb_fs_slv";
913 tdmb_sclk_pins: tdmb_sclk {
915 groups = "tdmb_sclk";
921 tdmb_sclk_slv_pins: tdmb_sclk_slv {
923 groups = "tdmb_sclk_slv";
929 tdmc_fs_pins: tdmc_fs {
937 tdmc_fs_slv_pins: tdmc_fs_slv {
939 groups = "tdmc_fs_slv";
945 tdmc_sclk_pins: tdmc_sclk {
947 groups = "tdmc_sclk";
953 tdmc_sclk_slv_pins: tdmc_sclk_slv {
955 groups = "tdmc_sclk_slv";
961 tdmc_din0_pins: tdmc_din0 {
963 groups = "tdmc_din0";
969 tdmc_din1_pins: tdmc_din1 {
971 groups = "tdmc_din1";
977 tdmc_din2_pins: tdmc_din2 {
979 groups = "tdmc_din2";
985 tdmc_din3_pins: tdmc_din3 {
987 groups = "tdmc_din3";
993 tdmc_dout0_pins: tdmc_dout0 {
995 groups = "tdmc_dout0";
1001 tdmc_dout1_pins: tdmc_dout1 {
1003 groups = "tdmc_dout1";
1009 tdmc_dout2_pins: tdmc_dout2 {
1011 groups = "tdmc_dout2";
1017 tdmc_dout3_pins: tdmc_dout3 {
1019 groups = "tdmc_dout3";
1025 uart_a_pins: uart_a {
1027 groups = "uart_tx_a",
1029 function = "uart_a";
1034 uart_a_cts_rts_pins: uart_a_cts_rts {
1036 groups = "uart_cts_a",
1038 function = "uart_a";
1043 uart_b_x_pins: uart_b_x {
1045 groups = "uart_tx_b_x",
1047 function = "uart_b";
1052 uart_b_x_cts_rts_pins: uart_b_x_cts_rts {
1054 groups = "uart_cts_b_x",
1056 function = "uart_b";
1061 uart_b_z_pins: uart_b_z {
1063 groups = "uart_tx_b_z",
1065 function = "uart_b";
1070 uart_b_z_cts_rts_pins: uart_b_z_cts_rts {
1072 groups = "uart_cts_b_z",
1074 function = "uart_b";
1079 uart_ao_b_z_pins: uart_ao_b_z {
1081 groups = "uart_ao_tx_b_z",
1083 function = "uart_ao_b_z";
1088 uart_ao_b_z_cts_rts_pins: uart_ao_b_z_cts_rts {
1090 groups = "uart_ao_cts_b_z",
1092 function = "uart_ao_b_z";
1099 hiubus: bus@ff63c000 {
1100 compatible = "simple-bus";
1101 reg = <0x0 0xff63c000 0x0 0x1c00>;
1102 #address-cells = <2>;
1104 ranges = <0x0 0x0 0x0 0xff63c000 0x0 0x1c00>;
1106 sysctrl: system-controller@0 {
1107 compatible = "amlogic,meson-axg-hhi-sysctrl",
1108 "simple-mfd", "syscon";
1109 reg = <0 0 0 0x400>;
1111 clkc: clock-controller {
1112 compatible = "amlogic,axg-clkc";
1115 clock-names = "xtal";
1120 mailbox: mailbox@ff63c404 {
1121 compatible = "amlogic,meson-gxbb-mhu";
1122 reg = <0 0xff63c404 0 0x4c>;
1123 interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>,
1124 <GIC_SPI 209 IRQ_TYPE_EDGE_RISING>,
1125 <GIC_SPI 210 IRQ_TYPE_EDGE_RISING>;
1129 audio: bus@ff642000 {
1130 compatible = "simple-bus";
1131 reg = <0x0 0xff642000 0x0 0x2000>;
1132 #address-cells = <2>;
1134 ranges = <0x0 0x0 0x0 0xff642000 0x0 0x2000>;
1136 clkc_audio: clock-controller@0 {
1137 compatible = "amlogic,axg-audio-clkc";
1138 reg = <0x0 0x0 0x0 0xb4>;
1141 clocks = <&clkc CLKID_AUDIO>,
1142 <&clkc CLKID_MPLL0>,
1143 <&clkc CLKID_MPLL1>,
1144 <&clkc CLKID_MPLL2>,
1145 <&clkc CLKID_MPLL3>,
1146 <&clkc CLKID_HIFI_PLL>,
1147 <&clkc CLKID_FCLK_DIV3>,
1148 <&clkc CLKID_FCLK_DIV4>,
1149 <&clkc CLKID_GP0_PLL>;
1150 clock-names = "pclk",
1160 resets = <&reset RESET_AUDIO>;
1163 toddr_a: audio-controller@100 {
1164 compatible = "amlogic,axg-toddr";
1165 reg = <0x0 0x100 0x0 0x2c>;
1166 #sound-dai-cells = <0>;
1167 sound-name-prefix = "TODDR_A";
1168 interrupts = <GIC_SPI 84 IRQ_TYPE_EDGE_RISING>;
1169 clocks = <&clkc_audio AUD_CLKID_TODDR_A>;
1170 resets = <&arb AXG_ARB_TODDR_A>;
1171 status = "disabled";
1174 toddr_b: audio-controller@140 {
1175 compatible = "amlogic,axg-toddr";
1176 reg = <0x0 0x140 0x0 0x2c>;
1177 #sound-dai-cells = <0>;
1178 sound-name-prefix = "TODDR_B";
1179 interrupts = <GIC_SPI 85 IRQ_TYPE_EDGE_RISING>;
1180 clocks = <&clkc_audio AUD_CLKID_TODDR_B>;
1181 resets = <&arb AXG_ARB_TODDR_B>;
1182 status = "disabled";
1185 toddr_c: audio-controller@180 {
1186 compatible = "amlogic,axg-toddr";
1187 reg = <0x0 0x180 0x0 0x2c>;
1188 #sound-dai-cells = <0>;
1189 sound-name-prefix = "TODDR_C";
1190 interrupts = <GIC_SPI 86 IRQ_TYPE_EDGE_RISING>;
1191 clocks = <&clkc_audio AUD_CLKID_TODDR_C>;
1192 resets = <&arb AXG_ARB_TODDR_C>;
1193 status = "disabled";
1196 frddr_a: audio-controller@1c0 {
1197 compatible = "amlogic,axg-frddr";
1198 reg = <0x0 0x1c0 0x0 0x2c>;
1199 #sound-dai-cells = <0>;
1200 sound-name-prefix = "FRDDR_A";
1201 interrupts = <GIC_SPI 88 IRQ_TYPE_EDGE_RISING>;
1202 clocks = <&clkc_audio AUD_CLKID_FRDDR_A>;
1203 resets = <&arb AXG_ARB_FRDDR_A>;
1204 status = "disabled";
1207 frddr_b: audio-controller@200 {
1208 compatible = "amlogic,axg-frddr";
1209 reg = <0x0 0x200 0x0 0x2c>;
1210 #sound-dai-cells = <0>;
1211 sound-name-prefix = "FRDDR_B";
1212 interrupts = <GIC_SPI 89 IRQ_TYPE_EDGE_RISING>;
1213 clocks = <&clkc_audio AUD_CLKID_FRDDR_B>;
1214 resets = <&arb AXG_ARB_FRDDR_B>;
1215 status = "disabled";
1218 frddr_c: audio-controller@240 {
1219 compatible = "amlogic,axg-frddr";
1220 reg = <0x0 0x240 0x0 0x2c>;
1221 #sound-dai-cells = <0>;
1222 sound-name-prefix = "FRDDR_C";
1223 interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>;
1224 clocks = <&clkc_audio AUD_CLKID_FRDDR_C>;
1225 resets = <&arb AXG_ARB_FRDDR_C>;
1226 status = "disabled";
1229 arb: reset-controller@280 {
1230 compatible = "amlogic,meson-axg-audio-arb";
1231 reg = <0x0 0x280 0x0 0x4>;
1233 clocks = <&clkc_audio AUD_CLKID_DDR_ARB>;
1236 tdmin_a: audio-controller@300 {
1237 compatible = "amlogic,axg-tdmin";
1238 reg = <0x0 0x300 0x0 0x40>;
1239 sound-name-prefix = "TDMIN_A";
1240 clocks = <&clkc_audio AUD_CLKID_TDMIN_A>,
1241 <&clkc_audio AUD_CLKID_TDMIN_A_SCLK>,
1242 <&clkc_audio AUD_CLKID_TDMIN_A_SCLK_SEL>,
1243 <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>,
1244 <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>;
1245 clock-names = "pclk", "sclk", "sclk_sel",
1246 "lrclk", "lrclk_sel";
1247 status = "disabled";
1250 tdmin_b: audio-controller@340 {
1251 compatible = "amlogic,axg-tdmin";
1252 reg = <0x0 0x340 0x0 0x40>;
1253 sound-name-prefix = "TDMIN_B";
1254 clocks = <&clkc_audio AUD_CLKID_TDMIN_B>,
1255 <&clkc_audio AUD_CLKID_TDMIN_B_SCLK>,
1256 <&clkc_audio AUD_CLKID_TDMIN_B_SCLK_SEL>,
1257 <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>,
1258 <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>;
1259 clock-names = "pclk", "sclk", "sclk_sel",
1260 "lrclk", "lrclk_sel";
1261 status = "disabled";
1264 tdmin_c: audio-controller@380 {
1265 compatible = "amlogic,axg-tdmin";
1266 reg = <0x0 0x380 0x0 0x40>;
1267 sound-name-prefix = "TDMIN_C";
1268 clocks = <&clkc_audio AUD_CLKID_TDMIN_C>,
1269 <&clkc_audio AUD_CLKID_TDMIN_C_SCLK>,
1270 <&clkc_audio AUD_CLKID_TDMIN_C_SCLK_SEL>,
1271 <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>,
1272 <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>;
1273 clock-names = "pclk", "sclk", "sclk_sel",
1274 "lrclk", "lrclk_sel";
1275 status = "disabled";
1278 tdmin_lb: audio-controller@3c0 {
1279 compatible = "amlogic,axg-tdmin";
1280 reg = <0x0 0x3c0 0x0 0x40>;
1281 sound-name-prefix = "TDMIN_LB";
1282 clocks = <&clkc_audio AUD_CLKID_TDMIN_LB>,
1283 <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK>,
1284 <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK_SEL>,
1285 <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>,
1286 <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>;
1287 clock-names = "pclk", "sclk", "sclk_sel",
1288 "lrclk", "lrclk_sel";
1289 status = "disabled";
1292 spdifin: audio-controller@400 {
1293 compatible = "amlogic,axg-spdifin";
1294 reg = <0x0 0x400 0x0 0x30>;
1295 #sound-dai-cells = <0>;
1296 sound-name-prefix = "SPDIFIN";
1297 interrupts = <GIC_SPI 87 IRQ_TYPE_EDGE_RISING>;
1298 clocks = <&clkc_audio AUD_CLKID_SPDIFIN>,
1299 <&clkc_audio AUD_CLKID_SPDIFIN_CLK>;
1300 clock-names = "pclk", "refclk";
1301 status = "disabled";
1304 spdifout: audio-controller@480 {
1305 compatible = "amlogic,axg-spdifout";
1306 reg = <0x0 0x480 0x0 0x50>;
1307 #sound-dai-cells = <0>;
1308 sound-name-prefix = "SPDIFOUT";
1309 clocks = <&clkc_audio AUD_CLKID_SPDIFOUT>,
1310 <&clkc_audio AUD_CLKID_SPDIFOUT_CLK>;
1311 clock-names = "pclk", "mclk";
1312 status = "disabled";
1315 tdmout_a: audio-controller@500 {
1316 compatible = "amlogic,axg-tdmout";
1317 reg = <0x0 0x500 0x0 0x40>;
1318 sound-name-prefix = "TDMOUT_A";
1319 clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>,
1320 <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>,
1321 <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>,
1322 <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>,
1323 <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>;
1324 clock-names = "pclk", "sclk", "sclk_sel",
1325 "lrclk", "lrclk_sel";
1326 status = "disabled";
1329 tdmout_b: audio-controller@540 {
1330 compatible = "amlogic,axg-tdmout";
1331 reg = <0x0 0x540 0x0 0x40>;
1332 sound-name-prefix = "TDMOUT_B";
1333 clocks = <&clkc_audio AUD_CLKID_TDMOUT_B>,
1334 <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK>,
1335 <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK_SEL>,
1336 <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>,
1337 <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>;
1338 clock-names = "pclk", "sclk", "sclk_sel",
1339 "lrclk", "lrclk_sel";
1340 status = "disabled";
1343 tdmout_c: audio-controller@580 {
1344 compatible = "amlogic,axg-tdmout";
1345 reg = <0x0 0x580 0x0 0x40>;
1346 sound-name-prefix = "TDMOUT_C";
1347 clocks = <&clkc_audio AUD_CLKID_TDMOUT_C>,
1348 <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK>,
1349 <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK_SEL>,
1350 <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>,
1351 <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>;
1352 clock-names = "pclk", "sclk", "sclk_sel",
1353 "lrclk", "lrclk_sel";
1354 status = "disabled";
1358 aobus: bus@ff800000 {
1359 compatible = "simple-bus";
1360 reg = <0x0 0xff800000 0x0 0x100000>;
1361 #address-cells = <2>;
1363 ranges = <0x0 0x0 0x0 0xff800000 0x0 0x100000>;
1365 sysctrl_AO: sys-ctrl@0 {
1366 compatible = "amlogic,meson-axg-ao-sysctrl", "simple-mfd", "syscon";
1367 reg = <0x0 0x0 0x0 0x100>;
1369 clkc_AO: clock-controller {
1370 compatible = "amlogic,meson-axg-aoclkc";
1373 clocks = <&xtal>, <&clkc CLKID_CLK81>;
1374 clock-names = "xtal", "mpeg-clk";
1378 pinctrl_aobus: pinctrl@14 {
1379 compatible = "amlogic,meson-axg-aobus-pinctrl";
1380 #address-cells = <2>;
1385 reg = <0x0 0x00014 0x0 0x8>,
1386 <0x0 0x0002c 0x0 0x4>,
1387 <0x0 0x00024 0x0 0x8>;
1388 reg-names = "mux", "pull", "gpio";
1391 gpio-ranges = <&pinctrl_aobus 0 0 15>;
1394 i2c_ao_sck_4_pins: i2c_ao_sck_4 {
1396 groups = "i2c_ao_sck_4";
1397 function = "i2c_ao";
1402 i2c_ao_sck_8_pins: i2c_ao_sck_8 {
1404 groups = "i2c_ao_sck_8";
1405 function = "i2c_ao";
1410 i2c_ao_sck_10_pins: i2c_ao_sck_10 {
1412 groups = "i2c_ao_sck_10";
1413 function = "i2c_ao";
1418 i2c_ao_sda_5_pins: i2c_ao_sda_5 {
1420 groups = "i2c_ao_sda_5";
1421 function = "i2c_ao";
1426 i2c_ao_sda_9_pins: i2c_ao_sda_9 {
1428 groups = "i2c_ao_sda_9";
1429 function = "i2c_ao";
1434 i2c_ao_sda_11_pins: i2c_ao_sda_11 {
1436 groups = "i2c_ao_sda_11";
1437 function = "i2c_ao";
1442 remote_input_ao_pins: remote_input_ao {
1444 groups = "remote_input_ao";
1445 function = "remote_input_ao";
1450 uart_ao_a_pins: uart_ao_a {
1452 groups = "uart_ao_tx_a",
1454 function = "uart_ao_a";
1459 uart_ao_a_cts_rts_pins: uart_ao_a_cts_rts {
1461 groups = "uart_ao_cts_a",
1463 function = "uart_ao_a";
1468 uart_ao_b_pins: uart_ao_b {
1470 groups = "uart_ao_tx_b",
1472 function = "uart_ao_b";
1477 uart_ao_b_cts_rts_pins: uart_ao_b_cts_rts {
1479 groups = "uart_ao_cts_b",
1481 function = "uart_ao_b";
1487 sec_AO: ao-secure@140 {
1488 compatible = "amlogic,meson-gx-ao-secure", "syscon";
1489 reg = <0x0 0x140 0x0 0x140>;
1490 amlogic,has-chip-id;
1493 pwm_AO_cd: pwm@2000 {
1494 compatible = "amlogic,meson-axg-ao-pwm";
1495 reg = <0x0 0x02000 0x0 0x20>;
1497 status = "disabled";
1500 uart_AO: serial@3000 {
1501 compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
1502 reg = <0x0 0x3000 0x0 0x18>;
1503 interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
1504 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>;
1505 clock-names = "xtal", "pclk", "baud";
1506 status = "disabled";
1509 uart_AO_B: serial@4000 {
1510 compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
1511 reg = <0x0 0x4000 0x0 0x18>;
1512 interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
1513 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>;
1514 clock-names = "xtal", "pclk", "baud";
1515 status = "disabled";
1519 compatible = "amlogic,meson-axg-i2c";
1520 reg = <0x0 0x05000 0x0 0x20>;
1521 interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
1522 clocks = <&clkc CLKID_AO_I2C>;
1523 #address-cells = <1>;
1525 status = "disabled";
1528 pwm_AO_ab: pwm@7000 {
1529 compatible = "amlogic,meson-axg-ao-pwm";
1530 reg = <0x0 0x07000 0x0 0x20>;
1532 status = "disabled";
1536 compatible = "amlogic,meson-gxbb-ir";
1537 reg = <0x0 0x8000 0x0 0x20>;
1538 interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
1539 status = "disabled";
1543 compatible = "amlogic,meson-axg-saradc",
1544 "amlogic,meson-saradc";
1545 reg = <0x0 0x9000 0x0 0x38>;
1546 #io-channel-cells = <1>;
1547 interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
1549 <&clkc_AO CLKID_AO_SAR_ADC>,
1550 <&clkc_AO CLKID_AO_SAR_ADC_CLK>,
1551 <&clkc_AO CLKID_AO_SAR_ADC_SEL>;
1552 clock-names = "clkin", "core", "adc_clk", "adc_sel";
1553 status = "disabled";
1557 gic: interrupt-controller@ffc01000 {
1558 compatible = "arm,gic-400";
1559 reg = <0x0 0xffc01000 0 0x1000>,
1560 <0x0 0xffc02000 0 0x2000>,
1561 <0x0 0xffc04000 0 0x2000>,
1562 <0x0 0xffc06000 0 0x2000>;
1563 interrupt-controller;
1564 interrupts = <GIC_PPI 9
1565 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
1566 #interrupt-cells = <3>;
1567 #address-cells = <0>;
1570 cbus: bus@ffd00000 {
1571 compatible = "simple-bus";
1572 reg = <0x0 0xffd00000 0x0 0x25000>;
1573 #address-cells = <2>;
1575 ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x25000>;
1577 reset: reset-controller@1004 {
1578 compatible = "amlogic,meson-axg-reset";
1579 reg = <0x0 0x01004 0x0 0x9c>;
1583 gpio_intc: interrupt-controller@f080 {
1584 compatible = "amlogic,meson-axg-gpio-intc",
1585 "amlogic,meson-gpio-intc";
1586 reg = <0x0 0xf080 0x0 0x10>;
1587 interrupt-controller;
1588 #interrupt-cells = <2>;
1589 amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
1593 compatible = "amlogic,meson-gxbb-wdt";
1594 reg = <0x0 0xf0d0 0x0 0x10>;
1599 compatible = "amlogic,meson-axg-ee-pwm";
1600 reg = <0x0 0x1b000 0x0 0x20>;
1602 status = "disabled";
1606 compatible = "amlogic,meson-axg-ee-pwm";
1607 reg = <0x0 0x1a000 0x0 0x20>;
1609 status = "disabled";
1613 compatible = "amlogic,meson-axg-spicc";
1614 reg = <0x0 0x13000 0x0 0x3c>;
1615 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
1616 clocks = <&clkc CLKID_SPICC0>;
1617 clock-names = "core";
1618 #address-cells = <1>;
1620 status = "disabled";
1624 compatible = "amlogic,meson-axg-spicc";
1625 reg = <0x0 0x15000 0x0 0x3c>;
1626 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
1627 clocks = <&clkc CLKID_SPICC1>;
1628 clock-names = "core";
1629 #address-cells = <1>;
1631 status = "disabled";
1634 clk_msr: clock-measure@18000 {
1635 compatible = "amlogic,meson-axg-clk-measure";
1636 reg = <0x0 0x18000 0x0 0x10>;
1640 compatible = "amlogic,meson-axg-i2c";
1641 reg = <0x0 0x1c000 0x0 0x20>;
1642 interrupts = <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>;
1643 clocks = <&clkc CLKID_I2C>;
1644 #address-cells = <1>;
1646 status = "disabled";
1650 compatible = "amlogic,meson-axg-i2c";
1651 reg = <0x0 0x1d000 0x0 0x20>;
1652 interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
1653 clocks = <&clkc CLKID_I2C>;
1654 #address-cells = <1>;
1656 status = "disabled";
1660 compatible = "amlogic,meson-axg-i2c";
1661 reg = <0x0 0x1e000 0x0 0x20>;
1662 interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;
1663 clocks = <&clkc CLKID_I2C>;
1664 #address-cells = <1>;
1666 status = "disabled";
1670 compatible = "amlogic,meson-axg-i2c";
1671 reg = <0x0 0x1f000 0x0 0x20>;
1672 interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
1673 clocks = <&clkc CLKID_I2C>;
1674 #address-cells = <1>;
1676 status = "disabled";
1679 uart_B: serial@23000 {
1680 compatible = "amlogic,meson-gx-uart";
1681 reg = <0x0 0x23000 0x0 0x18>;
1682 interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
1683 status = "disabled";
1684 clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
1685 clock-names = "xtal", "pclk", "baud";
1688 uart_A: serial@24000 {
1689 compatible = "amlogic,meson-gx-uart";
1690 reg = <0x0 0x24000 0x0 0x18>;
1691 interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
1692 status = "disabled";
1693 clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
1694 clock-names = "xtal", "pclk", "baud";
1699 compatible = "simple-bus";
1700 reg = <0x0 0xffe00000 0x0 0x200000>;
1701 #address-cells = <2>;
1703 ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x200000>;
1705 sd_emmc_b: sd@5000 {
1706 compatible = "amlogic,meson-axg-mmc";
1707 reg = <0x0 0x5000 0x0 0x800>;
1708 interrupts = <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>;
1709 status = "disabled";
1710 clocks = <&clkc CLKID_SD_EMMC_B>,
1711 <&clkc CLKID_SD_EMMC_B_CLK0>,
1712 <&clkc CLKID_FCLK_DIV2>;
1713 clock-names = "core", "clkin0", "clkin1";
1714 resets = <&reset RESET_SD_EMMC_B>;
1717 sd_emmc_c: mmc@7000 {
1718 compatible = "amlogic,meson-axg-mmc";
1719 reg = <0x0 0x7000 0x0 0x800>;
1720 interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>;
1721 status = "disabled";
1722 clocks = <&clkc CLKID_SD_EMMC_C>,
1723 <&clkc CLKID_SD_EMMC_C_CLK0>,
1724 <&clkc CLKID_FCLK_DIV2>;
1725 clock-names = "core", "clkin0", "clkin1";
1726 resets = <&reset RESET_SD_EMMC_C>;
1730 sram: sram@fffc0000 {
1731 compatible = "mmio-sram";
1732 reg = <0x0 0xfffc0000 0x0 0x20000>;
1733 #address-cells = <1>;
1735 ranges = <0 0x0 0xfffc0000 0x20000>;
1737 cpu_scp_lpri: scp-sram@13000 {
1738 compatible = "amlogic,meson-axg-scp-shmem";
1739 reg = <0x13000 0x400>;
1742 cpu_scp_hpri: scp-sram@13400 {
1743 compatible = "amlogic,meson-axg-scp-shmem";
1744 reg = <0x13400 0x400>;
1750 compatible = "arm,armv8-timer";
1751 interrupts = <GIC_PPI 13
1752 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
1754 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
1756 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
1758 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
1762 compatible = "fixed-clock";
1763 clock-frequency = <24000000>;
1764 clock-output-names = "xtal";