arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright Altera Corporation (C) 2015. All rights reserved.
   4  */
   5
   6 #include "socfpga_stratix10.dtsi"
   7
   8 / {
   9         model = "SoCFPGA Stratix 10 SoCDK";
  10         compatible = "altr,socfpga-stratix10-socdk", "altr,socfpga-stratix10";
  11
  12         aliases {
  13                 serial0 = &uart0;
  14                 ethernet0 = &gmac0;
  15                 ethernet1 = &gmac1;
  16                 ethernet2 = &gmac2;
  17         };
  18
  19         chosen {
  20                 stdout-path = "serial0:115200n8";
  21         };
  22
  23         leds {
  24                 compatible = "gpio-leds";
  25                 led-hps0 {
  26                         label = "hps_led0";
  27                         gpios = <&portb 20 GPIO_ACTIVE_HIGH>;
  28                 };
  29
  30                 led-hps1 {
  31                         label = "hps_led1";
  32                         gpios = <&portb 19 GPIO_ACTIVE_HIGH>;
  33                 };
  34
  35                 led-hps2 {
  36                         label = "hps_led2";
  37                         gpios = <&portb 21 GPIO_ACTIVE_HIGH>;
  38                 };
  39         };
  40
  41         memory@80000000 {
  42                 device_type = "memory";
  43                 /* We expect the bootloader to fill in the reg */
  44                 reg = <0 0x80000000 0 0>;
  45         };
  46
  47         ref_033v: regulator-v-ref {
  48                 compatible = "regulator-fixed";
  49                 regulator-name = "0.33V";
  50                 regulator-min-microvolt = <330000>;
  51                 regulator-max-microvolt = <330000>;
  52         };
  53
  54         soc {
  55                 eccmgr {
  56                         sdmmca-ecc@ff8c8c00 {
  57                                 compatible = "altr,socfpga-s10-sdmmc-ecc",
  58                                              "altr,socfpga-sdmmc-ecc";
  59                                 reg = <0xff8c8c00 0x100>;
  60                                 altr,ecc-parent = <&mmc>;
  61                                 interrupts = <14 4>,
  62                                              <15 4>;
  63                         };
  64                 };
  65         };
  66 };
  67
  68 &pinctrl0 {
  69         i2c1_pmx_func: i2c1-pmx-func {
  70                 pinctrl-single,pins = <
  71                         0x78   0x4   /* I2C1_SDA (IO6-B) PIN30SEL) */
  72                         0x7c   0x4   /* I2C1_SCL (IO7-B) PIN31SEL */
  73                 >;
  74         };
  75
  76         i2c1_pmx_func_gpio: i2c1-pmx-func-gpio {
  77                 pinctrl-single,pins = <
  78                         0x78   0x8   /* I2C1_SDA (IO6-B) PIN30SEL) */
  79                         0x7c   0x8   /* I2C1_SCL (IO7-B) PIN31SEL */
  80                 >;
  81         };
  82 };
  83
  84 &gpio1 {
  85         status = "okay";
  86 };
  87
  88 &gmac0 {
  89         status = "okay";
  90         phy-mode = "rgmii";
  91         phy-handle = <&phy0>;
  92
  93         max-frame-size = <9000>;
  94
  95         mdio0 {
  96                 #address-cells = <1>;
  97                 #size-cells = <0>;
  98                 compatible = "snps,dwmac-mdio";
  99                 phy0: ethernet-phy@0 {
 100                         reg = <4>;
 101
 102                         txd0-skew-ps = <0>; /* -420ps */
 103                         txd1-skew-ps = <0>; /* -420ps */
 104                         txd2-skew-ps = <0>; /* -420ps */
 105                         txd3-skew-ps = <0>; /* -420ps */
 106                         rxd0-skew-ps = <420>; /* 0ps */
 107                         rxd1-skew-ps = <420>; /* 0ps */
 108                         rxd2-skew-ps = <420>; /* 0ps */
 109                         rxd3-skew-ps = <420>; /* 0ps */
 110                         txen-skew-ps = <0>; /* -420ps */
 111                         txc-skew-ps = <900>; /* 0ps */
 112                         rxdv-skew-ps = <420>; /* 0ps */
 113                         rxc-skew-ps = <1680>; /* 780ps */
 114                 };
 115         };
 116 };
 117
 118 &mmc {
 119         status = "okay";
 120         cap-sd-highspeed;
 121         cap-mmc-highspeed;
 122         broken-cd;
 123         bus-width = <4>;
 124         clk-phase-sd-hs = <0>, <135>;
 125 };
 126
 127 &osc1 {
 128         clock-frequency = <25000000>;
 129 };
 130
 131 &uart0 {
 132         status = "okay";
 133 };
 134
 135 &usb0 {
 136         status = "okay";
 137         disable-over-current;
 138 };
 139
 140 &watchdog0 {
 141         status = "okay";
 142 };
 143
 144 &i2c1 {
 145         status = "okay";
 146         clock-frequency = <100000>;
 147         i2c-sda-falling-time-ns = <890>;  /* hcnt */
 148         i2c-scl-falling-time-ns = <890>;  /* lcnt */
 149
 150         pinctrl-names = "default", "gpio";
 151         pinctrl-0 = <&i2c1_pmx_func>;
 152         pinctrl-1 = <&i2c1_pmx_func_gpio>;
 153
 154         scl-gpios = <&portb 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
 155         sda-gpios = <&portb 7 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
 156
 157         adc@14 {
 158                 compatible = "lltc,ltc2497";
 159                 reg = <0x14>;
 160                 vref-supply = <&ref_033v>;
 161         };
 162
 163         temp@4c {
 164                 compatible = "maxim,max1619";
 165                 reg = <0x4c>;
 166         };
 167
 168         eeprom@51 {
 169                 compatible = "atmel,24c32";
 170                 reg = <0x51>;
 171                 pagesize = <32>;
 172         };
 173
 174         rtc@68 {
 175                 compatible = "dallas,ds1339";
 176                 reg = <0x68>;
 177         };
 178 };
 179
 180 &qspi {
 181         status = "okay";
 182         flash@0 {
 183                 #address-cells = <1>;
 184                 #size-cells = <1>;
 185                 compatible = "micron,mt25qu02g", "jedec,spi-nor";
 186                 reg = <0>;
 187                 spi-max-frequency = <100000000>;
 188
 189                 m25p,fast-read;
 190                 cdns,page-size = <256>;
 191                 cdns,block-size = <16>;
 192                 cdns,read-delay = <1>;
 193                 cdns,tshsl-ns = <50>;
 194                 cdns,tsd2d-ns = <50>;
 195                 cdns,tchsh-ns = <4>;
 196                 cdns,tslch-ns = <4>;
 197
 198                 partitions {
 199                         compatible = "fixed-partitions";
 200                         #address-cells = <1>;
 201                         #size-cells = <1>;
 202
 203                         qspi_boot: partition@0 {
 204                                 label = "Boot and fpga data";
 205                                 reg = <0x0 0x04200000>;
 206                         };
 207
 208                         root: partition@4200000 {
 209                                 label = "Root Filesystem - UBIFS";
 210                                 reg = <0x04200000 0x0BE00000>;
 211                         };
 212                 };
 213         };
 214 };