1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright Altera Corporation (C) 2015. All rights reserved.
6 #include "socfpga_stratix10.dtsi"
9 model = "SoCFPGA Stratix 10 SoCDK";
10 compatible = "altr,socfpga-stratix10-socdk", "altr,socfpga-stratix10";
20 stdout-path = "serial0:115200n8";
24 compatible = "gpio-leds";
27 gpios = <&portb 20 GPIO_ACTIVE_HIGH>;
32 gpios = <&portb 19 GPIO_ACTIVE_HIGH>;
37 gpios = <&portb 21 GPIO_ACTIVE_HIGH>;
42 device_type = "memory";
43 /* We expect the bootloader to fill in the reg */
44 reg = <0 0x80000000 0 0>;
47 ref_033v: regulator-v-ref {
48 compatible = "regulator-fixed";
49 regulator-name = "0.33V";
50 regulator-min-microvolt = <330000>;
51 regulator-max-microvolt = <330000>;
57 compatible = "altr,socfpga-s10-sdmmc-ecc",
58 "altr,socfpga-sdmmc-ecc";
59 reg = <0xff8c8c00 0x100>;
60 altr,ecc-parent = <&mmc>;
69 i2c1_pmx_func: i2c1-pmx-func {
70 pinctrl-single,pins = <
71 0x78 0x4 /* I2C1_SDA (IO6-B) PIN30SEL) */
72 0x7c 0x4 /* I2C1_SCL (IO7-B) PIN31SEL */
76 i2c1_pmx_func_gpio: i2c1-pmx-func-gpio {
77 pinctrl-single,pins = <
78 0x78 0x8 /* I2C1_SDA (IO6-B) PIN30SEL) */
79 0x7c 0x8 /* I2C1_SCL (IO7-B) PIN31SEL */
93 max-frame-size = <9000>;
98 compatible = "snps,dwmac-mdio";
99 phy0: ethernet-phy@0 {
102 txd0-skew-ps = <0>; /* -420ps */
103 txd1-skew-ps = <0>; /* -420ps */
104 txd2-skew-ps = <0>; /* -420ps */
105 txd3-skew-ps = <0>; /* -420ps */
106 rxd0-skew-ps = <420>; /* 0ps */
107 rxd1-skew-ps = <420>; /* 0ps */
108 rxd2-skew-ps = <420>; /* 0ps */
109 rxd3-skew-ps = <420>; /* 0ps */
110 txen-skew-ps = <0>; /* -420ps */
111 txc-skew-ps = <900>; /* 0ps */
112 rxdv-skew-ps = <420>; /* 0ps */
113 rxc-skew-ps = <1680>; /* 780ps */
124 clk-phase-sd-hs = <0>, <135>;
128 clock-frequency = <25000000>;
137 disable-over-current;
146 clock-frequency = <100000>;
147 i2c-sda-falling-time-ns = <890>; /* hcnt */
148 i2c-scl-falling-time-ns = <890>; /* lcnt */
150 pinctrl-names = "default", "gpio";
151 pinctrl-0 = <&i2c1_pmx_func>;
152 pinctrl-1 = <&i2c1_pmx_func_gpio>;
154 scl-gpios = <&portb 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
155 sda-gpios = <&portb 7 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
158 compatible = "lltc,ltc2497";
160 vref-supply = <&ref_033v>;
164 compatible = "maxim,max1619";
169 compatible = "atmel,24c32";
175 compatible = "dallas,ds1339";
183 #address-cells = <1>;
185 compatible = "micron,mt25qu02g", "jedec,spi-nor";
187 spi-max-frequency = <100000000>;
190 cdns,page-size = <256>;
191 cdns,block-size = <16>;
192 cdns,read-delay = <1>;
193 cdns,tshsl-ns = <50>;
194 cdns,tsd2d-ns = <50>;
199 compatible = "fixed-partitions";
200 #address-cells = <1>;
203 qspi_boot: partition@0 {
204 label = "Boot and fpga data";
205 reg = <0x0 0x04200000>;
208 root: partition@4200000 {
209 label = "Root Filesystem - UBIFS";
210 reg = <0x04200000 0x0BE00000>;