2 * linux/arch/arm/mm/dma-mapping.c
4 * Copyright (C) 2000-2004 Russell King
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * DMA uncached mapping support.
12 #include <linux/bootmem.h>
13 #include <linux/module.h>
15 #include <linux/genalloc.h>
16 #include <linux/gfp.h>
17 #include <linux/errno.h>
18 #include <linux/list.h>
19 #include <linux/init.h>
20 #include <linux/device.h>
21 #include <linux/dma-mapping.h>
22 #include <linux/dma-contiguous.h>
23 #include <linux/highmem.h>
24 #include <linux/memblock.h>
25 #include <linux/slab.h>
26 #include <linux/iommu.h>
28 #include <linux/vmalloc.h>
29 #include <linux/sizes.h>
30 #include <linux/cma.h>
32 #include <asm/memory.h>
33 #include <asm/highmem.h>
34 #include <asm/cacheflush.h>
35 #include <asm/tlbflush.h>
36 #include <asm/mach/arch.h>
37 #include <asm/dma-iommu.h>
38 #include <asm/mach/map.h>
39 #include <asm/system_info.h>
40 #include <asm/dma-contiguous.h>
46 * The DMA API is built upon the notion of "buffer ownership". A buffer
47 * is either exclusively owned by the CPU (and therefore may be accessed
48 * by it) or exclusively owned by the DMA device. These helper functions
49 * represent the transitions between these two ownership states.
51 * Note, however, that on later ARMs, this notion does not work due to
52 * speculative prefetches. We model our approach on the assumption that
53 * the CPU does do speculative prefetches, which means we clean caches
54 * before transfers and delay cache invalidation until transfer completion.
57 static void __dma_page_cpu_to_dev(struct page *, unsigned long,
58 size_t, enum dma_data_direction);
59 static void __dma_page_dev_to_cpu(struct page *, unsigned long,
60 size_t, enum dma_data_direction);
63 * arm_dma_map_page - map a portion of a page for streaming DMA
64 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
65 * @page: page that buffer resides in
66 * @offset: offset into page for start of buffer
67 * @size: size of buffer to map
68 * @dir: DMA transfer direction
70 * Ensure that any data held in the cache is appropriately discarded
73 * The device owns this memory once this call has completed. The CPU
74 * can regain ownership by calling dma_unmap_page().
76 static dma_addr_t arm_dma_map_page(struct device *dev, struct page *page,
77 unsigned long offset, size_t size, enum dma_data_direction dir,
78 struct dma_attrs *attrs)
80 if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
81 __dma_page_cpu_to_dev(page, offset, size, dir);
82 return pfn_to_dma(dev, page_to_pfn(page)) + offset;
85 static dma_addr_t arm_coherent_dma_map_page(struct device *dev, struct page *page,
86 unsigned long offset, size_t size, enum dma_data_direction dir,
87 struct dma_attrs *attrs)
89 return pfn_to_dma(dev, page_to_pfn(page)) + offset;
93 * arm_dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
94 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
95 * @handle: DMA address of buffer
96 * @size: size of buffer (same as passed to dma_map_page)
97 * @dir: DMA transfer direction (same as passed to dma_map_page)
99 * Unmap a page streaming mode DMA translation. The handle and size
100 * must match what was provided in the previous dma_map_page() call.
101 * All other usages are undefined.
103 * After this call, reads by the CPU to the buffer are guaranteed to see
104 * whatever the device wrote there.
106 static void arm_dma_unmap_page(struct device *dev, dma_addr_t handle,
107 size_t size, enum dma_data_direction dir,
108 struct dma_attrs *attrs)
110 if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
111 __dma_page_dev_to_cpu(pfn_to_page(dma_to_pfn(dev, handle)),
112 handle & ~PAGE_MASK, size, dir);
115 static void arm_dma_sync_single_for_cpu(struct device *dev,
116 dma_addr_t handle, size_t size, enum dma_data_direction dir)
118 unsigned int offset = handle & (PAGE_SIZE - 1);
119 struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
120 __dma_page_dev_to_cpu(page, offset, size, dir);
123 static void arm_dma_sync_single_for_device(struct device *dev,
124 dma_addr_t handle, size_t size, enum dma_data_direction dir)
126 unsigned int offset = handle & (PAGE_SIZE - 1);
127 struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
128 __dma_page_cpu_to_dev(page, offset, size, dir);
131 struct dma_map_ops arm_dma_ops = {
132 .alloc = arm_dma_alloc,
133 .free = arm_dma_free,
134 .mmap = arm_dma_mmap,
135 .get_sgtable = arm_dma_get_sgtable,
136 .map_page = arm_dma_map_page,
137 .unmap_page = arm_dma_unmap_page,
138 .map_sg = arm_dma_map_sg,
139 .unmap_sg = arm_dma_unmap_sg,
140 .sync_single_for_cpu = arm_dma_sync_single_for_cpu,
141 .sync_single_for_device = arm_dma_sync_single_for_device,
142 .sync_sg_for_cpu = arm_dma_sync_sg_for_cpu,
143 .sync_sg_for_device = arm_dma_sync_sg_for_device,
144 .set_dma_mask = arm_dma_set_mask,
146 EXPORT_SYMBOL(arm_dma_ops);
148 static void *arm_coherent_dma_alloc(struct device *dev, size_t size,
149 dma_addr_t *handle, gfp_t gfp, struct dma_attrs *attrs);
150 static void arm_coherent_dma_free(struct device *dev, size_t size, void *cpu_addr,
151 dma_addr_t handle, struct dma_attrs *attrs);
152 static int arm_coherent_dma_mmap(struct device *dev, struct vm_area_struct *vma,
153 void *cpu_addr, dma_addr_t dma_addr, size_t size,
154 struct dma_attrs *attrs);
156 struct dma_map_ops arm_coherent_dma_ops = {
157 .alloc = arm_coherent_dma_alloc,
158 .free = arm_coherent_dma_free,
159 .mmap = arm_coherent_dma_mmap,
160 .get_sgtable = arm_dma_get_sgtable,
161 .map_page = arm_coherent_dma_map_page,
162 .map_sg = arm_dma_map_sg,
163 .set_dma_mask = arm_dma_set_mask,
165 EXPORT_SYMBOL(arm_coherent_dma_ops);
167 static int __dma_supported(struct device *dev, u64 mask, bool warn)
169 unsigned long max_dma_pfn;
172 * If the mask allows for more memory than we can address,
173 * and we actually have that much memory, then we must
174 * indicate that DMA to this device is not supported.
176 if (sizeof(mask) != sizeof(dma_addr_t) &&
177 mask > (dma_addr_t)~0 &&
178 dma_to_pfn(dev, ~0) < max_pfn - 1) {
180 dev_warn(dev, "Coherent DMA mask %#llx is larger than dma_addr_t allows\n",
182 dev_warn(dev, "Driver did not use or check the return value from dma_set_coherent_mask()?\n");
187 max_dma_pfn = min(max_pfn, arm_dma_pfn_limit);
190 * Translate the device's DMA mask to a PFN limit. This
191 * PFN number includes the page which we can DMA to.
193 if (dma_to_pfn(dev, mask) < max_dma_pfn) {
195 dev_warn(dev, "Coherent DMA mask %#llx (pfn %#lx-%#lx) covers a smaller range of system memory than the DMA zone pfn 0x0-%#lx\n",
197 dma_to_pfn(dev, 0), dma_to_pfn(dev, mask) + 1,
205 static u64 get_coherent_dma_mask(struct device *dev)
207 u64 mask = (u64)DMA_BIT_MASK(32);
210 mask = dev->coherent_dma_mask;
213 * Sanity check the DMA mask - it must be non-zero, and
214 * must be able to be satisfied by a DMA allocation.
217 dev_warn(dev, "coherent DMA mask is unset\n");
221 if (!__dma_supported(dev, mask, true))
228 static void __dma_clear_buffer(struct page *page, size_t size)
231 * Ensure that the allocated pages are zeroed, and that any data
232 * lurking in the kernel direct-mapped region is invalidated.
234 if (PageHighMem(page)) {
235 phys_addr_t base = __pfn_to_phys(page_to_pfn(page));
236 phys_addr_t end = base + size;
238 void *ptr = kmap_atomic(page);
239 memset(ptr, 0, PAGE_SIZE);
240 dmac_flush_range(ptr, ptr + PAGE_SIZE);
245 outer_flush_range(base, end);
247 void *ptr = page_address(page);
248 memset(ptr, 0, size);
249 dmac_flush_range(ptr, ptr + size);
250 outer_flush_range(__pa(ptr), __pa(ptr) + size);
255 * Allocate a DMA buffer for 'dev' of size 'size' using the
256 * specified gfp mask. Note that 'size' must be page aligned.
258 static struct page *__dma_alloc_buffer(struct device *dev, size_t size, gfp_t gfp)
260 unsigned long order = get_order(size);
261 struct page *page, *p, *e;
263 page = alloc_pages(gfp, order);
268 * Now split the huge page and free the excess pages
270 split_page(page, order);
271 for (p = page + (size >> PAGE_SHIFT), e = page + (1 << order); p < e; p++)
274 __dma_clear_buffer(page, size);
280 * Free a DMA buffer. 'size' must be page aligned.
282 static void __dma_free_buffer(struct page *page, size_t size)
284 struct page *e = page + (size >> PAGE_SHIFT);
294 static void *__alloc_from_contiguous(struct device *dev, size_t size,
295 pgprot_t prot, struct page **ret_page,
296 const void *caller, bool want_vaddr);
298 static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp,
299 pgprot_t prot, struct page **ret_page,
300 const void *caller, bool want_vaddr);
303 __dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot,
307 * DMA allocation can be mapped to user space, so lets
308 * set VM_USERMAP flags too.
310 return dma_common_contiguous_remap(page, size,
311 VM_ARM_DMA_CONSISTENT | VM_USERMAP,
315 static void __dma_free_remap(void *cpu_addr, size_t size)
317 dma_common_free_remap(cpu_addr, size,
318 VM_ARM_DMA_CONSISTENT | VM_USERMAP);
321 #define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_256K
322 static struct gen_pool *atomic_pool;
324 static size_t atomic_pool_size = DEFAULT_DMA_COHERENT_POOL_SIZE;
326 static int __init early_coherent_pool(char *p)
328 atomic_pool_size = memparse(p, &p);
331 early_param("coherent_pool", early_coherent_pool);
333 void __init init_dma_coherent_pool_size(unsigned long size)
336 * Catch any attempt to set the pool size too late.
341 * Set architecture specific coherent pool size only if
342 * it has not been changed by kernel command line parameter.
344 if (atomic_pool_size == DEFAULT_DMA_COHERENT_POOL_SIZE)
345 atomic_pool_size = size;
349 * Initialise the coherent pool for atomic allocations.
351 static int __init atomic_pool_init(void)
353 pgprot_t prot = pgprot_dmacoherent(PAGE_KERNEL);
354 gfp_t gfp = GFP_KERNEL | GFP_DMA;
358 atomic_pool = gen_pool_create(PAGE_SHIFT, -1);
362 if (dev_get_cma_area(NULL))
363 ptr = __alloc_from_contiguous(NULL, atomic_pool_size, prot,
364 &page, atomic_pool_init, true);
366 ptr = __alloc_remap_buffer(NULL, atomic_pool_size, gfp, prot,
367 &page, atomic_pool_init, true);
371 ret = gen_pool_add_virt(atomic_pool, (unsigned long)ptr,
373 atomic_pool_size, -1);
375 goto destroy_genpool;
377 gen_pool_set_algo(atomic_pool,
378 gen_pool_first_fit_order_align,
380 pr_info("DMA: preallocated %zd KiB pool for atomic coherent allocations\n",
381 atomic_pool_size / 1024);
386 gen_pool_destroy(atomic_pool);
389 pr_err("DMA: failed to allocate %zx KiB pool for atomic coherent allocation\n",
390 atomic_pool_size / 1024);
394 * CMA is activated by core_initcall, so we must be called after it.
396 postcore_initcall(atomic_pool_init);
398 struct dma_contig_early_reserve {
403 static struct dma_contig_early_reserve dma_mmu_remap[MAX_CMA_AREAS] __initdata;
405 static int dma_mmu_remap_num __initdata;
407 void __init dma_contiguous_early_fixup(phys_addr_t base, unsigned long size)
409 dma_mmu_remap[dma_mmu_remap_num].base = base;
410 dma_mmu_remap[dma_mmu_remap_num].size = size;
414 void __init dma_contiguous_remap(void)
417 for (i = 0; i < dma_mmu_remap_num; i++) {
418 phys_addr_t start = dma_mmu_remap[i].base;
419 phys_addr_t end = start + dma_mmu_remap[i].size;
423 if (end > arm_lowmem_limit)
424 end = arm_lowmem_limit;
428 map.pfn = __phys_to_pfn(start);
429 map.virtual = __phys_to_virt(start);
430 map.length = end - start;
431 map.type = MT_MEMORY_DMA_READY;
434 * Clear previous low-memory mapping to ensure that the
435 * TLB does not see any conflicting entries, then flush
436 * the TLB of the old entries before creating new mappings.
438 * This ensures that any speculatively loaded TLB entries
439 * (even though they may be rare) can not cause any problems,
440 * and ensures that this code is architecturally compliant.
442 for (addr = __phys_to_virt(start); addr < __phys_to_virt(end);
444 pmd_clear(pmd_off_k(addr));
446 flush_tlb_kernel_range(__phys_to_virt(start),
447 __phys_to_virt(end));
449 iotable_init(&map, 1);
453 static int __dma_update_pte(pte_t *pte, pgtable_t token, unsigned long addr,
456 struct page *page = virt_to_page(addr);
457 pgprot_t prot = *(pgprot_t *)data;
459 set_pte_ext(pte, mk_pte(page, prot), 0);
463 static void __dma_remap(struct page *page, size_t size, pgprot_t prot)
465 unsigned long start = (unsigned long) page_address(page);
466 unsigned end = start + size;
468 apply_to_page_range(&init_mm, start, size, __dma_update_pte, &prot);
469 flush_tlb_kernel_range(start, end);
472 static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp,
473 pgprot_t prot, struct page **ret_page,
474 const void *caller, bool want_vaddr)
478 page = __dma_alloc_buffer(dev, size, gfp);
484 ptr = __dma_alloc_remap(page, size, gfp, prot, caller);
486 __dma_free_buffer(page, size);
495 static void *__alloc_from_pool(size_t size, struct page **ret_page)
501 WARN(1, "coherent pool not initialised!\n");
505 val = gen_pool_alloc(atomic_pool, size);
507 phys_addr_t phys = gen_pool_virt_to_phys(atomic_pool, val);
509 *ret_page = phys_to_page(phys);
516 static bool __in_atomic_pool(void *start, size_t size)
518 return addr_in_gen_pool(atomic_pool, (unsigned long)start, size);
521 static int __free_from_pool(void *start, size_t size)
523 if (!__in_atomic_pool(start, size))
526 gen_pool_free(atomic_pool, (unsigned long)start, size);
531 static void *__alloc_from_contiguous(struct device *dev, size_t size,
532 pgprot_t prot, struct page **ret_page,
533 const void *caller, bool want_vaddr)
535 unsigned long order = get_order(size);
536 size_t count = size >> PAGE_SHIFT;
540 page = dma_alloc_from_contiguous(dev, count, order);
544 __dma_clear_buffer(page, size);
549 if (PageHighMem(page)) {
550 ptr = __dma_alloc_remap(page, size, GFP_KERNEL, prot, caller);
552 dma_release_from_contiguous(dev, page, count);
556 __dma_remap(page, size, prot);
557 ptr = page_address(page);
565 static void __free_from_contiguous(struct device *dev, struct page *page,
566 void *cpu_addr, size_t size, bool want_vaddr)
569 if (PageHighMem(page))
570 __dma_free_remap(cpu_addr, size);
572 __dma_remap(page, size, PAGE_KERNEL);
574 dma_release_from_contiguous(dev, page, size >> PAGE_SHIFT);
577 static inline pgprot_t __get_dma_pgprot(struct dma_attrs *attrs, pgprot_t prot)
579 prot = dma_get_attr(DMA_ATTR_WRITE_COMBINE, attrs) ?
580 pgprot_writecombine(prot) :
581 pgprot_dmacoherent(prot);
587 #else /* !CONFIG_MMU */
591 #define __get_dma_pgprot(attrs, prot) __pgprot(0)
592 #define __alloc_remap_buffer(dev, size, gfp, prot, ret, c, wv) NULL
593 #define __alloc_from_pool(size, ret_page) NULL
594 #define __alloc_from_contiguous(dev, size, prot, ret, c, wv) NULL
595 #define __free_from_pool(cpu_addr, size) 0
596 #define __free_from_contiguous(dev, page, cpu_addr, size, wv) do { } while (0)
597 #define __dma_free_remap(cpu_addr, size) do { } while (0)
599 #endif /* CONFIG_MMU */
601 static void *__alloc_simple_buffer(struct device *dev, size_t size, gfp_t gfp,
602 struct page **ret_page)
605 page = __dma_alloc_buffer(dev, size, gfp);
610 return page_address(page);
615 static void *__dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
616 gfp_t gfp, pgprot_t prot, bool is_coherent,
617 struct dma_attrs *attrs, const void *caller)
619 u64 mask = get_coherent_dma_mask(dev);
620 struct page *page = NULL;
624 #ifdef CONFIG_DMA_API_DEBUG
625 u64 limit = (mask + 1) & ~mask;
626 if (limit && size >= limit) {
627 dev_warn(dev, "coherent allocation too big (requested %#x mask %#llx)\n",
636 if (mask < 0xffffffffULL)
640 * Following is a work-around (a.k.a. hack) to prevent pages
641 * with __GFP_COMP being passed to split_page() which cannot
642 * handle them. The real problem is that this flag probably
643 * should be 0 on ARM as it is not supported on this
644 * platform; see CONFIG_HUGETLBFS.
646 gfp &= ~(__GFP_COMP);
648 *handle = DMA_ERROR_CODE;
649 size = PAGE_ALIGN(size);
650 want_vaddr = !dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs);
653 addr = __alloc_simple_buffer(dev, size, gfp, &page);
654 else if (dev_get_cma_area(dev) && (gfp & __GFP_DIRECT_RECLAIM))
655 addr = __alloc_from_contiguous(dev, size, prot, &page,
657 else if (is_coherent)
658 addr = __alloc_simple_buffer(dev, size, gfp, &page);
659 else if (!gfpflags_allow_blocking(gfp))
660 addr = __alloc_from_pool(size, &page);
662 addr = __alloc_remap_buffer(dev, size, gfp, prot, &page,
666 *handle = pfn_to_dma(dev, page_to_pfn(page));
668 return want_vaddr ? addr : page;
672 * Allocate DMA-coherent memory space and return both the kernel remapped
673 * virtual and bus address for that space.
675 void *arm_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
676 gfp_t gfp, struct dma_attrs *attrs)
678 pgprot_t prot = __get_dma_pgprot(attrs, PAGE_KERNEL);
680 return __dma_alloc(dev, size, handle, gfp, prot, false,
681 attrs, __builtin_return_address(0));
684 static void *arm_coherent_dma_alloc(struct device *dev, size_t size,
685 dma_addr_t *handle, gfp_t gfp, struct dma_attrs *attrs)
687 return __dma_alloc(dev, size, handle, gfp, PAGE_KERNEL, true,
688 attrs, __builtin_return_address(0));
691 static int __arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,
692 void *cpu_addr, dma_addr_t dma_addr, size_t size,
693 struct dma_attrs *attrs)
697 unsigned long nr_vma_pages = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
698 unsigned long nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
699 unsigned long pfn = dma_to_pfn(dev, dma_addr);
700 unsigned long off = vma->vm_pgoff;
702 if (dma_mmap_from_coherent(dev, vma, cpu_addr, size, &ret))
705 if (off < nr_pages && nr_vma_pages <= (nr_pages - off)) {
706 ret = remap_pfn_range(vma, vma->vm_start,
708 vma->vm_end - vma->vm_start,
711 #endif /* CONFIG_MMU */
717 * Create userspace mapping for the DMA-coherent memory.
719 static int arm_coherent_dma_mmap(struct device *dev, struct vm_area_struct *vma,
720 void *cpu_addr, dma_addr_t dma_addr, size_t size,
721 struct dma_attrs *attrs)
723 return __arm_dma_mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
726 int arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,
727 void *cpu_addr, dma_addr_t dma_addr, size_t size,
728 struct dma_attrs *attrs)
731 vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);
732 #endif /* CONFIG_MMU */
733 return __arm_dma_mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
737 * Free a buffer as defined by the above mapping.
739 static void __arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
740 dma_addr_t handle, struct dma_attrs *attrs,
743 struct page *page = pfn_to_page(dma_to_pfn(dev, handle));
744 bool want_vaddr = !dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs);
746 size = PAGE_ALIGN(size);
749 __dma_free_buffer(page, size);
750 } else if (!is_coherent && __free_from_pool(cpu_addr, size)) {
752 } else if (!dev_get_cma_area(dev)) {
753 if (want_vaddr && !is_coherent)
754 __dma_free_remap(cpu_addr, size);
755 __dma_free_buffer(page, size);
758 * Non-atomic allocations cannot be freed with IRQs disabled
760 WARN_ON(irqs_disabled());
761 __free_from_contiguous(dev, page, cpu_addr, size, want_vaddr);
765 void arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
766 dma_addr_t handle, struct dma_attrs *attrs)
768 __arm_dma_free(dev, size, cpu_addr, handle, attrs, false);
771 static void arm_coherent_dma_free(struct device *dev, size_t size, void *cpu_addr,
772 dma_addr_t handle, struct dma_attrs *attrs)
774 __arm_dma_free(dev, size, cpu_addr, handle, attrs, true);
778 * The whole dma_get_sgtable() idea is fundamentally unsafe - it seems
779 * that the intention is to allow exporting memory allocated via the
780 * coherent DMA APIs through the dma_buf API, which only accepts a
781 * scattertable. This presents a couple of problems:
782 * 1. Not all memory allocated via the coherent DMA APIs is backed by
784 * 2. Passing coherent DMA memory into the streaming APIs is not allowed
785 * as we will try to flush the memory through a different alias to that
786 * actually being used (and the flushes are redundant.)
788 int arm_dma_get_sgtable(struct device *dev, struct sg_table *sgt,
789 void *cpu_addr, dma_addr_t handle, size_t size,
790 struct dma_attrs *attrs)
792 unsigned long pfn = dma_to_pfn(dev, handle);
796 /* If the PFN is not valid, we do not have a struct page */
800 page = pfn_to_page(pfn);
802 ret = sg_alloc_table(sgt, 1, GFP_KERNEL);
806 sg_set_page(sgt->sgl, page, PAGE_ALIGN(size), 0);
810 static void dma_cache_maint_page(struct page *page, unsigned long offset,
811 size_t size, enum dma_data_direction dir,
812 void (*op)(const void *, size_t, int))
817 pfn = page_to_pfn(page) + offset / PAGE_SIZE;
821 * A single sg entry may refer to multiple physically contiguous
822 * pages. But we still need to process highmem pages individually.
823 * If highmem is not configured then the bulk of this loop gets
830 page = pfn_to_page(pfn);
832 if (PageHighMem(page)) {
833 if (len + offset > PAGE_SIZE)
834 len = PAGE_SIZE - offset;
836 if (cache_is_vipt_nonaliasing()) {
837 vaddr = kmap_atomic(page);
838 op(vaddr + offset, len, dir);
839 kunmap_atomic(vaddr);
841 vaddr = kmap_high_get(page);
843 op(vaddr + offset, len, dir);
848 vaddr = page_address(page) + offset;
858 * Make an area consistent for devices.
859 * Note: Drivers should NOT use this function directly, as it will break
860 * platforms with CONFIG_DMABOUNCE.
861 * Use the driver DMA support - see dma-mapping.h (dma_sync_*)
863 static void __dma_page_cpu_to_dev(struct page *page, unsigned long off,
864 size_t size, enum dma_data_direction dir)
868 dma_cache_maint_page(page, off, size, dir, dmac_map_area);
870 paddr = page_to_phys(page) + off;
871 if (dir == DMA_FROM_DEVICE) {
872 outer_inv_range(paddr, paddr + size);
874 outer_clean_range(paddr, paddr + size);
876 /* FIXME: non-speculating: flush on bidirectional mappings? */
879 static void __dma_page_dev_to_cpu(struct page *page, unsigned long off,
880 size_t size, enum dma_data_direction dir)
882 phys_addr_t paddr = page_to_phys(page) + off;
884 /* FIXME: non-speculating: not required */
885 /* in any case, don't bother invalidating if DMA to device */
886 if (dir != DMA_TO_DEVICE) {
887 outer_inv_range(paddr, paddr + size);
889 dma_cache_maint_page(page, off, size, dir, dmac_unmap_area);
893 * Mark the D-cache clean for these pages to avoid extra flushing.
895 if (dir != DMA_TO_DEVICE && size >= PAGE_SIZE) {
899 pfn = page_to_pfn(page) + off / PAGE_SIZE;
903 left -= PAGE_SIZE - off;
905 while (left >= PAGE_SIZE) {
906 page = pfn_to_page(pfn++);
907 set_bit(PG_dcache_clean, &page->flags);
914 * arm_dma_map_sg - map a set of SG buffers for streaming mode DMA
915 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
916 * @sg: list of buffers
917 * @nents: number of buffers to map
918 * @dir: DMA transfer direction
920 * Map a set of buffers described by scatterlist in streaming mode for DMA.
921 * This is the scatter-gather version of the dma_map_single interface.
922 * Here the scatter gather list elements are each tagged with the
923 * appropriate dma address and length. They are obtained via
924 * sg_dma_{address,length}.
926 * Device ownership issues as mentioned for dma_map_single are the same
929 int arm_dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
930 enum dma_data_direction dir, struct dma_attrs *attrs)
932 struct dma_map_ops *ops = get_dma_ops(dev);
933 struct scatterlist *s;
936 for_each_sg(sg, s, nents, i) {
937 #ifdef CONFIG_NEED_SG_DMA_LENGTH
938 s->dma_length = s->length;
940 s->dma_address = ops->map_page(dev, sg_page(s), s->offset,
941 s->length, dir, attrs);
942 if (dma_mapping_error(dev, s->dma_address))
948 for_each_sg(sg, s, i, j)
949 ops->unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);
954 * arm_dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
955 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
956 * @sg: list of buffers
957 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
958 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
960 * Unmap a set of streaming mode DMA translations. Again, CPU access
961 * rules concerning calls here are the same as for dma_unmap_single().
963 void arm_dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
964 enum dma_data_direction dir, struct dma_attrs *attrs)
966 struct dma_map_ops *ops = get_dma_ops(dev);
967 struct scatterlist *s;
971 for_each_sg(sg, s, nents, i)
972 ops->unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);
976 * arm_dma_sync_sg_for_cpu
977 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
978 * @sg: list of buffers
979 * @nents: number of buffers to map (returned from dma_map_sg)
980 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
982 void arm_dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
983 int nents, enum dma_data_direction dir)
985 struct dma_map_ops *ops = get_dma_ops(dev);
986 struct scatterlist *s;
989 for_each_sg(sg, s, nents, i)
990 ops->sync_single_for_cpu(dev, sg_dma_address(s), s->length,
995 * arm_dma_sync_sg_for_device
996 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
997 * @sg: list of buffers
998 * @nents: number of buffers to map (returned from dma_map_sg)
999 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1001 void arm_dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
1002 int nents, enum dma_data_direction dir)
1004 struct dma_map_ops *ops = get_dma_ops(dev);
1005 struct scatterlist *s;
1008 for_each_sg(sg, s, nents, i)
1009 ops->sync_single_for_device(dev, sg_dma_address(s), s->length,
1014 * Return whether the given device DMA address mask can be supported
1015 * properly. For example, if your device can only drive the low 24-bits
1016 * during bus mastering, then you would pass 0x00ffffff as the mask
1019 int dma_supported(struct device *dev, u64 mask)
1021 return __dma_supported(dev, mask, false);
1023 EXPORT_SYMBOL(dma_supported);
1025 int arm_dma_set_mask(struct device *dev, u64 dma_mask)
1027 if (!dev->dma_mask || !dma_supported(dev, dma_mask))
1030 *dev->dma_mask = dma_mask;
1035 #define PREALLOC_DMA_DEBUG_ENTRIES 4096
1037 static int __init dma_debug_do_init(void)
1039 dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
1042 fs_initcall(dma_debug_do_init);
1044 #ifdef CONFIG_ARM_DMA_USE_IOMMU
1048 static int extend_iommu_mapping(struct dma_iommu_mapping *mapping);
1050 static inline dma_addr_t __alloc_iova(struct dma_iommu_mapping *mapping,
1053 unsigned int order = get_order(size);
1054 unsigned int align = 0;
1055 unsigned int count, start;
1056 size_t mapping_size = mapping->bits << PAGE_SHIFT;
1057 unsigned long flags;
1061 if (order > CONFIG_ARM_DMA_IOMMU_ALIGNMENT)
1062 order = CONFIG_ARM_DMA_IOMMU_ALIGNMENT;
1064 count = PAGE_ALIGN(size) >> PAGE_SHIFT;
1065 align = (1 << order) - 1;
1067 spin_lock_irqsave(&mapping->lock, flags);
1068 for (i = 0; i < mapping->nr_bitmaps; i++) {
1069 start = bitmap_find_next_zero_area(mapping->bitmaps[i],
1070 mapping->bits, 0, count, align);
1072 if (start > mapping->bits)
1075 bitmap_set(mapping->bitmaps[i], start, count);
1080 * No unused range found. Try to extend the existing mapping
1081 * and perform a second attempt to reserve an IO virtual
1082 * address range of size bytes.
1084 if (i == mapping->nr_bitmaps) {
1085 if (extend_iommu_mapping(mapping)) {
1086 spin_unlock_irqrestore(&mapping->lock, flags);
1087 return DMA_ERROR_CODE;
1090 start = bitmap_find_next_zero_area(mapping->bitmaps[i],
1091 mapping->bits, 0, count, align);
1093 if (start > mapping->bits) {
1094 spin_unlock_irqrestore(&mapping->lock, flags);
1095 return DMA_ERROR_CODE;
1098 bitmap_set(mapping->bitmaps[i], start, count);
1100 spin_unlock_irqrestore(&mapping->lock, flags);
1102 iova = mapping->base + (mapping_size * i);
1103 iova += start << PAGE_SHIFT;
1108 static inline void __free_iova(struct dma_iommu_mapping *mapping,
1109 dma_addr_t addr, size_t size)
1111 unsigned int start, count;
1112 size_t mapping_size = mapping->bits << PAGE_SHIFT;
1113 unsigned long flags;
1114 dma_addr_t bitmap_base;
1120 bitmap_index = (u32) (addr - mapping->base) / (u32) mapping_size;
1121 BUG_ON(addr < mapping->base || bitmap_index > mapping->extensions);
1123 bitmap_base = mapping->base + mapping_size * bitmap_index;
1125 start = (addr - bitmap_base) >> PAGE_SHIFT;
1127 if (addr + size > bitmap_base + mapping_size) {
1129 * The address range to be freed reaches into the iova
1130 * range of the next bitmap. This should not happen as
1131 * we don't allow this in __alloc_iova (at the
1136 count = size >> PAGE_SHIFT;
1138 spin_lock_irqsave(&mapping->lock, flags);
1139 bitmap_clear(mapping->bitmaps[bitmap_index], start, count);
1140 spin_unlock_irqrestore(&mapping->lock, flags);
1143 static struct page **__iommu_alloc_buffer(struct device *dev, size_t size,
1144 gfp_t gfp, struct dma_attrs *attrs)
1146 struct page **pages;
1147 int count = size >> PAGE_SHIFT;
1148 int array_size = count * sizeof(struct page *);
1151 if (array_size <= PAGE_SIZE)
1152 pages = kzalloc(array_size, GFP_KERNEL);
1154 pages = vzalloc(array_size);
1158 if (dma_get_attr(DMA_ATTR_FORCE_CONTIGUOUS, attrs))
1160 unsigned long order = get_order(size);
1163 page = dma_alloc_from_contiguous(dev, count, order);
1167 __dma_clear_buffer(page, size);
1169 for (i = 0; i < count; i++)
1170 pages[i] = page + i;
1176 * IOMMU can map any pages, so himem can also be used here
1178 gfp |= __GFP_NOWARN | __GFP_HIGHMEM;
1183 for (order = __fls(count); order > 0; --order) {
1185 * We do not want OOM killer to be invoked as long
1186 * as we can fall back to single pages, so we force
1187 * __GFP_NORETRY for orders higher than zero.
1189 pages[i] = alloc_pages(gfp | __GFP_NORETRY, order);
1196 * Fall back to single page allocation.
1197 * Might invoke OOM killer as last resort.
1199 pages[i] = alloc_pages(gfp, 0);
1205 split_page(pages[i], order);
1208 pages[i + j] = pages[i] + j;
1211 __dma_clear_buffer(pages[i], PAGE_SIZE << order);
1213 count -= 1 << order;
1220 __free_pages(pages[i], 0);
1221 if (array_size <= PAGE_SIZE)
1228 static int __iommu_free_buffer(struct device *dev, struct page **pages,
1229 size_t size, struct dma_attrs *attrs)
1231 int count = size >> PAGE_SHIFT;
1232 int array_size = count * sizeof(struct page *);
1235 if (dma_get_attr(DMA_ATTR_FORCE_CONTIGUOUS, attrs)) {
1236 dma_release_from_contiguous(dev, pages[0], count);
1238 for (i = 0; i < count; i++)
1240 __free_pages(pages[i], 0);
1243 if (array_size <= PAGE_SIZE)
1251 * Create a CPU mapping for a specified pages
1254 __iommu_alloc_remap(struct page **pages, size_t size, gfp_t gfp, pgprot_t prot,
1257 return dma_common_pages_remap(pages, size,
1258 VM_ARM_DMA_CONSISTENT | VM_USERMAP, prot, caller);
1262 * Create a mapping in device IO address space for specified pages
1265 __iommu_create_mapping(struct device *dev, struct page **pages, size_t size)
1267 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1268 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
1269 dma_addr_t dma_addr, iova;
1272 dma_addr = __alloc_iova(mapping, size);
1273 if (dma_addr == DMA_ERROR_CODE)
1277 for (i = 0; i < count; ) {
1280 unsigned int next_pfn = page_to_pfn(pages[i]) + 1;
1281 phys_addr_t phys = page_to_phys(pages[i]);
1282 unsigned int len, j;
1284 for (j = i + 1; j < count; j++, next_pfn++)
1285 if (page_to_pfn(pages[j]) != next_pfn)
1288 len = (j - i) << PAGE_SHIFT;
1289 ret = iommu_map(mapping->domain, iova, phys, len,
1290 IOMMU_READ|IOMMU_WRITE);
1298 iommu_unmap(mapping->domain, dma_addr, iova-dma_addr);
1299 __free_iova(mapping, dma_addr, size);
1300 return DMA_ERROR_CODE;
1303 static int __iommu_remove_mapping(struct device *dev, dma_addr_t iova, size_t size)
1305 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1308 * add optional in-page offset from iova to size and align
1309 * result to page size
1311 size = PAGE_ALIGN((iova & ~PAGE_MASK) + size);
1314 iommu_unmap(mapping->domain, iova, size);
1315 __free_iova(mapping, iova, size);
1319 static struct page **__atomic_get_pages(void *addr)
1324 phys = gen_pool_virt_to_phys(atomic_pool, (unsigned long)addr);
1325 page = phys_to_page(phys);
1327 return (struct page **)page;
1330 static struct page **__iommu_get_pages(void *cpu_addr, struct dma_attrs *attrs)
1332 struct vm_struct *area;
1334 if (__in_atomic_pool(cpu_addr, PAGE_SIZE))
1335 return __atomic_get_pages(cpu_addr);
1337 if (dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs))
1340 area = find_vm_area(cpu_addr);
1341 if (area && (area->flags & VM_ARM_DMA_CONSISTENT))
1346 static void *__iommu_alloc_atomic(struct device *dev, size_t size,
1352 addr = __alloc_from_pool(size, &page);
1356 *handle = __iommu_create_mapping(dev, &page, size);
1357 if (*handle == DMA_ERROR_CODE)
1363 __free_from_pool(addr, size);
1367 static void __iommu_free_atomic(struct device *dev, void *cpu_addr,
1368 dma_addr_t handle, size_t size)
1370 __iommu_remove_mapping(dev, handle, size);
1371 __free_from_pool(cpu_addr, size);
1374 static void *arm_iommu_alloc_attrs(struct device *dev, size_t size,
1375 dma_addr_t *handle, gfp_t gfp, struct dma_attrs *attrs)
1377 pgprot_t prot = __get_dma_pgprot(attrs, PAGE_KERNEL);
1378 struct page **pages;
1381 *handle = DMA_ERROR_CODE;
1382 size = PAGE_ALIGN(size);
1384 if (!gfpflags_allow_blocking(gfp))
1385 return __iommu_alloc_atomic(dev, size, handle);
1388 * Following is a work-around (a.k.a. hack) to prevent pages
1389 * with __GFP_COMP being passed to split_page() which cannot
1390 * handle them. The real problem is that this flag probably
1391 * should be 0 on ARM as it is not supported on this
1392 * platform; see CONFIG_HUGETLBFS.
1394 gfp &= ~(__GFP_COMP);
1396 pages = __iommu_alloc_buffer(dev, size, gfp, attrs);
1400 *handle = __iommu_create_mapping(dev, pages, size);
1401 if (*handle == DMA_ERROR_CODE)
1404 if (dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs))
1407 addr = __iommu_alloc_remap(pages, size, gfp, prot,
1408 __builtin_return_address(0));
1415 __iommu_remove_mapping(dev, *handle, size);
1417 __iommu_free_buffer(dev, pages, size, attrs);
1421 static int arm_iommu_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
1422 void *cpu_addr, dma_addr_t dma_addr, size_t size,
1423 struct dma_attrs *attrs)
1425 unsigned long uaddr = vma->vm_start;
1426 unsigned long usize = vma->vm_end - vma->vm_start;
1427 struct page **pages = __iommu_get_pages(cpu_addr, attrs);
1428 unsigned long nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
1429 unsigned long off = vma->vm_pgoff;
1431 vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);
1436 if (off >= nr_pages || (usize >> PAGE_SHIFT) > nr_pages - off)
1442 int ret = vm_insert_page(vma, uaddr, *pages++);
1444 pr_err("Remapping memory failed: %d\n", ret);
1449 } while (usize > 0);
1455 * free a page as defined by the above mapping.
1456 * Must not be called with IRQs disabled.
1458 void arm_iommu_free_attrs(struct device *dev, size_t size, void *cpu_addr,
1459 dma_addr_t handle, struct dma_attrs *attrs)
1461 struct page **pages;
1462 size = PAGE_ALIGN(size);
1464 if (__in_atomic_pool(cpu_addr, size)) {
1465 __iommu_free_atomic(dev, cpu_addr, handle, size);
1469 pages = __iommu_get_pages(cpu_addr, attrs);
1471 WARN(1, "trying to free invalid coherent area: %p\n", cpu_addr);
1475 if (!dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs)) {
1476 dma_common_free_remap(cpu_addr, size,
1477 VM_ARM_DMA_CONSISTENT | VM_USERMAP);
1480 __iommu_remove_mapping(dev, handle, size);
1481 __iommu_free_buffer(dev, pages, size, attrs);
1484 static int arm_iommu_get_sgtable(struct device *dev, struct sg_table *sgt,
1485 void *cpu_addr, dma_addr_t dma_addr,
1486 size_t size, struct dma_attrs *attrs)
1488 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
1489 struct page **pages = __iommu_get_pages(cpu_addr, attrs);
1494 return sg_alloc_table_from_pages(sgt, pages, count, 0, size,
1498 static int __dma_direction_to_prot(enum dma_data_direction dir)
1503 case DMA_BIDIRECTIONAL:
1504 prot = IOMMU_READ | IOMMU_WRITE;
1509 case DMA_FROM_DEVICE:
1520 * Map a part of the scatter-gather list into contiguous io address space
1522 static int __map_sg_chunk(struct device *dev, struct scatterlist *sg,
1523 size_t size, dma_addr_t *handle,
1524 enum dma_data_direction dir, struct dma_attrs *attrs,
1527 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1528 dma_addr_t iova, iova_base;
1531 struct scatterlist *s;
1534 size = PAGE_ALIGN(size);
1535 *handle = DMA_ERROR_CODE;
1537 iova_base = iova = __alloc_iova(mapping, size);
1538 if (iova == DMA_ERROR_CODE)
1541 for (count = 0, s = sg; count < (size >> PAGE_SHIFT); s = sg_next(s)) {
1542 phys_addr_t phys = page_to_phys(sg_page(s));
1543 unsigned int len = PAGE_ALIGN(s->offset + s->length);
1546 !dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
1547 __dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
1549 prot = __dma_direction_to_prot(dir);
1551 ret = iommu_map(mapping->domain, iova, phys, len, prot);
1554 count += len >> PAGE_SHIFT;
1557 *handle = iova_base;
1561 iommu_unmap(mapping->domain, iova_base, count * PAGE_SIZE);
1562 __free_iova(mapping, iova_base, size);
1566 static int __iommu_map_sg(struct device *dev, struct scatterlist *sg, int nents,
1567 enum dma_data_direction dir, struct dma_attrs *attrs,
1570 struct scatterlist *s = sg, *dma = sg, *start = sg;
1572 unsigned int offset = s->offset;
1573 unsigned int size = s->offset + s->length;
1574 unsigned int max = dma_get_max_seg_size(dev);
1576 for (i = 1; i < nents; i++) {
1579 s->dma_address = DMA_ERROR_CODE;
1582 if (s->offset || (size & ~PAGE_MASK) || size + s->length > max) {
1583 if (__map_sg_chunk(dev, start, size, &dma->dma_address,
1584 dir, attrs, is_coherent) < 0)
1587 dma->dma_address += offset;
1588 dma->dma_length = size - offset;
1590 size = offset = s->offset;
1597 if (__map_sg_chunk(dev, start, size, &dma->dma_address, dir, attrs,
1601 dma->dma_address += offset;
1602 dma->dma_length = size - offset;
1607 for_each_sg(sg, s, count, i)
1608 __iommu_remove_mapping(dev, sg_dma_address(s), sg_dma_len(s));
1613 * arm_coherent_iommu_map_sg - map a set of SG buffers for streaming mode DMA
1614 * @dev: valid struct device pointer
1615 * @sg: list of buffers
1616 * @nents: number of buffers to map
1617 * @dir: DMA transfer direction
1619 * Map a set of i/o coherent buffers described by scatterlist in streaming
1620 * mode for DMA. The scatter gather list elements are merged together (if
1621 * possible) and tagged with the appropriate dma address and length. They are
1622 * obtained via sg_dma_{address,length}.
1624 int arm_coherent_iommu_map_sg(struct device *dev, struct scatterlist *sg,
1625 int nents, enum dma_data_direction dir, struct dma_attrs *attrs)
1627 return __iommu_map_sg(dev, sg, nents, dir, attrs, true);
1631 * arm_iommu_map_sg - map a set of SG buffers for streaming mode DMA
1632 * @dev: valid struct device pointer
1633 * @sg: list of buffers
1634 * @nents: number of buffers to map
1635 * @dir: DMA transfer direction
1637 * Map a set of buffers described by scatterlist in streaming mode for DMA.
1638 * The scatter gather list elements are merged together (if possible) and
1639 * tagged with the appropriate dma address and length. They are obtained via
1640 * sg_dma_{address,length}.
1642 int arm_iommu_map_sg(struct device *dev, struct scatterlist *sg,
1643 int nents, enum dma_data_direction dir, struct dma_attrs *attrs)
1645 return __iommu_map_sg(dev, sg, nents, dir, attrs, false);
1648 static void __iommu_unmap_sg(struct device *dev, struct scatterlist *sg,
1649 int nents, enum dma_data_direction dir, struct dma_attrs *attrs,
1652 struct scatterlist *s;
1655 for_each_sg(sg, s, nents, i) {
1657 __iommu_remove_mapping(dev, sg_dma_address(s),
1660 !dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
1661 __dma_page_dev_to_cpu(sg_page(s), s->offset,
1667 * arm_coherent_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1668 * @dev: valid struct device pointer
1669 * @sg: list of buffers
1670 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1671 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1673 * Unmap a set of streaming mode DMA translations. Again, CPU access
1674 * rules concerning calls here are the same as for dma_unmap_single().
1676 void arm_coherent_iommu_unmap_sg(struct device *dev, struct scatterlist *sg,
1677 int nents, enum dma_data_direction dir, struct dma_attrs *attrs)
1679 __iommu_unmap_sg(dev, sg, nents, dir, attrs, true);
1683 * arm_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1684 * @dev: valid struct device pointer
1685 * @sg: list of buffers
1686 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1687 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1689 * Unmap a set of streaming mode DMA translations. Again, CPU access
1690 * rules concerning calls here are the same as for dma_unmap_single().
1692 void arm_iommu_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
1693 enum dma_data_direction dir, struct dma_attrs *attrs)
1695 __iommu_unmap_sg(dev, sg, nents, dir, attrs, false);
1699 * arm_iommu_sync_sg_for_cpu
1700 * @dev: valid struct device pointer
1701 * @sg: list of buffers
1702 * @nents: number of buffers to map (returned from dma_map_sg)
1703 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1705 void arm_iommu_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
1706 int nents, enum dma_data_direction dir)
1708 struct scatterlist *s;
1711 for_each_sg(sg, s, nents, i)
1712 __dma_page_dev_to_cpu(sg_page(s), s->offset, s->length, dir);
1717 * arm_iommu_sync_sg_for_device
1718 * @dev: valid struct device pointer
1719 * @sg: list of buffers
1720 * @nents: number of buffers to map (returned from dma_map_sg)
1721 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1723 void arm_iommu_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
1724 int nents, enum dma_data_direction dir)
1726 struct scatterlist *s;
1729 for_each_sg(sg, s, nents, i)
1730 __dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
1735 * arm_coherent_iommu_map_page
1736 * @dev: valid struct device pointer
1737 * @page: page that buffer resides in
1738 * @offset: offset into page for start of buffer
1739 * @size: size of buffer to map
1740 * @dir: DMA transfer direction
1742 * Coherent IOMMU aware version of arm_dma_map_page()
1744 static dma_addr_t arm_coherent_iommu_map_page(struct device *dev, struct page *page,
1745 unsigned long offset, size_t size, enum dma_data_direction dir,
1746 struct dma_attrs *attrs)
1748 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1749 dma_addr_t dma_addr;
1750 int ret, prot, len = PAGE_ALIGN(size + offset);
1752 dma_addr = __alloc_iova(mapping, len);
1753 if (dma_addr == DMA_ERROR_CODE)
1756 prot = __dma_direction_to_prot(dir);
1758 ret = iommu_map(mapping->domain, dma_addr, page_to_phys(page), len, prot);
1762 return dma_addr + offset;
1764 __free_iova(mapping, dma_addr, len);
1765 return DMA_ERROR_CODE;
1769 * arm_iommu_map_page
1770 * @dev: valid struct device pointer
1771 * @page: page that buffer resides in
1772 * @offset: offset into page for start of buffer
1773 * @size: size of buffer to map
1774 * @dir: DMA transfer direction
1776 * IOMMU aware version of arm_dma_map_page()
1778 static dma_addr_t arm_iommu_map_page(struct device *dev, struct page *page,
1779 unsigned long offset, size_t size, enum dma_data_direction dir,
1780 struct dma_attrs *attrs)
1782 if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
1783 __dma_page_cpu_to_dev(page, offset, size, dir);
1785 return arm_coherent_iommu_map_page(dev, page, offset, size, dir, attrs);
1789 * arm_coherent_iommu_unmap_page
1790 * @dev: valid struct device pointer
1791 * @handle: DMA address of buffer
1792 * @size: size of buffer (same as passed to dma_map_page)
1793 * @dir: DMA transfer direction (same as passed to dma_map_page)
1795 * Coherent IOMMU aware version of arm_dma_unmap_page()
1797 static void arm_coherent_iommu_unmap_page(struct device *dev, dma_addr_t handle,
1798 size_t size, enum dma_data_direction dir,
1799 struct dma_attrs *attrs)
1801 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1802 dma_addr_t iova = handle & PAGE_MASK;
1803 int offset = handle & ~PAGE_MASK;
1804 int len = PAGE_ALIGN(size + offset);
1809 iommu_unmap(mapping->domain, iova, len);
1810 __free_iova(mapping, iova, len);
1814 * arm_iommu_unmap_page
1815 * @dev: valid struct device pointer
1816 * @handle: DMA address of buffer
1817 * @size: size of buffer (same as passed to dma_map_page)
1818 * @dir: DMA transfer direction (same as passed to dma_map_page)
1820 * IOMMU aware version of arm_dma_unmap_page()
1822 static void arm_iommu_unmap_page(struct device *dev, dma_addr_t handle,
1823 size_t size, enum dma_data_direction dir,
1824 struct dma_attrs *attrs)
1826 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1827 dma_addr_t iova = handle & PAGE_MASK;
1828 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1829 int offset = handle & ~PAGE_MASK;
1830 int len = PAGE_ALIGN(size + offset);
1835 if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
1836 __dma_page_dev_to_cpu(page, offset, size, dir);
1838 iommu_unmap(mapping->domain, iova, len);
1839 __free_iova(mapping, iova, len);
1842 static void arm_iommu_sync_single_for_cpu(struct device *dev,
1843 dma_addr_t handle, size_t size, enum dma_data_direction dir)
1845 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1846 dma_addr_t iova = handle & PAGE_MASK;
1847 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1848 unsigned int offset = handle & ~PAGE_MASK;
1853 __dma_page_dev_to_cpu(page, offset, size, dir);
1856 static void arm_iommu_sync_single_for_device(struct device *dev,
1857 dma_addr_t handle, size_t size, enum dma_data_direction dir)
1859 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1860 dma_addr_t iova = handle & PAGE_MASK;
1861 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1862 unsigned int offset = handle & ~PAGE_MASK;
1867 __dma_page_cpu_to_dev(page, offset, size, dir);
1870 struct dma_map_ops iommu_ops = {
1871 .alloc = arm_iommu_alloc_attrs,
1872 .free = arm_iommu_free_attrs,
1873 .mmap = arm_iommu_mmap_attrs,
1874 .get_sgtable = arm_iommu_get_sgtable,
1876 .map_page = arm_iommu_map_page,
1877 .unmap_page = arm_iommu_unmap_page,
1878 .sync_single_for_cpu = arm_iommu_sync_single_for_cpu,
1879 .sync_single_for_device = arm_iommu_sync_single_for_device,
1881 .map_sg = arm_iommu_map_sg,
1882 .unmap_sg = arm_iommu_unmap_sg,
1883 .sync_sg_for_cpu = arm_iommu_sync_sg_for_cpu,
1884 .sync_sg_for_device = arm_iommu_sync_sg_for_device,
1886 .set_dma_mask = arm_dma_set_mask,
1889 struct dma_map_ops iommu_coherent_ops = {
1890 .alloc = arm_iommu_alloc_attrs,
1891 .free = arm_iommu_free_attrs,
1892 .mmap = arm_iommu_mmap_attrs,
1893 .get_sgtable = arm_iommu_get_sgtable,
1895 .map_page = arm_coherent_iommu_map_page,
1896 .unmap_page = arm_coherent_iommu_unmap_page,
1898 .map_sg = arm_coherent_iommu_map_sg,
1899 .unmap_sg = arm_coherent_iommu_unmap_sg,
1901 .set_dma_mask = arm_dma_set_mask,
1905 * arm_iommu_create_mapping
1906 * @bus: pointer to the bus holding the client device (for IOMMU calls)
1907 * @base: start address of the valid IO address space
1908 * @size: maximum size of the valid IO address space
1910 * Creates a mapping structure which holds information about used/unused
1911 * IO address ranges, which is required to perform memory allocation and
1912 * mapping with IOMMU aware functions.
1914 * The client device need to be attached to the mapping with
1915 * arm_iommu_attach_device function.
1917 struct dma_iommu_mapping *
1918 arm_iommu_create_mapping(struct bus_type *bus, dma_addr_t base, u64 size)
1920 unsigned int bits = size >> PAGE_SHIFT;
1921 unsigned int bitmap_size = BITS_TO_LONGS(bits) * sizeof(long);
1922 struct dma_iommu_mapping *mapping;
1926 /* currently only 32-bit DMA address space is supported */
1927 if (size > DMA_BIT_MASK(32) + 1)
1928 return ERR_PTR(-ERANGE);
1931 return ERR_PTR(-EINVAL);
1933 if (bitmap_size > PAGE_SIZE) {
1934 extensions = bitmap_size / PAGE_SIZE;
1935 bitmap_size = PAGE_SIZE;
1938 mapping = kzalloc(sizeof(struct dma_iommu_mapping), GFP_KERNEL);
1942 mapping->bitmap_size = bitmap_size;
1943 mapping->bitmaps = kzalloc(extensions * sizeof(unsigned long *),
1945 if (!mapping->bitmaps)
1948 mapping->bitmaps[0] = kzalloc(bitmap_size, GFP_KERNEL);
1949 if (!mapping->bitmaps[0])
1952 mapping->nr_bitmaps = 1;
1953 mapping->extensions = extensions;
1954 mapping->base = base;
1955 mapping->bits = BITS_PER_BYTE * bitmap_size;
1957 spin_lock_init(&mapping->lock);
1959 mapping->domain = iommu_domain_alloc(bus);
1960 if (!mapping->domain)
1963 kref_init(&mapping->kref);
1966 kfree(mapping->bitmaps[0]);
1968 kfree(mapping->bitmaps);
1972 return ERR_PTR(err);
1974 EXPORT_SYMBOL_GPL(arm_iommu_create_mapping);
1976 static void release_iommu_mapping(struct kref *kref)
1979 struct dma_iommu_mapping *mapping =
1980 container_of(kref, struct dma_iommu_mapping, kref);
1982 iommu_domain_free(mapping->domain);
1983 for (i = 0; i < mapping->nr_bitmaps; i++)
1984 kfree(mapping->bitmaps[i]);
1985 kfree(mapping->bitmaps);
1989 static int extend_iommu_mapping(struct dma_iommu_mapping *mapping)
1993 if (mapping->nr_bitmaps >= mapping->extensions)
1996 next_bitmap = mapping->nr_bitmaps;
1997 mapping->bitmaps[next_bitmap] = kzalloc(mapping->bitmap_size,
1999 if (!mapping->bitmaps[next_bitmap])
2002 mapping->nr_bitmaps++;
2007 void arm_iommu_release_mapping(struct dma_iommu_mapping *mapping)
2010 kref_put(&mapping->kref, release_iommu_mapping);
2012 EXPORT_SYMBOL_GPL(arm_iommu_release_mapping);
2014 static int __arm_iommu_attach_device(struct device *dev,
2015 struct dma_iommu_mapping *mapping)
2019 err = iommu_attach_device(mapping->domain, dev);
2023 kref_get(&mapping->kref);
2024 to_dma_iommu_mapping(dev) = mapping;
2026 pr_debug("Attached IOMMU controller to %s device.\n", dev_name(dev));
2031 * arm_iommu_attach_device
2032 * @dev: valid struct device pointer
2033 * @mapping: io address space mapping structure (returned from
2034 * arm_iommu_create_mapping)
2036 * Attaches specified io address space mapping to the provided device.
2037 * This replaces the dma operations (dma_map_ops pointer) with the
2038 * IOMMU aware version.
2040 * More than one client might be attached to the same io address space
2043 int arm_iommu_attach_device(struct device *dev,
2044 struct dma_iommu_mapping *mapping)
2048 err = __arm_iommu_attach_device(dev, mapping);
2052 set_dma_ops(dev, &iommu_ops);
2055 EXPORT_SYMBOL_GPL(arm_iommu_attach_device);
2057 static void __arm_iommu_detach_device(struct device *dev)
2059 struct dma_iommu_mapping *mapping;
2061 mapping = to_dma_iommu_mapping(dev);
2063 dev_warn(dev, "Not attached\n");
2067 iommu_detach_device(mapping->domain, dev);
2068 kref_put(&mapping->kref, release_iommu_mapping);
2069 to_dma_iommu_mapping(dev) = NULL;
2071 pr_debug("Detached IOMMU controller from %s device.\n", dev_name(dev));
2075 * arm_iommu_detach_device
2076 * @dev: valid struct device pointer
2078 * Detaches the provided device from a previously attached map.
2079 * This voids the dma operations (dma_map_ops pointer)
2081 void arm_iommu_detach_device(struct device *dev)
2083 __arm_iommu_detach_device(dev);
2084 set_dma_ops(dev, NULL);
2086 EXPORT_SYMBOL_GPL(arm_iommu_detach_device);
2088 static struct dma_map_ops *arm_get_iommu_dma_map_ops(bool coherent)
2090 return coherent ? &iommu_coherent_ops : &iommu_ops;
2093 static bool arm_setup_iommu_dma_ops(struct device *dev, u64 dma_base, u64 size,
2094 struct iommu_ops *iommu)
2096 struct dma_iommu_mapping *mapping;
2101 mapping = arm_iommu_create_mapping(dev->bus, dma_base, size);
2102 if (IS_ERR(mapping)) {
2103 pr_warn("Failed to create %llu-byte IOMMU mapping for device %s\n",
2104 size, dev_name(dev));
2108 if (__arm_iommu_attach_device(dev, mapping)) {
2109 pr_warn("Failed to attached device %s to IOMMU_mapping\n",
2111 arm_iommu_release_mapping(mapping);
2118 static void arm_teardown_iommu_dma_ops(struct device *dev)
2120 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
2125 __arm_iommu_detach_device(dev);
2126 arm_iommu_release_mapping(mapping);
2131 static bool arm_setup_iommu_dma_ops(struct device *dev, u64 dma_base, u64 size,
2132 struct iommu_ops *iommu)
2137 static void arm_teardown_iommu_dma_ops(struct device *dev) { }
2139 #define arm_get_iommu_dma_map_ops arm_get_dma_map_ops
2141 #endif /* CONFIG_ARM_DMA_USE_IOMMU */
2143 static struct dma_map_ops *arm_get_dma_map_ops(bool coherent)
2145 return coherent ? &arm_coherent_dma_ops : &arm_dma_ops;
2148 void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
2149 struct iommu_ops *iommu, bool coherent)
2151 struct dma_map_ops *dma_ops;
2153 dev->archdata.dma_coherent = coherent;
2154 if (arm_setup_iommu_dma_ops(dev, dma_base, size, iommu))
2155 dma_ops = arm_get_iommu_dma_map_ops(coherent);
2157 dma_ops = arm_get_dma_map_ops(coherent);
2159 set_dma_ops(dev, dma_ops);
2162 void arch_teardown_dma_ops(struct device *dev)
2164 arm_teardown_iommu_dma_ops(dev);