1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mm/dma-mapping.c
5 * Copyright (C) 2000-2004 Russell King
7 * DMA uncached mapping support.
9 #include <linux/module.h>
11 #include <linux/genalloc.h>
12 #include <linux/gfp.h>
13 #include <linux/errno.h>
14 #include <linux/list.h>
15 #include <linux/init.h>
16 #include <linux/device.h>
17 #include <linux/dma-direct.h>
18 #include <linux/dma-map-ops.h>
19 #include <linux/highmem.h>
20 #include <linux/memblock.h>
21 #include <linux/slab.h>
22 #include <linux/iommu.h>
24 #include <linux/vmalloc.h>
25 #include <linux/sizes.h>
26 #include <linux/cma.h>
28 #include <asm/memory.h>
29 #include <asm/highmem.h>
30 #include <asm/cacheflush.h>
31 #include <asm/tlbflush.h>
32 #include <asm/mach/arch.h>
33 #include <asm/dma-iommu.h>
34 #include <asm/mach/map.h>
35 #include <asm/system_info.h>
36 #include <xen/swiotlb-xen.h>
41 struct arm_dma_alloc_args {
51 struct arm_dma_free_args {
62 struct arm_dma_allocator {
63 void *(*alloc)(struct arm_dma_alloc_args *args,
64 struct page **ret_page);
65 void (*free)(struct arm_dma_free_args *args);
68 struct arm_dma_buffer {
69 struct list_head list;
71 struct arm_dma_allocator *allocator;
74 static LIST_HEAD(arm_dma_bufs);
75 static DEFINE_SPINLOCK(arm_dma_bufs_lock);
77 static struct arm_dma_buffer *arm_dma_buffer_find(void *virt)
79 struct arm_dma_buffer *buf, *found = NULL;
82 spin_lock_irqsave(&arm_dma_bufs_lock, flags);
83 list_for_each_entry(buf, &arm_dma_bufs, list) {
84 if (buf->virt == virt) {
90 spin_unlock_irqrestore(&arm_dma_bufs_lock, flags);
95 * The DMA API is built upon the notion of "buffer ownership". A buffer
96 * is either exclusively owned by the CPU (and therefore may be accessed
97 * by it) or exclusively owned by the DMA device. These helper functions
98 * represent the transitions between these two ownership states.
100 * Note, however, that on later ARMs, this notion does not work due to
101 * speculative prefetches. We model our approach on the assumption that
102 * the CPU does do speculative prefetches, which means we clean caches
103 * before transfers and delay cache invalidation until transfer completion.
106 static void __dma_page_cpu_to_dev(struct page *, unsigned long,
107 size_t, enum dma_data_direction);
108 static void __dma_page_dev_to_cpu(struct page *, unsigned long,
109 size_t, enum dma_data_direction);
112 * arm_dma_map_page - map a portion of a page for streaming DMA
113 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
114 * @page: page that buffer resides in
115 * @offset: offset into page for start of buffer
116 * @size: size of buffer to map
117 * @dir: DMA transfer direction
119 * Ensure that any data held in the cache is appropriately discarded
122 * The device owns this memory once this call has completed. The CPU
123 * can regain ownership by calling dma_unmap_page().
125 static dma_addr_t arm_dma_map_page(struct device *dev, struct page *page,
126 unsigned long offset, size_t size, enum dma_data_direction dir,
129 if ((attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
130 __dma_page_cpu_to_dev(page, offset, size, dir);
131 return pfn_to_dma(dev, page_to_pfn(page)) + offset;
134 static dma_addr_t arm_coherent_dma_map_page(struct device *dev, struct page *page,
135 unsigned long offset, size_t size, enum dma_data_direction dir,
138 return pfn_to_dma(dev, page_to_pfn(page)) + offset;
142 * arm_dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
143 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
144 * @handle: DMA address of buffer
145 * @size: size of buffer (same as passed to dma_map_page)
146 * @dir: DMA transfer direction (same as passed to dma_map_page)
148 * Unmap a page streaming mode DMA translation. The handle and size
149 * must match what was provided in the previous dma_map_page() call.
150 * All other usages are undefined.
152 * After this call, reads by the CPU to the buffer are guaranteed to see
153 * whatever the device wrote there.
155 static void arm_dma_unmap_page(struct device *dev, dma_addr_t handle,
156 size_t size, enum dma_data_direction dir, unsigned long attrs)
158 if ((attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
159 __dma_page_dev_to_cpu(pfn_to_page(dma_to_pfn(dev, handle)),
160 handle & ~PAGE_MASK, size, dir);
163 static void arm_dma_sync_single_for_cpu(struct device *dev,
164 dma_addr_t handle, size_t size, enum dma_data_direction dir)
166 unsigned int offset = handle & (PAGE_SIZE - 1);
167 struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
168 __dma_page_dev_to_cpu(page, offset, size, dir);
171 static void arm_dma_sync_single_for_device(struct device *dev,
172 dma_addr_t handle, size_t size, enum dma_data_direction dir)
174 unsigned int offset = handle & (PAGE_SIZE - 1);
175 struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
176 __dma_page_cpu_to_dev(page, offset, size, dir);
180 * Return whether the given device DMA address mask can be supported
181 * properly. For example, if your device can only drive the low 24-bits
182 * during bus mastering, then you would pass 0x00ffffff as the mask
185 static int arm_dma_supported(struct device *dev, u64 mask)
187 unsigned long max_dma_pfn = min(max_pfn - 1, arm_dma_pfn_limit);
190 * Translate the device's DMA mask to a PFN limit. This
191 * PFN number includes the page which we can DMA to.
193 return dma_to_pfn(dev, mask) >= max_dma_pfn;
196 const struct dma_map_ops arm_dma_ops = {
197 .alloc = arm_dma_alloc,
198 .free = arm_dma_free,
199 .alloc_pages = dma_direct_alloc_pages,
200 .free_pages = dma_direct_free_pages,
201 .mmap = arm_dma_mmap,
202 .get_sgtable = arm_dma_get_sgtable,
203 .map_page = arm_dma_map_page,
204 .unmap_page = arm_dma_unmap_page,
205 .map_sg = arm_dma_map_sg,
206 .unmap_sg = arm_dma_unmap_sg,
207 .map_resource = dma_direct_map_resource,
208 .sync_single_for_cpu = arm_dma_sync_single_for_cpu,
209 .sync_single_for_device = arm_dma_sync_single_for_device,
210 .sync_sg_for_cpu = arm_dma_sync_sg_for_cpu,
211 .sync_sg_for_device = arm_dma_sync_sg_for_device,
212 .dma_supported = arm_dma_supported,
213 .get_required_mask = dma_direct_get_required_mask,
215 EXPORT_SYMBOL(arm_dma_ops);
217 static void *arm_coherent_dma_alloc(struct device *dev, size_t size,
218 dma_addr_t *handle, gfp_t gfp, unsigned long attrs);
219 static void arm_coherent_dma_free(struct device *dev, size_t size, void *cpu_addr,
220 dma_addr_t handle, unsigned long attrs);
221 static int arm_coherent_dma_mmap(struct device *dev, struct vm_area_struct *vma,
222 void *cpu_addr, dma_addr_t dma_addr, size_t size,
223 unsigned long attrs);
225 const struct dma_map_ops arm_coherent_dma_ops = {
226 .alloc = arm_coherent_dma_alloc,
227 .free = arm_coherent_dma_free,
228 .alloc_pages = dma_direct_alloc_pages,
229 .free_pages = dma_direct_free_pages,
230 .mmap = arm_coherent_dma_mmap,
231 .get_sgtable = arm_dma_get_sgtable,
232 .map_page = arm_coherent_dma_map_page,
233 .map_sg = arm_dma_map_sg,
234 .map_resource = dma_direct_map_resource,
235 .dma_supported = arm_dma_supported,
236 .get_required_mask = dma_direct_get_required_mask,
238 EXPORT_SYMBOL(arm_coherent_dma_ops);
240 static void __dma_clear_buffer(struct page *page, size_t size, int coherent_flag)
243 * Ensure that the allocated pages are zeroed, and that any data
244 * lurking in the kernel direct-mapped region is invalidated.
246 if (PageHighMem(page)) {
247 phys_addr_t base = __pfn_to_phys(page_to_pfn(page));
248 phys_addr_t end = base + size;
250 void *ptr = kmap_atomic(page);
251 memset(ptr, 0, PAGE_SIZE);
252 if (coherent_flag != COHERENT)
253 dmac_flush_range(ptr, ptr + PAGE_SIZE);
258 if (coherent_flag != COHERENT)
259 outer_flush_range(base, end);
261 void *ptr = page_address(page);
262 memset(ptr, 0, size);
263 if (coherent_flag != COHERENT) {
264 dmac_flush_range(ptr, ptr + size);
265 outer_flush_range(__pa(ptr), __pa(ptr) + size);
271 * Allocate a DMA buffer for 'dev' of size 'size' using the
272 * specified gfp mask. Note that 'size' must be page aligned.
274 static struct page *__dma_alloc_buffer(struct device *dev, size_t size,
275 gfp_t gfp, int coherent_flag)
277 unsigned long order = get_order(size);
278 struct page *page, *p, *e;
280 page = alloc_pages(gfp, order);
285 * Now split the huge page and free the excess pages
287 split_page(page, order);
288 for (p = page + (size >> PAGE_SHIFT), e = page + (1 << order); p < e; p++)
291 __dma_clear_buffer(page, size, coherent_flag);
297 * Free a DMA buffer. 'size' must be page aligned.
299 static void __dma_free_buffer(struct page *page, size_t size)
301 struct page *e = page + (size >> PAGE_SHIFT);
309 static void *__alloc_from_contiguous(struct device *dev, size_t size,
310 pgprot_t prot, struct page **ret_page,
311 const void *caller, bool want_vaddr,
312 int coherent_flag, gfp_t gfp);
314 static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp,
315 pgprot_t prot, struct page **ret_page,
316 const void *caller, bool want_vaddr);
318 #define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_256K
319 static struct gen_pool *atomic_pool __ro_after_init;
321 static size_t atomic_pool_size __initdata = DEFAULT_DMA_COHERENT_POOL_SIZE;
323 static int __init early_coherent_pool(char *p)
325 atomic_pool_size = memparse(p, &p);
328 early_param("coherent_pool", early_coherent_pool);
331 * Initialise the coherent pool for atomic allocations.
333 static int __init atomic_pool_init(void)
335 pgprot_t prot = pgprot_dmacoherent(PAGE_KERNEL);
336 gfp_t gfp = GFP_KERNEL | GFP_DMA;
340 atomic_pool = gen_pool_create(PAGE_SHIFT, -1);
344 * The atomic pool is only used for non-coherent allocations
345 * so we must pass NORMAL for coherent_flag.
347 if (dev_get_cma_area(NULL))
348 ptr = __alloc_from_contiguous(NULL, atomic_pool_size, prot,
349 &page, atomic_pool_init, true, NORMAL,
352 ptr = __alloc_remap_buffer(NULL, atomic_pool_size, gfp, prot,
353 &page, atomic_pool_init, true);
357 ret = gen_pool_add_virt(atomic_pool, (unsigned long)ptr,
359 atomic_pool_size, -1);
361 goto destroy_genpool;
363 gen_pool_set_algo(atomic_pool,
364 gen_pool_first_fit_order_align,
366 pr_info("DMA: preallocated %zu KiB pool for atomic coherent allocations\n",
367 atomic_pool_size / 1024);
372 gen_pool_destroy(atomic_pool);
375 pr_err("DMA: failed to allocate %zu KiB pool for atomic coherent allocation\n",
376 atomic_pool_size / 1024);
380 * CMA is activated by core_initcall, so we must be called after it.
382 postcore_initcall(atomic_pool_init);
384 struct dma_contig_early_reserve {
389 static struct dma_contig_early_reserve dma_mmu_remap[MAX_CMA_AREAS] __initdata;
391 static int dma_mmu_remap_num __initdata;
393 void __init dma_contiguous_early_fixup(phys_addr_t base, unsigned long size)
395 dma_mmu_remap[dma_mmu_remap_num].base = base;
396 dma_mmu_remap[dma_mmu_remap_num].size = size;
400 void __init dma_contiguous_remap(void)
403 for (i = 0; i < dma_mmu_remap_num; i++) {
404 phys_addr_t start = dma_mmu_remap[i].base;
405 phys_addr_t end = start + dma_mmu_remap[i].size;
409 if (end > arm_lowmem_limit)
410 end = arm_lowmem_limit;
414 map.pfn = __phys_to_pfn(start);
415 map.virtual = __phys_to_virt(start);
416 map.length = end - start;
417 map.type = MT_MEMORY_DMA_READY;
420 * Clear previous low-memory mapping to ensure that the
421 * TLB does not see any conflicting entries, then flush
422 * the TLB of the old entries before creating new mappings.
424 * This ensures that any speculatively loaded TLB entries
425 * (even though they may be rare) can not cause any problems,
426 * and ensures that this code is architecturally compliant.
428 for (addr = __phys_to_virt(start); addr < __phys_to_virt(end);
430 pmd_clear(pmd_off_k(addr));
432 flush_tlb_kernel_range(__phys_to_virt(start),
433 __phys_to_virt(end));
435 iotable_init(&map, 1);
439 static int __dma_update_pte(pte_t *pte, unsigned long addr, void *data)
441 struct page *page = virt_to_page(addr);
442 pgprot_t prot = *(pgprot_t *)data;
444 set_pte_ext(pte, mk_pte(page, prot), 0);
448 static void __dma_remap(struct page *page, size_t size, pgprot_t prot)
450 unsigned long start = (unsigned long) page_address(page);
451 unsigned end = start + size;
453 apply_to_page_range(&init_mm, start, size, __dma_update_pte, &prot);
454 flush_tlb_kernel_range(start, end);
457 static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp,
458 pgprot_t prot, struct page **ret_page,
459 const void *caller, bool want_vaddr)
464 * __alloc_remap_buffer is only called when the device is
467 page = __dma_alloc_buffer(dev, size, gfp, NORMAL);
473 ptr = dma_common_contiguous_remap(page, size, prot, caller);
475 __dma_free_buffer(page, size);
484 static void *__alloc_from_pool(size_t size, struct page **ret_page)
490 WARN(1, "coherent pool not initialised!\n");
494 val = gen_pool_alloc(atomic_pool, size);
496 phys_addr_t phys = gen_pool_virt_to_phys(atomic_pool, val);
498 *ret_page = phys_to_page(phys);
505 static bool __in_atomic_pool(void *start, size_t size)
507 return gen_pool_has_addr(atomic_pool, (unsigned long)start, size);
510 static int __free_from_pool(void *start, size_t size)
512 if (!__in_atomic_pool(start, size))
515 gen_pool_free(atomic_pool, (unsigned long)start, size);
520 static void *__alloc_from_contiguous(struct device *dev, size_t size,
521 pgprot_t prot, struct page **ret_page,
522 const void *caller, bool want_vaddr,
523 int coherent_flag, gfp_t gfp)
525 unsigned long order = get_order(size);
526 size_t count = size >> PAGE_SHIFT;
530 page = dma_alloc_from_contiguous(dev, count, order, gfp & __GFP_NOWARN);
534 __dma_clear_buffer(page, size, coherent_flag);
539 if (PageHighMem(page)) {
540 ptr = dma_common_contiguous_remap(page, size, prot, caller);
542 dma_release_from_contiguous(dev, page, count);
546 __dma_remap(page, size, prot);
547 ptr = page_address(page);
555 static void __free_from_contiguous(struct device *dev, struct page *page,
556 void *cpu_addr, size_t size, bool want_vaddr)
559 if (PageHighMem(page))
560 dma_common_free_remap(cpu_addr, size);
562 __dma_remap(page, size, PAGE_KERNEL);
564 dma_release_from_contiguous(dev, page, size >> PAGE_SHIFT);
567 static inline pgprot_t __get_dma_pgprot(unsigned long attrs, pgprot_t prot)
569 prot = (attrs & DMA_ATTR_WRITE_COMBINE) ?
570 pgprot_writecombine(prot) :
571 pgprot_dmacoherent(prot);
575 static void *__alloc_simple_buffer(struct device *dev, size_t size, gfp_t gfp,
576 struct page **ret_page)
579 /* __alloc_simple_buffer is only called when the device is coherent */
580 page = __dma_alloc_buffer(dev, size, gfp, COHERENT);
585 return page_address(page);
588 static void *simple_allocator_alloc(struct arm_dma_alloc_args *args,
589 struct page **ret_page)
591 return __alloc_simple_buffer(args->dev, args->size, args->gfp,
595 static void simple_allocator_free(struct arm_dma_free_args *args)
597 __dma_free_buffer(args->page, args->size);
600 static struct arm_dma_allocator simple_allocator = {
601 .alloc = simple_allocator_alloc,
602 .free = simple_allocator_free,
605 static void *cma_allocator_alloc(struct arm_dma_alloc_args *args,
606 struct page **ret_page)
608 return __alloc_from_contiguous(args->dev, args->size, args->prot,
609 ret_page, args->caller,
610 args->want_vaddr, args->coherent_flag,
614 static void cma_allocator_free(struct arm_dma_free_args *args)
616 __free_from_contiguous(args->dev, args->page, args->cpu_addr,
617 args->size, args->want_vaddr);
620 static struct arm_dma_allocator cma_allocator = {
621 .alloc = cma_allocator_alloc,
622 .free = cma_allocator_free,
625 static void *pool_allocator_alloc(struct arm_dma_alloc_args *args,
626 struct page **ret_page)
628 return __alloc_from_pool(args->size, ret_page);
631 static void pool_allocator_free(struct arm_dma_free_args *args)
633 __free_from_pool(args->cpu_addr, args->size);
636 static struct arm_dma_allocator pool_allocator = {
637 .alloc = pool_allocator_alloc,
638 .free = pool_allocator_free,
641 static void *remap_allocator_alloc(struct arm_dma_alloc_args *args,
642 struct page **ret_page)
644 return __alloc_remap_buffer(args->dev, args->size, args->gfp,
645 args->prot, ret_page, args->caller,
649 static void remap_allocator_free(struct arm_dma_free_args *args)
651 if (args->want_vaddr)
652 dma_common_free_remap(args->cpu_addr, args->size);
654 __dma_free_buffer(args->page, args->size);
657 static struct arm_dma_allocator remap_allocator = {
658 .alloc = remap_allocator_alloc,
659 .free = remap_allocator_free,
662 static void *__dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
663 gfp_t gfp, pgprot_t prot, bool is_coherent,
664 unsigned long attrs, const void *caller)
666 u64 mask = min_not_zero(dev->coherent_dma_mask, dev->bus_dma_limit);
667 struct page *page = NULL;
669 bool allowblock, cma;
670 struct arm_dma_buffer *buf;
671 struct arm_dma_alloc_args args = {
673 .size = PAGE_ALIGN(size),
677 .want_vaddr = ((attrs & DMA_ATTR_NO_KERNEL_MAPPING) == 0),
678 .coherent_flag = is_coherent ? COHERENT : NORMAL,
681 #ifdef CONFIG_DMA_API_DEBUG
682 u64 limit = (mask + 1) & ~mask;
683 if (limit && size >= limit) {
684 dev_warn(dev, "coherent allocation too big (requested %#x mask %#llx)\n",
690 buf = kzalloc(sizeof(*buf),
691 gfp & ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM));
695 if (mask < 0xffffffffULL)
699 * Following is a work-around (a.k.a. hack) to prevent pages
700 * with __GFP_COMP being passed to split_page() which cannot
701 * handle them. The real problem is that this flag probably
702 * should be 0 on ARM as it is not supported on this
703 * platform; see CONFIG_HUGETLBFS.
705 gfp &= ~(__GFP_COMP);
708 *handle = DMA_MAPPING_ERROR;
709 allowblock = gfpflags_allow_blocking(gfp);
710 cma = allowblock ? dev_get_cma_area(dev) : false;
713 buf->allocator = &cma_allocator;
714 else if (is_coherent)
715 buf->allocator = &simple_allocator;
717 buf->allocator = &remap_allocator;
719 buf->allocator = &pool_allocator;
721 addr = buf->allocator->alloc(&args, &page);
726 *handle = pfn_to_dma(dev, page_to_pfn(page));
727 buf->virt = args.want_vaddr ? addr : page;
729 spin_lock_irqsave(&arm_dma_bufs_lock, flags);
730 list_add(&buf->list, &arm_dma_bufs);
731 spin_unlock_irqrestore(&arm_dma_bufs_lock, flags);
736 return args.want_vaddr ? addr : page;
740 * Allocate DMA-coherent memory space and return both the kernel remapped
741 * virtual and bus address for that space.
743 void *arm_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
744 gfp_t gfp, unsigned long attrs)
746 pgprot_t prot = __get_dma_pgprot(attrs, PAGE_KERNEL);
748 return __dma_alloc(dev, size, handle, gfp, prot, false,
749 attrs, __builtin_return_address(0));
752 static void *arm_coherent_dma_alloc(struct device *dev, size_t size,
753 dma_addr_t *handle, gfp_t gfp, unsigned long attrs)
755 return __dma_alloc(dev, size, handle, gfp, PAGE_KERNEL, true,
756 attrs, __builtin_return_address(0));
759 static int __arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,
760 void *cpu_addr, dma_addr_t dma_addr, size_t size,
764 unsigned long nr_vma_pages = vma_pages(vma);
765 unsigned long nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
766 unsigned long pfn = dma_to_pfn(dev, dma_addr);
767 unsigned long off = vma->vm_pgoff;
769 if (dma_mmap_from_dev_coherent(dev, vma, cpu_addr, size, &ret))
772 if (off < nr_pages && nr_vma_pages <= (nr_pages - off)) {
773 ret = remap_pfn_range(vma, vma->vm_start,
775 vma->vm_end - vma->vm_start,
783 * Create userspace mapping for the DMA-coherent memory.
785 static int arm_coherent_dma_mmap(struct device *dev, struct vm_area_struct *vma,
786 void *cpu_addr, dma_addr_t dma_addr, size_t size,
789 return __arm_dma_mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
792 int arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,
793 void *cpu_addr, dma_addr_t dma_addr, size_t size,
796 vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);
797 return __arm_dma_mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
801 * Free a buffer as defined by the above mapping.
803 static void __arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
804 dma_addr_t handle, unsigned long attrs,
807 struct page *page = pfn_to_page(dma_to_pfn(dev, handle));
808 struct arm_dma_buffer *buf;
809 struct arm_dma_free_args args = {
811 .size = PAGE_ALIGN(size),
812 .cpu_addr = cpu_addr,
814 .want_vaddr = ((attrs & DMA_ATTR_NO_KERNEL_MAPPING) == 0),
817 buf = arm_dma_buffer_find(cpu_addr);
818 if (WARN(!buf, "Freeing invalid buffer %p\n", cpu_addr))
821 buf->allocator->free(&args);
825 void arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
826 dma_addr_t handle, unsigned long attrs)
828 __arm_dma_free(dev, size, cpu_addr, handle, attrs, false);
831 static void arm_coherent_dma_free(struct device *dev, size_t size, void *cpu_addr,
832 dma_addr_t handle, unsigned long attrs)
834 __arm_dma_free(dev, size, cpu_addr, handle, attrs, true);
837 int arm_dma_get_sgtable(struct device *dev, struct sg_table *sgt,
838 void *cpu_addr, dma_addr_t handle, size_t size,
841 unsigned long pfn = dma_to_pfn(dev, handle);
845 /* If the PFN is not valid, we do not have a struct page */
849 page = pfn_to_page(pfn);
851 ret = sg_alloc_table(sgt, 1, GFP_KERNEL);
855 sg_set_page(sgt->sgl, page, PAGE_ALIGN(size), 0);
859 static void dma_cache_maint_page(struct page *page, unsigned long offset,
860 size_t size, enum dma_data_direction dir,
861 void (*op)(const void *, size_t, int))
866 pfn = page_to_pfn(page) + offset / PAGE_SIZE;
870 * A single sg entry may refer to multiple physically contiguous
871 * pages. But we still need to process highmem pages individually.
872 * If highmem is not configured then the bulk of this loop gets
879 page = pfn_to_page(pfn);
881 if (PageHighMem(page)) {
882 if (len + offset > PAGE_SIZE)
883 len = PAGE_SIZE - offset;
885 if (cache_is_vipt_nonaliasing()) {
886 vaddr = kmap_atomic(page);
887 op(vaddr + offset, len, dir);
888 kunmap_atomic(vaddr);
890 vaddr = kmap_high_get(page);
892 op(vaddr + offset, len, dir);
897 vaddr = page_address(page) + offset;
907 * Make an area consistent for devices.
908 * Note: Drivers should NOT use this function directly, as it will break
909 * platforms with CONFIG_DMABOUNCE.
910 * Use the driver DMA support - see dma-mapping.h (dma_sync_*)
912 static void __dma_page_cpu_to_dev(struct page *page, unsigned long off,
913 size_t size, enum dma_data_direction dir)
917 dma_cache_maint_page(page, off, size, dir, dmac_map_area);
919 paddr = page_to_phys(page) + off;
920 if (dir == DMA_FROM_DEVICE) {
921 outer_inv_range(paddr, paddr + size);
923 outer_clean_range(paddr, paddr + size);
925 /* FIXME: non-speculating: flush on bidirectional mappings? */
928 static void __dma_page_dev_to_cpu(struct page *page, unsigned long off,
929 size_t size, enum dma_data_direction dir)
931 phys_addr_t paddr = page_to_phys(page) + off;
933 /* FIXME: non-speculating: not required */
934 /* in any case, don't bother invalidating if DMA to device */
935 if (dir != DMA_TO_DEVICE) {
936 outer_inv_range(paddr, paddr + size);
938 dma_cache_maint_page(page, off, size, dir, dmac_unmap_area);
942 * Mark the D-cache clean for these pages to avoid extra flushing.
944 if (dir != DMA_TO_DEVICE && size >= PAGE_SIZE) {
948 pfn = page_to_pfn(page) + off / PAGE_SIZE;
952 left -= PAGE_SIZE - off;
954 while (left >= PAGE_SIZE) {
955 page = pfn_to_page(pfn++);
956 set_bit(PG_dcache_clean, &page->flags);
963 * arm_dma_map_sg - map a set of SG buffers for streaming mode DMA
964 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
965 * @sg: list of buffers
966 * @nents: number of buffers to map
967 * @dir: DMA transfer direction
969 * Map a set of buffers described by scatterlist in streaming mode for DMA.
970 * This is the scatter-gather version of the dma_map_single interface.
971 * Here the scatter gather list elements are each tagged with the
972 * appropriate dma address and length. They are obtained via
973 * sg_dma_{address,length}.
975 * Device ownership issues as mentioned for dma_map_single are the same
978 int arm_dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
979 enum dma_data_direction dir, unsigned long attrs)
981 const struct dma_map_ops *ops = get_dma_ops(dev);
982 struct scatterlist *s;
985 for_each_sg(sg, s, nents, i) {
986 #ifdef CONFIG_NEED_SG_DMA_LENGTH
987 s->dma_length = s->length;
989 s->dma_address = ops->map_page(dev, sg_page(s), s->offset,
990 s->length, dir, attrs);
991 if (dma_mapping_error(dev, s->dma_address)) {
999 for_each_sg(sg, s, i, j)
1000 ops->unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);
1005 * arm_dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1006 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
1007 * @sg: list of buffers
1008 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1009 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1011 * Unmap a set of streaming mode DMA translations. Again, CPU access
1012 * rules concerning calls here are the same as for dma_unmap_single().
1014 void arm_dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
1015 enum dma_data_direction dir, unsigned long attrs)
1017 const struct dma_map_ops *ops = get_dma_ops(dev);
1018 struct scatterlist *s;
1022 for_each_sg(sg, s, nents, i)
1023 ops->unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);
1027 * arm_dma_sync_sg_for_cpu
1028 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
1029 * @sg: list of buffers
1030 * @nents: number of buffers to map (returned from dma_map_sg)
1031 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1033 void arm_dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
1034 int nents, enum dma_data_direction dir)
1036 const struct dma_map_ops *ops = get_dma_ops(dev);
1037 struct scatterlist *s;
1040 for_each_sg(sg, s, nents, i)
1041 ops->sync_single_for_cpu(dev, sg_dma_address(s), s->length,
1046 * arm_dma_sync_sg_for_device
1047 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
1048 * @sg: list of buffers
1049 * @nents: number of buffers to map (returned from dma_map_sg)
1050 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1052 void arm_dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
1053 int nents, enum dma_data_direction dir)
1055 const struct dma_map_ops *ops = get_dma_ops(dev);
1056 struct scatterlist *s;
1059 for_each_sg(sg, s, nents, i)
1060 ops->sync_single_for_device(dev, sg_dma_address(s), s->length,
1064 static const struct dma_map_ops *arm_get_dma_map_ops(bool coherent)
1067 * When CONFIG_ARM_LPAE is set, physical address can extend above
1068 * 32-bits, which then can't be addressed by devices that only support
1070 * Use the generic dma-direct / swiotlb ops code in that case, as that
1071 * handles bounce buffering for us.
1073 if (IS_ENABLED(CONFIG_ARM_LPAE))
1075 return coherent ? &arm_coherent_dma_ops : &arm_dma_ops;
1078 #ifdef CONFIG_ARM_DMA_USE_IOMMU
1080 static int __dma_info_to_prot(enum dma_data_direction dir, unsigned long attrs)
1084 if (attrs & DMA_ATTR_PRIVILEGED)
1088 case DMA_BIDIRECTIONAL:
1089 return prot | IOMMU_READ | IOMMU_WRITE;
1091 return prot | IOMMU_READ;
1092 case DMA_FROM_DEVICE:
1093 return prot | IOMMU_WRITE;
1101 static int extend_iommu_mapping(struct dma_iommu_mapping *mapping);
1103 static inline dma_addr_t __alloc_iova(struct dma_iommu_mapping *mapping,
1106 unsigned int order = get_order(size);
1107 unsigned int align = 0;
1108 unsigned int count, start;
1109 size_t mapping_size = mapping->bits << PAGE_SHIFT;
1110 unsigned long flags;
1114 if (order > CONFIG_ARM_DMA_IOMMU_ALIGNMENT)
1115 order = CONFIG_ARM_DMA_IOMMU_ALIGNMENT;
1117 count = PAGE_ALIGN(size) >> PAGE_SHIFT;
1118 align = (1 << order) - 1;
1120 spin_lock_irqsave(&mapping->lock, flags);
1121 for (i = 0; i < mapping->nr_bitmaps; i++) {
1122 start = bitmap_find_next_zero_area(mapping->bitmaps[i],
1123 mapping->bits, 0, count, align);
1125 if (start > mapping->bits)
1128 bitmap_set(mapping->bitmaps[i], start, count);
1133 * No unused range found. Try to extend the existing mapping
1134 * and perform a second attempt to reserve an IO virtual
1135 * address range of size bytes.
1137 if (i == mapping->nr_bitmaps) {
1138 if (extend_iommu_mapping(mapping)) {
1139 spin_unlock_irqrestore(&mapping->lock, flags);
1140 return DMA_MAPPING_ERROR;
1143 start = bitmap_find_next_zero_area(mapping->bitmaps[i],
1144 mapping->bits, 0, count, align);
1146 if (start > mapping->bits) {
1147 spin_unlock_irqrestore(&mapping->lock, flags);
1148 return DMA_MAPPING_ERROR;
1151 bitmap_set(mapping->bitmaps[i], start, count);
1153 spin_unlock_irqrestore(&mapping->lock, flags);
1155 iova = mapping->base + (mapping_size * i);
1156 iova += start << PAGE_SHIFT;
1161 static inline void __free_iova(struct dma_iommu_mapping *mapping,
1162 dma_addr_t addr, size_t size)
1164 unsigned int start, count;
1165 size_t mapping_size = mapping->bits << PAGE_SHIFT;
1166 unsigned long flags;
1167 dma_addr_t bitmap_base;
1173 bitmap_index = (u32) (addr - mapping->base) / (u32) mapping_size;
1174 BUG_ON(addr < mapping->base || bitmap_index > mapping->extensions);
1176 bitmap_base = mapping->base + mapping_size * bitmap_index;
1178 start = (addr - bitmap_base) >> PAGE_SHIFT;
1180 if (addr + size > bitmap_base + mapping_size) {
1182 * The address range to be freed reaches into the iova
1183 * range of the next bitmap. This should not happen as
1184 * we don't allow this in __alloc_iova (at the
1189 count = size >> PAGE_SHIFT;
1191 spin_lock_irqsave(&mapping->lock, flags);
1192 bitmap_clear(mapping->bitmaps[bitmap_index], start, count);
1193 spin_unlock_irqrestore(&mapping->lock, flags);
1196 /* We'll try 2M, 1M, 64K, and finally 4K; array must end with 0! */
1197 static const int iommu_order_array[] = { 9, 8, 4, 0 };
1199 static struct page **__iommu_alloc_buffer(struct device *dev, size_t size,
1200 gfp_t gfp, unsigned long attrs,
1203 struct page **pages;
1204 int count = size >> PAGE_SHIFT;
1205 int array_size = count * sizeof(struct page *);
1209 if (array_size <= PAGE_SIZE)
1210 pages = kzalloc(array_size, GFP_KERNEL);
1212 pages = vzalloc(array_size);
1216 if (attrs & DMA_ATTR_FORCE_CONTIGUOUS)
1218 unsigned long order = get_order(size);
1221 page = dma_alloc_from_contiguous(dev, count, order,
1222 gfp & __GFP_NOWARN);
1226 __dma_clear_buffer(page, size, coherent_flag);
1228 for (i = 0; i < count; i++)
1229 pages[i] = page + i;
1234 /* Go straight to 4K chunks if caller says it's OK. */
1235 if (attrs & DMA_ATTR_ALLOC_SINGLE_PAGES)
1236 order_idx = ARRAY_SIZE(iommu_order_array) - 1;
1239 * IOMMU can map any pages, so himem can also be used here
1241 gfp |= __GFP_NOWARN | __GFP_HIGHMEM;
1246 order = iommu_order_array[order_idx];
1248 /* Drop down when we get small */
1249 if (__fls(count) < order) {
1255 /* See if it's easy to allocate a high-order chunk */
1256 pages[i] = alloc_pages(gfp | __GFP_NORETRY, order);
1258 /* Go down a notch at first sign of pressure */
1264 pages[i] = alloc_pages(gfp, 0);
1270 split_page(pages[i], order);
1273 pages[i + j] = pages[i] + j;
1276 __dma_clear_buffer(pages[i], PAGE_SIZE << order, coherent_flag);
1278 count -= 1 << order;
1285 __free_pages(pages[i], 0);
1290 static int __iommu_free_buffer(struct device *dev, struct page **pages,
1291 size_t size, unsigned long attrs)
1293 int count = size >> PAGE_SHIFT;
1296 if (attrs & DMA_ATTR_FORCE_CONTIGUOUS) {
1297 dma_release_from_contiguous(dev, pages[0], count);
1299 for (i = 0; i < count; i++)
1301 __free_pages(pages[i], 0);
1309 * Create a mapping in device IO address space for specified pages
1312 __iommu_create_mapping(struct device *dev, struct page **pages, size_t size,
1313 unsigned long attrs)
1315 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1316 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
1317 dma_addr_t dma_addr, iova;
1320 dma_addr = __alloc_iova(mapping, size);
1321 if (dma_addr == DMA_MAPPING_ERROR)
1325 for (i = 0; i < count; ) {
1328 unsigned int next_pfn = page_to_pfn(pages[i]) + 1;
1329 phys_addr_t phys = page_to_phys(pages[i]);
1330 unsigned int len, j;
1332 for (j = i + 1; j < count; j++, next_pfn++)
1333 if (page_to_pfn(pages[j]) != next_pfn)
1336 len = (j - i) << PAGE_SHIFT;
1337 ret = iommu_map(mapping->domain, iova, phys, len,
1338 __dma_info_to_prot(DMA_BIDIRECTIONAL, attrs));
1346 iommu_unmap(mapping->domain, dma_addr, iova-dma_addr);
1347 __free_iova(mapping, dma_addr, size);
1348 return DMA_MAPPING_ERROR;
1351 static int __iommu_remove_mapping(struct device *dev, dma_addr_t iova, size_t size)
1353 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1356 * add optional in-page offset from iova to size and align
1357 * result to page size
1359 size = PAGE_ALIGN((iova & ~PAGE_MASK) + size);
1362 iommu_unmap(mapping->domain, iova, size);
1363 __free_iova(mapping, iova, size);
1367 static struct page **__atomic_get_pages(void *addr)
1372 phys = gen_pool_virt_to_phys(atomic_pool, (unsigned long)addr);
1373 page = phys_to_page(phys);
1375 return (struct page **)page;
1378 static struct page **__iommu_get_pages(void *cpu_addr, unsigned long attrs)
1380 if (__in_atomic_pool(cpu_addr, PAGE_SIZE))
1381 return __atomic_get_pages(cpu_addr);
1383 if (attrs & DMA_ATTR_NO_KERNEL_MAPPING)
1386 return dma_common_find_pages(cpu_addr);
1389 static void *__iommu_alloc_simple(struct device *dev, size_t size, gfp_t gfp,
1390 dma_addr_t *handle, int coherent_flag,
1391 unsigned long attrs)
1396 if (coherent_flag == COHERENT)
1397 addr = __alloc_simple_buffer(dev, size, gfp, &page);
1399 addr = __alloc_from_pool(size, &page);
1403 *handle = __iommu_create_mapping(dev, &page, size, attrs);
1404 if (*handle == DMA_MAPPING_ERROR)
1410 __free_from_pool(addr, size);
1414 static void __iommu_free_atomic(struct device *dev, void *cpu_addr,
1415 dma_addr_t handle, size_t size, int coherent_flag)
1417 __iommu_remove_mapping(dev, handle, size);
1418 if (coherent_flag == COHERENT)
1419 __dma_free_buffer(virt_to_page(cpu_addr), size);
1421 __free_from_pool(cpu_addr, size);
1424 static void *__arm_iommu_alloc_attrs(struct device *dev, size_t size,
1425 dma_addr_t *handle, gfp_t gfp, unsigned long attrs,
1428 pgprot_t prot = __get_dma_pgprot(attrs, PAGE_KERNEL);
1429 struct page **pages;
1432 *handle = DMA_MAPPING_ERROR;
1433 size = PAGE_ALIGN(size);
1435 if (coherent_flag == COHERENT || !gfpflags_allow_blocking(gfp))
1436 return __iommu_alloc_simple(dev, size, gfp, handle,
1437 coherent_flag, attrs);
1440 * Following is a work-around (a.k.a. hack) to prevent pages
1441 * with __GFP_COMP being passed to split_page() which cannot
1442 * handle them. The real problem is that this flag probably
1443 * should be 0 on ARM as it is not supported on this
1444 * platform; see CONFIG_HUGETLBFS.
1446 gfp &= ~(__GFP_COMP);
1448 pages = __iommu_alloc_buffer(dev, size, gfp, attrs, coherent_flag);
1452 *handle = __iommu_create_mapping(dev, pages, size, attrs);
1453 if (*handle == DMA_MAPPING_ERROR)
1456 if (attrs & DMA_ATTR_NO_KERNEL_MAPPING)
1459 addr = dma_common_pages_remap(pages, size, prot,
1460 __builtin_return_address(0));
1467 __iommu_remove_mapping(dev, *handle, size);
1469 __iommu_free_buffer(dev, pages, size, attrs);
1473 static void *arm_iommu_alloc_attrs(struct device *dev, size_t size,
1474 dma_addr_t *handle, gfp_t gfp, unsigned long attrs)
1476 return __arm_iommu_alloc_attrs(dev, size, handle, gfp, attrs, NORMAL);
1479 static void *arm_coherent_iommu_alloc_attrs(struct device *dev, size_t size,
1480 dma_addr_t *handle, gfp_t gfp, unsigned long attrs)
1482 return __arm_iommu_alloc_attrs(dev, size, handle, gfp, attrs, COHERENT);
1485 static int __arm_iommu_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
1486 void *cpu_addr, dma_addr_t dma_addr, size_t size,
1487 unsigned long attrs)
1489 struct page **pages = __iommu_get_pages(cpu_addr, attrs);
1490 unsigned long nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
1496 if (vma->vm_pgoff >= nr_pages)
1499 err = vm_map_pages(vma, pages, nr_pages);
1501 pr_err("Remapping memory failed: %d\n", err);
1505 static int arm_iommu_mmap_attrs(struct device *dev,
1506 struct vm_area_struct *vma, void *cpu_addr,
1507 dma_addr_t dma_addr, size_t size, unsigned long attrs)
1509 vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);
1511 return __arm_iommu_mmap_attrs(dev, vma, cpu_addr, dma_addr, size, attrs);
1514 static int arm_coherent_iommu_mmap_attrs(struct device *dev,
1515 struct vm_area_struct *vma, void *cpu_addr,
1516 dma_addr_t dma_addr, size_t size, unsigned long attrs)
1518 return __arm_iommu_mmap_attrs(dev, vma, cpu_addr, dma_addr, size, attrs);
1522 * free a page as defined by the above mapping.
1523 * Must not be called with IRQs disabled.
1525 static void __arm_iommu_free_attrs(struct device *dev, size_t size, void *cpu_addr,
1526 dma_addr_t handle, unsigned long attrs, int coherent_flag)
1528 struct page **pages;
1529 size = PAGE_ALIGN(size);
1531 if (coherent_flag == COHERENT || __in_atomic_pool(cpu_addr, size)) {
1532 __iommu_free_atomic(dev, cpu_addr, handle, size, coherent_flag);
1536 pages = __iommu_get_pages(cpu_addr, attrs);
1538 WARN(1, "trying to free invalid coherent area: %p\n", cpu_addr);
1542 if ((attrs & DMA_ATTR_NO_KERNEL_MAPPING) == 0)
1543 dma_common_free_remap(cpu_addr, size);
1545 __iommu_remove_mapping(dev, handle, size);
1546 __iommu_free_buffer(dev, pages, size, attrs);
1549 static void arm_iommu_free_attrs(struct device *dev, size_t size,
1550 void *cpu_addr, dma_addr_t handle,
1551 unsigned long attrs)
1553 __arm_iommu_free_attrs(dev, size, cpu_addr, handle, attrs, NORMAL);
1556 static void arm_coherent_iommu_free_attrs(struct device *dev, size_t size,
1557 void *cpu_addr, dma_addr_t handle, unsigned long attrs)
1559 __arm_iommu_free_attrs(dev, size, cpu_addr, handle, attrs, COHERENT);
1562 static int arm_iommu_get_sgtable(struct device *dev, struct sg_table *sgt,
1563 void *cpu_addr, dma_addr_t dma_addr,
1564 size_t size, unsigned long attrs)
1566 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
1567 struct page **pages = __iommu_get_pages(cpu_addr, attrs);
1572 return sg_alloc_table_from_pages(sgt, pages, count, 0, size,
1577 * Map a part of the scatter-gather list into contiguous io address space
1579 static int __map_sg_chunk(struct device *dev, struct scatterlist *sg,
1580 size_t size, dma_addr_t *handle,
1581 enum dma_data_direction dir, unsigned long attrs,
1584 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1585 dma_addr_t iova, iova_base;
1588 struct scatterlist *s;
1591 size = PAGE_ALIGN(size);
1592 *handle = DMA_MAPPING_ERROR;
1594 iova_base = iova = __alloc_iova(mapping, size);
1595 if (iova == DMA_MAPPING_ERROR)
1598 for (count = 0, s = sg; count < (size >> PAGE_SHIFT); s = sg_next(s)) {
1599 phys_addr_t phys = page_to_phys(sg_page(s));
1600 unsigned int len = PAGE_ALIGN(s->offset + s->length);
1602 if (!is_coherent && (attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
1603 __dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
1605 prot = __dma_info_to_prot(dir, attrs);
1607 ret = iommu_map(mapping->domain, iova, phys, len, prot);
1610 count += len >> PAGE_SHIFT;
1613 *handle = iova_base;
1617 iommu_unmap(mapping->domain, iova_base, count * PAGE_SIZE);
1618 __free_iova(mapping, iova_base, size);
1622 static int __iommu_map_sg(struct device *dev, struct scatterlist *sg, int nents,
1623 enum dma_data_direction dir, unsigned long attrs,
1626 struct scatterlist *s = sg, *dma = sg, *start = sg;
1627 int i, count = 0, ret;
1628 unsigned int offset = s->offset;
1629 unsigned int size = s->offset + s->length;
1630 unsigned int max = dma_get_max_seg_size(dev);
1632 for (i = 1; i < nents; i++) {
1637 if (s->offset || (size & ~PAGE_MASK) || size + s->length > max) {
1638 ret = __map_sg_chunk(dev, start, size,
1639 &dma->dma_address, dir, attrs,
1644 dma->dma_address += offset;
1645 dma->dma_length = size - offset;
1647 size = offset = s->offset;
1654 ret = __map_sg_chunk(dev, start, size, &dma->dma_address, dir, attrs,
1659 dma->dma_address += offset;
1660 dma->dma_length = size - offset;
1665 for_each_sg(sg, s, count, i)
1666 __iommu_remove_mapping(dev, sg_dma_address(s), sg_dma_len(s));
1673 * arm_coherent_iommu_map_sg - map a set of SG buffers for streaming mode DMA
1674 * @dev: valid struct device pointer
1675 * @sg: list of buffers
1676 * @nents: number of buffers to map
1677 * @dir: DMA transfer direction
1679 * Map a set of i/o coherent buffers described by scatterlist in streaming
1680 * mode for DMA. The scatter gather list elements are merged together (if
1681 * possible) and tagged with the appropriate dma address and length. They are
1682 * obtained via sg_dma_{address,length}.
1684 static int arm_coherent_iommu_map_sg(struct device *dev, struct scatterlist *sg,
1685 int nents, enum dma_data_direction dir, unsigned long attrs)
1687 return __iommu_map_sg(dev, sg, nents, dir, attrs, true);
1691 * arm_iommu_map_sg - map a set of SG buffers for streaming mode DMA
1692 * @dev: valid struct device pointer
1693 * @sg: list of buffers
1694 * @nents: number of buffers to map
1695 * @dir: DMA transfer direction
1697 * Map a set of buffers described by scatterlist in streaming mode for DMA.
1698 * The scatter gather list elements are merged together (if possible) and
1699 * tagged with the appropriate dma address and length. They are obtained via
1700 * sg_dma_{address,length}.
1702 static int arm_iommu_map_sg(struct device *dev, struct scatterlist *sg,
1703 int nents, enum dma_data_direction dir, unsigned long attrs)
1705 return __iommu_map_sg(dev, sg, nents, dir, attrs, false);
1708 static void __iommu_unmap_sg(struct device *dev, struct scatterlist *sg,
1709 int nents, enum dma_data_direction dir,
1710 unsigned long attrs, bool is_coherent)
1712 struct scatterlist *s;
1715 for_each_sg(sg, s, nents, i) {
1717 __iommu_remove_mapping(dev, sg_dma_address(s),
1719 if (!is_coherent && (attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
1720 __dma_page_dev_to_cpu(sg_page(s), s->offset,
1726 * arm_coherent_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1727 * @dev: valid struct device pointer
1728 * @sg: list of buffers
1729 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1730 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1732 * Unmap a set of streaming mode DMA translations. Again, CPU access
1733 * rules concerning calls here are the same as for dma_unmap_single().
1735 static void arm_coherent_iommu_unmap_sg(struct device *dev,
1736 struct scatterlist *sg, int nents, enum dma_data_direction dir,
1737 unsigned long attrs)
1739 __iommu_unmap_sg(dev, sg, nents, dir, attrs, true);
1743 * arm_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1744 * @dev: valid struct device pointer
1745 * @sg: list of buffers
1746 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1747 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1749 * Unmap a set of streaming mode DMA translations. Again, CPU access
1750 * rules concerning calls here are the same as for dma_unmap_single().
1752 static void arm_iommu_unmap_sg(struct device *dev,
1753 struct scatterlist *sg, int nents,
1754 enum dma_data_direction dir,
1755 unsigned long attrs)
1757 __iommu_unmap_sg(dev, sg, nents, dir, attrs, false);
1761 * arm_iommu_sync_sg_for_cpu
1762 * @dev: valid struct device pointer
1763 * @sg: list of buffers
1764 * @nents: number of buffers to map (returned from dma_map_sg)
1765 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1767 static void arm_iommu_sync_sg_for_cpu(struct device *dev,
1768 struct scatterlist *sg,
1769 int nents, enum dma_data_direction dir)
1771 struct scatterlist *s;
1774 for_each_sg(sg, s, nents, i)
1775 __dma_page_dev_to_cpu(sg_page(s), s->offset, s->length, dir);
1780 * arm_iommu_sync_sg_for_device
1781 * @dev: valid struct device pointer
1782 * @sg: list of buffers
1783 * @nents: number of buffers to map (returned from dma_map_sg)
1784 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1786 static void arm_iommu_sync_sg_for_device(struct device *dev,
1787 struct scatterlist *sg,
1788 int nents, enum dma_data_direction dir)
1790 struct scatterlist *s;
1793 for_each_sg(sg, s, nents, i)
1794 __dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
1799 * arm_coherent_iommu_map_page
1800 * @dev: valid struct device pointer
1801 * @page: page that buffer resides in
1802 * @offset: offset into page for start of buffer
1803 * @size: size of buffer to map
1804 * @dir: DMA transfer direction
1806 * Coherent IOMMU aware version of arm_dma_map_page()
1808 static dma_addr_t arm_coherent_iommu_map_page(struct device *dev, struct page *page,
1809 unsigned long offset, size_t size, enum dma_data_direction dir,
1810 unsigned long attrs)
1812 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1813 dma_addr_t dma_addr;
1814 int ret, prot, len = PAGE_ALIGN(size + offset);
1816 dma_addr = __alloc_iova(mapping, len);
1817 if (dma_addr == DMA_MAPPING_ERROR)
1820 prot = __dma_info_to_prot(dir, attrs);
1822 ret = iommu_map(mapping->domain, dma_addr, page_to_phys(page), len, prot);
1826 return dma_addr + offset;
1828 __free_iova(mapping, dma_addr, len);
1829 return DMA_MAPPING_ERROR;
1833 * arm_iommu_map_page
1834 * @dev: valid struct device pointer
1835 * @page: page that buffer resides in
1836 * @offset: offset into page for start of buffer
1837 * @size: size of buffer to map
1838 * @dir: DMA transfer direction
1840 * IOMMU aware version of arm_dma_map_page()
1842 static dma_addr_t arm_iommu_map_page(struct device *dev, struct page *page,
1843 unsigned long offset, size_t size, enum dma_data_direction dir,
1844 unsigned long attrs)
1846 if ((attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
1847 __dma_page_cpu_to_dev(page, offset, size, dir);
1849 return arm_coherent_iommu_map_page(dev, page, offset, size, dir, attrs);
1853 * arm_coherent_iommu_unmap_page
1854 * @dev: valid struct device pointer
1855 * @handle: DMA address of buffer
1856 * @size: size of buffer (same as passed to dma_map_page)
1857 * @dir: DMA transfer direction (same as passed to dma_map_page)
1859 * Coherent IOMMU aware version of arm_dma_unmap_page()
1861 static void arm_coherent_iommu_unmap_page(struct device *dev, dma_addr_t handle,
1862 size_t size, enum dma_data_direction dir, unsigned long attrs)
1864 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1865 dma_addr_t iova = handle & PAGE_MASK;
1866 int offset = handle & ~PAGE_MASK;
1867 int len = PAGE_ALIGN(size + offset);
1872 iommu_unmap(mapping->domain, iova, len);
1873 __free_iova(mapping, iova, len);
1877 * arm_iommu_unmap_page
1878 * @dev: valid struct device pointer
1879 * @handle: DMA address of buffer
1880 * @size: size of buffer (same as passed to dma_map_page)
1881 * @dir: DMA transfer direction (same as passed to dma_map_page)
1883 * IOMMU aware version of arm_dma_unmap_page()
1885 static void arm_iommu_unmap_page(struct device *dev, dma_addr_t handle,
1886 size_t size, enum dma_data_direction dir, unsigned long attrs)
1888 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1889 dma_addr_t iova = handle & PAGE_MASK;
1890 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1891 int offset = handle & ~PAGE_MASK;
1892 int len = PAGE_ALIGN(size + offset);
1897 if ((attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
1898 __dma_page_dev_to_cpu(page, offset, size, dir);
1900 iommu_unmap(mapping->domain, iova, len);
1901 __free_iova(mapping, iova, len);
1905 * arm_iommu_map_resource - map a device resource for DMA
1906 * @dev: valid struct device pointer
1907 * @phys_addr: physical address of resource
1908 * @size: size of resource to map
1909 * @dir: DMA transfer direction
1911 static dma_addr_t arm_iommu_map_resource(struct device *dev,
1912 phys_addr_t phys_addr, size_t size,
1913 enum dma_data_direction dir, unsigned long attrs)
1915 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1916 dma_addr_t dma_addr;
1918 phys_addr_t addr = phys_addr & PAGE_MASK;
1919 unsigned int offset = phys_addr & ~PAGE_MASK;
1920 size_t len = PAGE_ALIGN(size + offset);
1922 dma_addr = __alloc_iova(mapping, len);
1923 if (dma_addr == DMA_MAPPING_ERROR)
1926 prot = __dma_info_to_prot(dir, attrs) | IOMMU_MMIO;
1928 ret = iommu_map(mapping->domain, dma_addr, addr, len, prot);
1932 return dma_addr + offset;
1934 __free_iova(mapping, dma_addr, len);
1935 return DMA_MAPPING_ERROR;
1939 * arm_iommu_unmap_resource - unmap a device DMA resource
1940 * @dev: valid struct device pointer
1941 * @dma_handle: DMA address to resource
1942 * @size: size of resource to map
1943 * @dir: DMA transfer direction
1945 static void arm_iommu_unmap_resource(struct device *dev, dma_addr_t dma_handle,
1946 size_t size, enum dma_data_direction dir,
1947 unsigned long attrs)
1949 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1950 dma_addr_t iova = dma_handle & PAGE_MASK;
1951 unsigned int offset = dma_handle & ~PAGE_MASK;
1952 size_t len = PAGE_ALIGN(size + offset);
1957 iommu_unmap(mapping->domain, iova, len);
1958 __free_iova(mapping, iova, len);
1961 static void arm_iommu_sync_single_for_cpu(struct device *dev,
1962 dma_addr_t handle, size_t size, enum dma_data_direction dir)
1964 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1965 dma_addr_t iova = handle & PAGE_MASK;
1966 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1967 unsigned int offset = handle & ~PAGE_MASK;
1972 __dma_page_dev_to_cpu(page, offset, size, dir);
1975 static void arm_iommu_sync_single_for_device(struct device *dev,
1976 dma_addr_t handle, size_t size, enum dma_data_direction dir)
1978 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1979 dma_addr_t iova = handle & PAGE_MASK;
1980 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1981 unsigned int offset = handle & ~PAGE_MASK;
1986 __dma_page_cpu_to_dev(page, offset, size, dir);
1989 static const struct dma_map_ops iommu_ops = {
1990 .alloc = arm_iommu_alloc_attrs,
1991 .free = arm_iommu_free_attrs,
1992 .mmap = arm_iommu_mmap_attrs,
1993 .get_sgtable = arm_iommu_get_sgtable,
1995 .map_page = arm_iommu_map_page,
1996 .unmap_page = arm_iommu_unmap_page,
1997 .sync_single_for_cpu = arm_iommu_sync_single_for_cpu,
1998 .sync_single_for_device = arm_iommu_sync_single_for_device,
2000 .map_sg = arm_iommu_map_sg,
2001 .unmap_sg = arm_iommu_unmap_sg,
2002 .sync_sg_for_cpu = arm_iommu_sync_sg_for_cpu,
2003 .sync_sg_for_device = arm_iommu_sync_sg_for_device,
2005 .map_resource = arm_iommu_map_resource,
2006 .unmap_resource = arm_iommu_unmap_resource,
2008 .dma_supported = arm_dma_supported,
2011 static const struct dma_map_ops iommu_coherent_ops = {
2012 .alloc = arm_coherent_iommu_alloc_attrs,
2013 .free = arm_coherent_iommu_free_attrs,
2014 .mmap = arm_coherent_iommu_mmap_attrs,
2015 .get_sgtable = arm_iommu_get_sgtable,
2017 .map_page = arm_coherent_iommu_map_page,
2018 .unmap_page = arm_coherent_iommu_unmap_page,
2020 .map_sg = arm_coherent_iommu_map_sg,
2021 .unmap_sg = arm_coherent_iommu_unmap_sg,
2023 .map_resource = arm_iommu_map_resource,
2024 .unmap_resource = arm_iommu_unmap_resource,
2026 .dma_supported = arm_dma_supported,
2030 * arm_iommu_create_mapping
2031 * @bus: pointer to the bus holding the client device (for IOMMU calls)
2032 * @base: start address of the valid IO address space
2033 * @size: maximum size of the valid IO address space
2035 * Creates a mapping structure which holds information about used/unused
2036 * IO address ranges, which is required to perform memory allocation and
2037 * mapping with IOMMU aware functions.
2039 * The client device need to be attached to the mapping with
2040 * arm_iommu_attach_device function.
2042 struct dma_iommu_mapping *
2043 arm_iommu_create_mapping(struct bus_type *bus, dma_addr_t base, u64 size)
2045 unsigned int bits = size >> PAGE_SHIFT;
2046 unsigned int bitmap_size = BITS_TO_LONGS(bits) * sizeof(long);
2047 struct dma_iommu_mapping *mapping;
2051 /* currently only 32-bit DMA address space is supported */
2052 if (size > DMA_BIT_MASK(32) + 1)
2053 return ERR_PTR(-ERANGE);
2056 return ERR_PTR(-EINVAL);
2058 if (bitmap_size > PAGE_SIZE) {
2059 extensions = bitmap_size / PAGE_SIZE;
2060 bitmap_size = PAGE_SIZE;
2063 mapping = kzalloc(sizeof(struct dma_iommu_mapping), GFP_KERNEL);
2067 mapping->bitmap_size = bitmap_size;
2068 mapping->bitmaps = kcalloc(extensions, sizeof(unsigned long *),
2070 if (!mapping->bitmaps)
2073 mapping->bitmaps[0] = kzalloc(bitmap_size, GFP_KERNEL);
2074 if (!mapping->bitmaps[0])
2077 mapping->nr_bitmaps = 1;
2078 mapping->extensions = extensions;
2079 mapping->base = base;
2080 mapping->bits = BITS_PER_BYTE * bitmap_size;
2082 spin_lock_init(&mapping->lock);
2084 mapping->domain = iommu_domain_alloc(bus);
2085 if (!mapping->domain)
2088 kref_init(&mapping->kref);
2091 kfree(mapping->bitmaps[0]);
2093 kfree(mapping->bitmaps);
2097 return ERR_PTR(err);
2099 EXPORT_SYMBOL_GPL(arm_iommu_create_mapping);
2101 static void release_iommu_mapping(struct kref *kref)
2104 struct dma_iommu_mapping *mapping =
2105 container_of(kref, struct dma_iommu_mapping, kref);
2107 iommu_domain_free(mapping->domain);
2108 for (i = 0; i < mapping->nr_bitmaps; i++)
2109 kfree(mapping->bitmaps[i]);
2110 kfree(mapping->bitmaps);
2114 static int extend_iommu_mapping(struct dma_iommu_mapping *mapping)
2118 if (mapping->nr_bitmaps >= mapping->extensions)
2121 next_bitmap = mapping->nr_bitmaps;
2122 mapping->bitmaps[next_bitmap] = kzalloc(mapping->bitmap_size,
2124 if (!mapping->bitmaps[next_bitmap])
2127 mapping->nr_bitmaps++;
2132 void arm_iommu_release_mapping(struct dma_iommu_mapping *mapping)
2135 kref_put(&mapping->kref, release_iommu_mapping);
2137 EXPORT_SYMBOL_GPL(arm_iommu_release_mapping);
2139 static int __arm_iommu_attach_device(struct device *dev,
2140 struct dma_iommu_mapping *mapping)
2144 err = iommu_attach_device(mapping->domain, dev);
2148 kref_get(&mapping->kref);
2149 to_dma_iommu_mapping(dev) = mapping;
2151 pr_debug("Attached IOMMU controller to %s device.\n", dev_name(dev));
2156 * arm_iommu_attach_device
2157 * @dev: valid struct device pointer
2158 * @mapping: io address space mapping structure (returned from
2159 * arm_iommu_create_mapping)
2161 * Attaches specified io address space mapping to the provided device.
2162 * This replaces the dma operations (dma_map_ops pointer) with the
2163 * IOMMU aware version.
2165 * More than one client might be attached to the same io address space
2168 int arm_iommu_attach_device(struct device *dev,
2169 struct dma_iommu_mapping *mapping)
2173 err = __arm_iommu_attach_device(dev, mapping);
2177 set_dma_ops(dev, &iommu_ops);
2180 EXPORT_SYMBOL_GPL(arm_iommu_attach_device);
2183 * arm_iommu_detach_device
2184 * @dev: valid struct device pointer
2186 * Detaches the provided device from a previously attached map.
2187 * This overwrites the dma_ops pointer with appropriate non-IOMMU ops.
2189 void arm_iommu_detach_device(struct device *dev)
2191 struct dma_iommu_mapping *mapping;
2193 mapping = to_dma_iommu_mapping(dev);
2195 dev_warn(dev, "Not attached\n");
2199 iommu_detach_device(mapping->domain, dev);
2200 kref_put(&mapping->kref, release_iommu_mapping);
2201 to_dma_iommu_mapping(dev) = NULL;
2202 set_dma_ops(dev, arm_get_dma_map_ops(dev->archdata.dma_coherent));
2204 pr_debug("Detached IOMMU controller from %s device.\n", dev_name(dev));
2206 EXPORT_SYMBOL_GPL(arm_iommu_detach_device);
2208 static const struct dma_map_ops *arm_get_iommu_dma_map_ops(bool coherent)
2210 return coherent ? &iommu_coherent_ops : &iommu_ops;
2213 static bool arm_setup_iommu_dma_ops(struct device *dev, u64 dma_base, u64 size,
2214 const struct iommu_ops *iommu)
2216 struct dma_iommu_mapping *mapping;
2221 mapping = arm_iommu_create_mapping(dev->bus, dma_base, size);
2222 if (IS_ERR(mapping)) {
2223 pr_warn("Failed to create %llu-byte IOMMU mapping for device %s\n",
2224 size, dev_name(dev));
2228 if (__arm_iommu_attach_device(dev, mapping)) {
2229 pr_warn("Failed to attached device %s to IOMMU_mapping\n",
2231 arm_iommu_release_mapping(mapping);
2238 static void arm_teardown_iommu_dma_ops(struct device *dev)
2240 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
2245 arm_iommu_detach_device(dev);
2246 arm_iommu_release_mapping(mapping);
2251 static bool arm_setup_iommu_dma_ops(struct device *dev, u64 dma_base, u64 size,
2252 const struct iommu_ops *iommu)
2257 static void arm_teardown_iommu_dma_ops(struct device *dev) { }
2259 #define arm_get_iommu_dma_map_ops arm_get_dma_map_ops
2261 #endif /* CONFIG_ARM_DMA_USE_IOMMU */
2263 void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
2264 const struct iommu_ops *iommu, bool coherent)
2266 const struct dma_map_ops *dma_ops;
2268 dev->archdata.dma_coherent = coherent;
2269 #ifdef CONFIG_SWIOTLB
2270 dev->dma_coherent = coherent;
2274 * Don't override the dma_ops if they have already been set. Ideally
2275 * this should be the only location where dma_ops are set, remove this
2276 * check when all other callers of set_dma_ops will have disappeared.
2281 if (arm_setup_iommu_dma_ops(dev, dma_base, size, iommu))
2282 dma_ops = arm_get_iommu_dma_map_ops(coherent);
2284 dma_ops = arm_get_dma_map_ops(coherent);
2286 set_dma_ops(dev, dma_ops);
2289 if (xen_initial_domain())
2290 dev->dma_ops = &xen_swiotlb_dma_ops;
2292 dev->archdata.dma_ops_setup = true;
2295 void arch_teardown_dma_ops(struct device *dev)
2297 if (!dev->archdata.dma_ops_setup)
2300 arm_teardown_iommu_dma_ops(dev);
2301 /* Let arch_setup_dma_ops() start again from scratch upon re-probe */
2302 set_dma_ops(dev, NULL);
2305 #ifdef CONFIG_SWIOTLB
2306 void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
2307 enum dma_data_direction dir)
2309 __dma_page_cpu_to_dev(phys_to_page(paddr), paddr & (PAGE_SIZE - 1),
2313 void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,
2314 enum dma_data_direction dir)
2316 __dma_page_dev_to_cpu(phys_to_page(paddr), paddr & (PAGE_SIZE - 1),
2320 void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle,
2321 gfp_t gfp, unsigned long attrs)
2323 return __dma_alloc(dev, size, dma_handle, gfp,
2324 __get_dma_pgprot(attrs, PAGE_KERNEL), false,
2325 attrs, __builtin_return_address(0));
2328 void arch_dma_free(struct device *dev, size_t size, void *cpu_addr,
2329 dma_addr_t dma_handle, unsigned long attrs)
2331 __arm_dma_free(dev, size, cpu_addr, dma_handle, attrs, false);
2333 #endif /* CONFIG_SWIOTLB */