arch/arm/mach-sa1100/nanoengine.c

   1 /*
   2  * linux/arch/arm/mach-sa1100/nanoengine.c
   3  *
   4  * Bright Star Engineering's nanoEngine board init code.
   5  *
   6  * Copyright (C) 2010 Marcelo Roberto Jimenez <mroberto@cpti.cetuc.puc-rio.br>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  *
  12  */
  13
  14 #include <linux/init.h>
  15 #include <linux/gpio/machine.h>
  16 #include <linux/kernel.h>
  17 #include <linux/platform_data/sa11x0-serial.h>
  18 #include <linux/mtd/mtd.h>
  19 #include <linux/mtd/partitions.h>
  20 #include <linux/root_dev.h>
  21
  22 #include <asm/mach-types.h>
  23 #include <asm/setup.h>
  24 #include <asm/page.h>
  25
  26 #include <asm/mach/arch.h>
  27 #include <asm/mach/flash.h>
  28 #include <asm/mach/map.h>
  29
  30 #include <mach/hardware.h>
  31 #include <mach/nanoengine.h>
  32 #include <mach/irqs.h>
  33
  34 #include "generic.h"
  35
  36 /* Flash bank 0 */
  37 static struct mtd_partition nanoengine_partitions[] = {
  38         {
  39                 .name   = "nanoEngine boot firmware and parameter table",
  40                 .size           = 0x00010000,  /* 32K */
  41                 .offset         = 0,
  42                 .mask_flags     = MTD_WRITEABLE,
  43         }, {
  44                 .name           = "kernel/initrd reserved",
  45                 .size           = 0x002f0000,
  46                 .offset         = 0x00010000,
  47                 .mask_flags     = MTD_WRITEABLE,
  48         }, {
  49                 .name           = "experimental filesystem allocation",
  50                 .size           = 0x00100000,
  51                 .offset         = 0x00300000,
  52                 .mask_flags     = MTD_WRITEABLE,
  53         }
  54 };
  55
  56 static struct flash_platform_data nanoengine_flash_data = {
  57         .map_name       = "jedec_probe",
  58         .parts          = nanoengine_partitions,
  59         .nr_parts       = ARRAY_SIZE(nanoengine_partitions),
  60 };
  61
  62 static struct resource nanoengine_flash_resources[] = {
  63         DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M),
  64         DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_32M),
  65 };
  66
  67 static struct map_desc nanoengine_io_desc[] __initdata = {
  68         {
  69                 /* System Registers */
  70                 .virtual        = 0xf0000000,
  71                 .pfn            = __phys_to_pfn(0x10000000),
  72                 .length         = 0x00100000,
  73                 .type           = MT_DEVICE
  74         }, {
  75                 /* Internal PCI Memory Read/Write */
  76                 .virtual        = NANO_PCI_MEM_RW_VIRT,
  77                 .pfn            = __phys_to_pfn(NANO_PCI_MEM_RW_PHYS),
  78                 .length         = NANO_PCI_MEM_RW_SIZE,
  79                 .type           = MT_DEVICE
  80         }, {
  81                 /* Internal PCI Config Space */
  82                 .virtual        = NANO_PCI_CONFIG_SPACE_VIRT,
  83                 .pfn            = __phys_to_pfn(NANO_PCI_CONFIG_SPACE_PHYS),
  84                 .length         = NANO_PCI_CONFIG_SPACE_SIZE,
  85                 .type           = MT_DEVICE
  86         }
  87 };
  88
  89 static void __init nanoengine_map_io(void)
  90 {
  91         sa1100_map_io();
  92         iotable_init(nanoengine_io_desc, ARRAY_SIZE(nanoengine_io_desc));
  93
  94         sa1100_register_uart(0, 1);
  95         sa1100_register_uart(1, 2);
  96         sa1100_register_uart(2, 3);
  97         Ser1SDCR0 |= SDCR0_UART;
  98         /* disable IRDA -- UART2 is used as a normal serial port */
  99         Ser2UTCR4 = 0;
 100         Ser2HSCR0 = 0;
 101 }
 102
 103 static struct gpiod_lookup_table nanoengine_pcmcia0_gpio_table = {
 104         .dev_id = "sa11x0-pcmcia.0",
 105         .table = {
 106                 GPIO_LOOKUP("gpio", 11, "ready", GPIO_ACTIVE_HIGH),
 107                 GPIO_LOOKUP("gpio", 13, "detect", GPIO_ACTIVE_LOW),
 108                 GPIO_LOOKUP("gpio", 15, "reset", GPIO_ACTIVE_HIGH),
 109                 { },
 110         },
 111 };
 112
 113 static struct gpiod_lookup_table nanoengine_pcmcia1_gpio_table = {
 114         .dev_id = "sa11x0-pcmcia.1",
 115         .table = {
 116                 GPIO_LOOKUP("gpio", 12, "ready", GPIO_ACTIVE_HIGH),
 117                 GPIO_LOOKUP("gpio", 14, "detect", GPIO_ACTIVE_LOW),
 118                 GPIO_LOOKUP("gpio", 16, "reset", GPIO_ACTIVE_HIGH),
 119                 { },
 120         },
 121 };
 122
 123 static void __init nanoengine_init(void)
 124 {
 125         sa11x0_register_pcmcia(0, &nanoengine_pcmcia0_gpio_table);
 126         sa11x0_register_pcmcia(1, &nanoengine_pcmcia1_gpio_table);
 127         sa11x0_register_mtd(&nanoengine_flash_data, nanoengine_flash_resources,
 128                 ARRAY_SIZE(nanoengine_flash_resources));
 129 }
 130
 131 MACHINE_START(NANOENGINE, "BSE nanoEngine")
 132         .atag_offset    = 0x100,
 133         .map_io         = nanoengine_map_io,
 134         .nr_irqs        = SA1100_NR_IRQS,
 135         .init_irq       = sa1100_init_irq,
 136         .init_time      = sa1100_timer_init,
 137         .init_machine   = nanoengine_init,
 138         .init_late      = sa11x0_init_late,
 139         .restart        = sa11x0_restart,
 140 MACHINE_END