1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mach-sa1100/generic.c
5 * Author: Nicolas Pitre
7 * Code common to all SA11x0 machines.
9 #include <linux/gpio.h>
10 #include <linux/gpio/machine.h>
11 #include <linux/module.h>
12 #include <linux/kernel.h>
13 #include <linux/init.h>
14 #include <linux/delay.h>
15 #include <linux/dma-mapping.h>
17 #include <linux/cpufreq.h>
18 #include <linux/ioport.h>
19 #include <linux/platform_device.h>
20 #include <linux/reboot.h>
21 #include <linux/regulator/fixed.h>
22 #include <linux/regulator/machine.h>
23 #include <linux/irqchip/irq-sa11x0.h>
25 #include <video/sa1100fb.h>
27 #include <soc/sa1100/pwer.h>
29 #include <asm/div64.h>
30 #include <asm/mach/map.h>
31 #include <asm/mach/flash.h>
33 #include <asm/system_misc.h>
35 #include <mach/hardware.h>
36 #include <mach/irqs.h>
37 #include <mach/reset.h>
40 #include <clocksource/pxa.h>
42 unsigned int reset_status;
43 EXPORT_SYMBOL(reset_status);
48 * This table is setup for a 3.6864MHz Crystal.
50 struct cpufreq_frequency_table sa11x0_freq_table[NR_FREQS+1] = {
51 { .frequency = 59000, /* 59.0 MHz */},
52 { .frequency = 73700, /* 73.7 MHz */},
53 { .frequency = 88500, /* 88.5 MHz */},
54 { .frequency = 103200, /* 103.2 MHz */},
55 { .frequency = 118000, /* 118.0 MHz */},
56 { .frequency = 132700, /* 132.7 MHz */},
57 { .frequency = 147500, /* 147.5 MHz */},
58 { .frequency = 162200, /* 162.2 MHz */},
59 { .frequency = 176900, /* 176.9 MHz */},
60 { .frequency = 191700, /* 191.7 MHz */},
61 { .frequency = 206400, /* 206.4 MHz */},
62 { .frequency = 221200, /* 221.2 MHz */},
63 { .frequency = 235900, /* 235.9 MHz */},
64 { .frequency = 250700, /* 250.7 MHz */},
65 { .frequency = 265400, /* 265.4 MHz */},
66 { .frequency = 280200, /* 280.2 MHz */},
67 { .frequency = CPUFREQ_TABLE_END, },
70 unsigned int sa11x0_getspeed(unsigned int cpu)
74 return sa11x0_freq_table[PPCR & 0xf].frequency;
78 * Default power-off for SA1100
80 static void sa1100_power_off(void)
84 /* disable internal oscillator, float CS lines */
85 PCFR = (PCFR_OPDE | PCFR_FP | PCFR_FS);
86 /* enable wake-up on GPIO0 (Assabet...) */
87 PWER = GFER = GRER = 1;
89 * set scratchpad to zero, just in case it is used as a
90 * restart address by the bootloader.
93 /* enter sleep mode */
97 void sa11x0_restart(enum reboot_mode mode, const char *cmd)
99 clear_reset_status(RESET_STATUS_ALL);
101 if (mode == REBOOT_SOFT) {
102 /* Jump into ROM at address 0 */
105 /* Use on-chip reset capability */
110 static void sa11x0_register_device(struct platform_device *dev, void *data)
113 dev->dev.platform_data = data;
114 err = platform_device_register(dev);
116 printk(KERN_ERR "Unable to register device %s: %d\n",
121 static struct resource sa11x0udc_resources[] = {
122 [0] = DEFINE_RES_MEM(__PREG(Ser0UDCCR), SZ_64K),
123 [1] = DEFINE_RES_IRQ(IRQ_Ser0UDC),
126 static u64 sa11x0udc_dma_mask = 0xffffffffUL;
128 static struct platform_device sa11x0udc_device = {
129 .name = "sa11x0-udc",
132 .dma_mask = &sa11x0udc_dma_mask,
133 .coherent_dma_mask = 0xffffffff,
135 .num_resources = ARRAY_SIZE(sa11x0udc_resources),
136 .resource = sa11x0udc_resources,
139 static struct resource sa11x0uart1_resources[] = {
140 [0] = DEFINE_RES_MEM(__PREG(Ser1UTCR0), SZ_64K),
141 [1] = DEFINE_RES_IRQ(IRQ_Ser1UART),
144 static struct platform_device sa11x0uart1_device = {
145 .name = "sa11x0-uart",
147 .num_resources = ARRAY_SIZE(sa11x0uart1_resources),
148 .resource = sa11x0uart1_resources,
151 static struct resource sa11x0uart3_resources[] = {
152 [0] = DEFINE_RES_MEM(__PREG(Ser3UTCR0), SZ_64K),
153 [1] = DEFINE_RES_IRQ(IRQ_Ser3UART),
156 static struct platform_device sa11x0uart3_device = {
157 .name = "sa11x0-uart",
159 .num_resources = ARRAY_SIZE(sa11x0uart3_resources),
160 .resource = sa11x0uart3_resources,
163 static struct resource sa11x0mcp_resources[] = {
164 [0] = DEFINE_RES_MEM(__PREG(Ser4MCCR0), SZ_64K),
165 [1] = DEFINE_RES_MEM(__PREG(Ser4MCCR1), 4),
166 [2] = DEFINE_RES_IRQ(IRQ_Ser4MCP),
169 static u64 sa11x0mcp_dma_mask = 0xffffffffUL;
171 static struct platform_device sa11x0mcp_device = {
172 .name = "sa11x0-mcp",
175 .dma_mask = &sa11x0mcp_dma_mask,
176 .coherent_dma_mask = 0xffffffff,
178 .num_resources = ARRAY_SIZE(sa11x0mcp_resources),
179 .resource = sa11x0mcp_resources,
182 void __init sa11x0_ppc_configure_mcp(void)
184 /* Setup the PPC unit for the MCP */
186 PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM;
188 PSDR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
189 PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
192 void sa11x0_register_mcp(struct mcp_plat_data *data)
194 sa11x0_register_device(&sa11x0mcp_device, data);
197 static struct resource sa11x0ssp_resources[] = {
198 [0] = DEFINE_RES_MEM(0x80070000, SZ_64K),
199 [1] = DEFINE_RES_IRQ(IRQ_Ser4SSP),
202 static u64 sa11x0ssp_dma_mask = 0xffffffffUL;
204 static struct platform_device sa11x0ssp_device = {
205 .name = "sa11x0-ssp",
208 .dma_mask = &sa11x0ssp_dma_mask,
209 .coherent_dma_mask = 0xffffffff,
211 .num_resources = ARRAY_SIZE(sa11x0ssp_resources),
212 .resource = sa11x0ssp_resources,
215 static struct resource sa11x0fb_resources[] = {
216 [0] = DEFINE_RES_MEM(0xb0100000, SZ_64K),
217 [1] = DEFINE_RES_IRQ(IRQ_LCD),
220 static struct platform_device sa11x0fb_device = {
224 .coherent_dma_mask = 0xffffffff,
226 .num_resources = ARRAY_SIZE(sa11x0fb_resources),
227 .resource = sa11x0fb_resources,
230 void sa11x0_register_lcd(struct sa1100fb_mach_info *inf)
232 sa11x0_register_device(&sa11x0fb_device, inf);
235 void sa11x0_register_pcmcia(int socket, struct gpiod_lookup_table *table)
238 gpiod_add_lookup_table(table);
239 platform_device_register_simple("sa11x0-pcmcia", socket, NULL, 0);
242 static struct platform_device sa11x0mtd_device = {
243 .name = "sa1100-mtd",
247 void sa11x0_register_mtd(struct flash_platform_data *flash,
248 struct resource *res, int nr)
250 flash->name = "sa1100";
251 sa11x0mtd_device.resource = res;
252 sa11x0mtd_device.num_resources = nr;
253 sa11x0_register_device(&sa11x0mtd_device, flash);
256 static struct resource sa11x0ir_resources[] = {
257 DEFINE_RES_MEM(__PREG(Ser2UTCR0), 0x24),
258 DEFINE_RES_MEM(__PREG(Ser2HSCR0), 0x1c),
259 DEFINE_RES_MEM(__PREG(Ser2HSCR2), 0x04),
260 DEFINE_RES_IRQ(IRQ_Ser2ICP),
263 static struct platform_device sa11x0ir_device = {
266 .num_resources = ARRAY_SIZE(sa11x0ir_resources),
267 .resource = sa11x0ir_resources,
270 void sa11x0_register_irda(struct irda_platform_data *irda)
272 sa11x0_register_device(&sa11x0ir_device, irda);
275 static struct resource sa1100_rtc_resources[] = {
276 DEFINE_RES_MEM(0x90010000, 0x40),
277 DEFINE_RES_IRQ_NAMED(IRQ_RTC1Hz, "rtc 1Hz"),
278 DEFINE_RES_IRQ_NAMED(IRQ_RTCAlrm, "rtc alarm"),
281 static struct platform_device sa11x0rtc_device = {
282 .name = "sa1100-rtc",
284 .num_resources = ARRAY_SIZE(sa1100_rtc_resources),
285 .resource = sa1100_rtc_resources,
288 static struct resource sa11x0dma_resources[] = {
289 DEFINE_RES_MEM(DMA_PHYS, DMA_SIZE),
290 DEFINE_RES_IRQ(IRQ_DMA0),
291 DEFINE_RES_IRQ(IRQ_DMA1),
292 DEFINE_RES_IRQ(IRQ_DMA2),
293 DEFINE_RES_IRQ(IRQ_DMA3),
294 DEFINE_RES_IRQ(IRQ_DMA4),
295 DEFINE_RES_IRQ(IRQ_DMA5),
298 static u64 sa11x0dma_dma_mask = DMA_BIT_MASK(32);
300 static struct platform_device sa11x0dma_device = {
301 .name = "sa11x0-dma",
304 .dma_mask = &sa11x0dma_dma_mask,
305 .coherent_dma_mask = 0xffffffff,
307 .num_resources = ARRAY_SIZE(sa11x0dma_resources),
308 .resource = sa11x0dma_resources,
311 static struct platform_device *sa11x0_devices[] __initdata = {
320 static int __init sa1100_init(void)
322 pm_power_off = sa1100_power_off;
324 regulator_has_full_constraints();
326 return platform_add_devices(sa11x0_devices, ARRAY_SIZE(sa11x0_devices));
329 arch_initcall(sa1100_init);
331 void __init sa11x0_init_late(void)
336 int __init sa11x0_register_fixed_regulator(int n,
337 struct fixed_voltage_config *cfg,
338 struct regulator_consumer_supply *supplies, unsigned num_supplies,
341 struct regulator_init_data *id;
343 cfg->init_data = id = kzalloc(sizeof(*cfg->init_data), GFP_KERNEL);
348 id->constraints.always_on = 1;
349 id->constraints.name = cfg->supply_name;
350 id->constraints.min_uV = cfg->microvolts;
351 id->constraints.max_uV = cfg->microvolts;
352 id->constraints.valid_modes_mask = REGULATOR_MODE_NORMAL;
353 id->constraints.valid_ops_mask = REGULATOR_CHANGE_STATUS;
354 id->consumer_supplies = supplies;
355 id->num_consumer_supplies = num_supplies;
357 platform_device_register_resndata(NULL, "reg-fixed-voltage", n,
358 NULL, 0, cfg, sizeof(*cfg));
363 * Common I/O mapping:
365 * Typically, static virtual address mappings are as follow:
367 * 0xf0000000-0xf3ffffff: miscellaneous stuff (CPLDs, etc.)
368 * 0xf4000000-0xf4ffffff: SA-1111
369 * 0xf5000000-0xf5ffffff: reserved (used by cache flushing area)
370 * 0xf6000000-0xfffeffff: reserved (internal SA1100 IO defined above)
371 * 0xffff0000-0xffff0fff: SA1100 exception vectors
372 * 0xffff2000-0xffff2fff: Minicache copy_user_page area
374 * Below 0xe8000000 is reserved for vm allocation.
376 * The machine specific code must provide the extra mapping beside the
377 * default mapping provided here.
380 static struct map_desc standard_io_desc[] __initdata = {
382 .virtual = 0xf8000000,
383 .pfn = __phys_to_pfn(0x80000000),
384 .length = 0x00100000,
387 .virtual = 0xfa000000,
388 .pfn = __phys_to_pfn(0x90000000),
389 .length = 0x00100000,
392 .virtual = 0xfc000000,
393 .pfn = __phys_to_pfn(0xa0000000),
394 .length = 0x00100000,
397 .virtual = 0xfe000000,
398 .pfn = __phys_to_pfn(0xb0000000),
399 .length = 0x00200000,
404 void __init sa1100_map_io(void)
406 iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
409 void __init sa1100_timer_init(void)
411 pxa_timer_nodt_init(IRQ_OST0, io_p2v(0x90000000));
414 static struct resource irq_resource =
415 DEFINE_RES_MEM_NAMED(0x90050000, SZ_64K, "irqs");
417 void __init sa1100_init_irq(void)
419 request_resource(&iomem_resource, &irq_resource);
421 sa11x0_init_irq_nodt(IRQ_GPIO0_SC, irq_resource.start);
428 * Disable the memory bus request/grant signals on the SA1110 to
429 * ensure that we don't receive spurious memory requests. We set
430 * the MBGNT signal false to ensure the SA1111 doesn't own the
433 void sa1110_mb_disable(void)
437 local_irq_save(flags);
441 GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
443 GAFR &= ~(GPIO_MBGNT | GPIO_MBREQ);
445 local_irq_restore(flags);
449 * If the system is going to use the SA-1111 DMA engines, set up
450 * the memory bus request/grant pins.
452 void sa1110_mb_enable(void)
456 local_irq_save(flags);
460 GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
462 GAFR |= (GPIO_MBGNT | GPIO_MBREQ);
465 local_irq_restore(flags);
468 int sa11x0_gpio_set_wake(unsigned int gpio, unsigned int on)
478 int sa11x0_sc_set_wake(unsigned int irq, unsigned int on)
480 if (BIT(irq) != IC_RTCAlrm)