1 /* linux/arch/arm/mach-s3c64xx/mach-mini6410.c
3 * Copyright 2010 Darius Augulis <augulis.darius@gmail.com>
4 * Copyright 2008 Openmoko, Inc.
5 * Copyright 2008 Simtec Electronics
6 * Ben Dooks <ben@simtec.co.uk>
7 * http://armlinux.simtec.co.uk/
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
15 #include <linux/init.h>
16 #include <linux/interrupt.h>
18 #include <linux/gpio.h>
19 #include <linux/kernel.h>
20 #include <linux/list.h>
21 #include <linux/dm9000.h>
22 #include <linux/mtd/mtd.h>
23 #include <linux/mtd/partitions.h>
24 #include <linux/serial_core.h>
25 #include <linux/serial_s3c.h>
26 #include <linux/types.h>
28 #include <asm/mach-types.h>
29 #include <asm/mach/arch.h>
30 #include <asm/mach/map.h>
33 #include <mach/regs-gpio.h>
34 #include <mach/gpio-samsung.h>
38 #include <plat/devs.h>
40 #include <linux/platform_data/mtd-nand-s3c2410.h>
41 #include <linux/platform_data/mmc-sdhci-s3c.h>
42 #include <plat/sdhci.h>
43 #include <linux/platform_data/touchscreen-s3c2410.h>
45 #include <video/platform_lcd.h>
46 #include <video/samsung_fimd.h>
47 #include <plat/samsung-time.h>
50 #include "regs-modem.h"
51 #include "regs-srom.h"
53 #define UCON S3C2410_UCON_DEFAULT
54 #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
55 #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
57 static struct s3c2410_uartcfg mini6410_uartcfgs[] __initdata = {
88 /* DM9000AEP 10/100 ethernet controller */
90 static struct resource mini6410_dm9k_resource[] = {
91 [0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1, 2),
92 [1] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1 + 4, 2),
93 [2] = DEFINE_RES_NAMED(S3C_EINT(7), 1, NULL, IORESOURCE_IRQ \
94 | IORESOURCE_IRQ_HIGHLEVEL),
97 static struct dm9000_plat_data mini6410_dm9k_pdata = {
98 .flags = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM),
101 static struct platform_device mini6410_device_eth = {
104 .num_resources = ARRAY_SIZE(mini6410_dm9k_resource),
105 .resource = mini6410_dm9k_resource,
107 .platform_data = &mini6410_dm9k_pdata,
111 static struct mtd_partition mini6410_nand_part[] = {
124 .size = MTDPART_SIZ_FULL,
125 .offset = SZ_1M + SZ_2M,
129 static struct s3c2410_nand_set mini6410_nand_sets[] = {
133 .nr_partitions = ARRAY_SIZE(mini6410_nand_part),
134 .partitions = mini6410_nand_part,
138 static struct s3c2410_platform_nand mini6410_nand_info = {
142 .nr_sets = ARRAY_SIZE(mini6410_nand_sets),
143 .sets = mini6410_nand_sets,
146 static struct s3c_fb_pd_win mini6410_lcd_type0_fb_win = {
153 static struct fb_videomode mini6410_lcd_type0_timing = {
165 static struct s3c_fb_pd_win mini6410_lcd_type1_fb_win = {
172 static struct fb_videomode mini6410_lcd_type1_timing = {
184 static struct s3c_fb_platdata mini6410_lcd_pdata[] __initdata = {
186 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
187 .vtiming = &mini6410_lcd_type0_timing,
188 .win[0] = &mini6410_lcd_type0_fb_win,
189 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
190 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
192 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
193 .vtiming = &mini6410_lcd_type1_timing,
194 .win[0] = &mini6410_lcd_type1_fb_win,
195 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
196 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
201 static void mini6410_lcd_power_set(struct plat_lcd_data *pd,
205 gpio_direction_output(S3C64XX_GPE(0), 1);
207 gpio_direction_output(S3C64XX_GPE(0), 0);
210 static struct plat_lcd_data mini6410_lcd_power_data = {
211 .set_power = mini6410_lcd_power_set,
214 static struct platform_device mini6410_lcd_powerdev = {
215 .name = "platform-lcd",
216 .dev.parent = &s3c_device_fb.dev,
217 .dev.platform_data = &mini6410_lcd_power_data,
220 static struct s3c_sdhci_platdata mini6410_hsmmc1_pdata = {
222 .cd_type = S3C_SDHCI_CD_GPIO,
223 .ext_cd_gpio = S3C64XX_GPN(10),
224 .ext_cd_gpio_invert = true,
227 static struct platform_device *mini6410_devices[] __initdata = {
228 &mini6410_device_eth,
234 &mini6410_lcd_powerdev,
239 static void __init mini6410_map_io(void)
243 s3c64xx_init_io(NULL, 0);
244 s3c64xx_set_xtal_freq(12000000);
245 s3c24xx_init_uarts(mini6410_uartcfgs, ARRAY_SIZE(mini6410_uartcfgs));
246 samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
248 /* set the LCD type */
249 tmp = __raw_readl(S3C64XX_SPCON);
250 tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
251 tmp |= S3C64XX_SPCON_LCD_SEL_RGB;
252 __raw_writel(tmp, S3C64XX_SPCON);
254 /* remove the LCD bypass */
255 tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
256 tmp &= ~MIFPCON_LCD_BYPASS;
257 __raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
261 * mini6410_features string
263 * 0-9 LCD configuration
266 static char mini6410_features_str[12] __initdata = "0";
268 static int __init mini6410_features_setup(char *str)
271 strlcpy(mini6410_features_str, str,
272 sizeof(mini6410_features_str));
276 __setup("mini6410=", mini6410_features_setup);
278 #define FEATURE_SCREEN (1 << 0)
280 struct mini6410_features_t {
285 static void mini6410_parse_features(
286 struct mini6410_features_t *features,
287 const char *features_str)
289 const char *fp = features_str;
292 features->lcd_index = 0;
298 case '0'...'9': /* tft screen */
299 if (features->done & FEATURE_SCREEN) {
300 printk(KERN_INFO "MINI6410: '%c' ignored, "
301 "screen type already set\n", f);
304 if (li >= ARRAY_SIZE(mini6410_lcd_pdata))
305 printk(KERN_INFO "MINI6410: '%c' out "
306 "of range LCD mode\n", f);
308 features->lcd_index = li;
311 features->done |= FEATURE_SCREEN;
317 static void __init mini6410_machine_init(void)
320 struct mini6410_features_t features = { 0 };
322 printk(KERN_INFO "MINI6410: Option string mini6410=%s\n",
323 mini6410_features_str);
325 /* Parse the feature string */
326 mini6410_parse_features(&features, mini6410_features_str);
328 printk(KERN_INFO "MINI6410: selected LCD display is %dx%d\n",
329 mini6410_lcd_pdata[features.lcd_index].win[0]->xres,
330 mini6410_lcd_pdata[features.lcd_index].win[0]->yres);
332 s3c_nand_set_platdata(&mini6410_nand_info);
333 s3c_fb_set_platdata(&mini6410_lcd_pdata[features.lcd_index]);
334 s3c_sdhci1_set_platdata(&mini6410_hsmmc1_pdata);
335 s3c24xx_ts_set_platdata(NULL);
337 /* configure nCS1 width to 16 bits */
339 cs1 = __raw_readl(S3C64XX_SROM_BW) &
340 ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
341 cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) |
342 (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) |
343 (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
344 S3C64XX_SROM_BW__NCS1__SHIFT;
345 __raw_writel(cs1, S3C64XX_SROM_BW);
347 /* set timing for nCS1 suitable for ethernet chip */
349 __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) |
350 (6 << S3C64XX_SROM_BCX__TACP__SHIFT) |
351 (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) |
352 (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) |
353 (13 << S3C64XX_SROM_BCX__TACC__SHIFT) |
354 (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) |
355 (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);
357 gpio_request(S3C64XX_GPF(15), "LCD power");
358 gpio_request(S3C64XX_GPE(0), "LCD power");
360 platform_add_devices(mini6410_devices, ARRAY_SIZE(mini6410_devices));
363 MACHINE_START(MINI6410, "MINI6410")
364 /* Maintainer: Darius Augulis <augulis.darius@gmail.com> */
365 .atag_offset = 0x100,
366 .init_irq = s3c6410_init_irq,
367 .map_io = mini6410_map_io,
368 .init_machine = mini6410_machine_init,
369 .init_time = samsung_timer_init,
370 .restart = s3c64xx_restart,