arch/arm/mach-pxa/xcep.c

   1 /*  linux/arch/arm/mach-pxa/xcep.c
   2  *
   3  *  Support for the Iskratel Electronics XCEP platform as used in
   4  *  the Libera instruments from Instrumentation Technologies.
   5  *
   6  *  Author:     Ales Bardorfer <ales@i-tech.si>
   7  *  Contributions by: Abbott, MG (Michael) <michael.abbott@diamond.ac.uk>
   8  *  Contributions by: Matej Kenda <matej.kenda@i-tech.si>
   9  *  Created:    June 2006
  10  *  Copyright:  (C) 2006-2009 Instrumentation Technologies
  11  *
  12  *  This program is free software; you can redistribute it and/or modify
  13  *  it under the terms of the GNU General Public License version 2 as
  14  *  published by the Free Software Foundation.
  15  */
  16
  17 #include <linux/platform_device.h>
  18 #include <linux/i2c.h>
  19 #include <linux/platform_data/i2c-pxa.h>
  20 #include <linux/smc91x.h>
  21 #include <linux/mtd/mtd.h>
  22 #include <linux/mtd/partitions.h>
  23 #include <linux/mtd/physmap.h>
  24
  25 #include <asm/mach-types.h>
  26 #include <asm/mach/arch.h>
  27 #include <asm/mach/irq.h>
  28 #include <asm/mach/map.h>
  29
  30 #include <mach/hardware.h>
  31 #include "pxa25x.h"
  32 #include <mach/smemc.h>
  33
  34 #include "generic.h"
  35 #include "devices.h"
  36
  37 #define XCEP_ETH_PHYS           (PXA_CS3_PHYS + 0x00000300)
  38 #define XCEP_ETH_PHYS_END       (PXA_CS3_PHYS + 0x000fffff)
  39 #define XCEP_ETH_ATTR           (PXA_CS3_PHYS + 0x02000000)
  40 #define XCEP_ETH_ATTR_END       (PXA_CS3_PHYS + 0x020fffff)
  41 #define XCEP_ETH_IRQ            IRQ_GPIO0
  42
  43 /*  XCEP CPLD base */
  44 #define XCEP_CPLD_BASE          0xf0000000
  45
  46
  47 /* Flash partitions. */
  48
  49 static struct mtd_partition xcep_partitions[] = {
  50         {
  51                 .name =         "Bootloader",
  52                 .size =         0x00040000,
  53                 .offset =       0,
  54                 .mask_flags =   MTD_WRITEABLE
  55         }, {
  56                 .name =         "Bootloader ENV",
  57                 .size =         0x00040000,
  58                 .offset =       0x00040000,
  59                 .mask_flags =   MTD_WRITEABLE
  60         }, {
  61                 .name =         "Kernel",
  62                 .size =         0x00100000,
  63                 .offset =       0x00080000,
  64         }, {
  65                 .name =         "Rescue fs",
  66                 .size =         0x00280000,
  67                 .offset =       0x00180000,
  68         }, {
  69                 .name =         "Filesystem",
  70                 .size =         MTDPART_SIZ_FULL,
  71                 .offset =       0x00400000
  72         }
  73 };
  74
  75 static struct physmap_flash_data xcep_flash_data[] = {
  76         {
  77                 .width          = 4,            /* bankwidth in bytes */
  78                 .parts          = xcep_partitions,
  79                 .nr_parts       = ARRAY_SIZE(xcep_partitions)
  80         }
  81 };
  82
  83 static struct resource flash_resource = {
  84         .start  = PXA_CS0_PHYS,
  85         .end    = PXA_CS0_PHYS + SZ_32M - 1,
  86         .flags  = IORESOURCE_MEM,
  87 };
  88
  89 static struct platform_device flash_device = {
  90         .name   = "physmap-flash",
  91         .id     = 0,
  92         .dev    = {
  93                 .platform_data = xcep_flash_data,
  94         },
  95         .resource = &flash_resource,
  96         .num_resources = 1,
  97 };
  98
  99
 100
 101 /* SMC LAN91C111 network controller. */
 102
 103 static struct resource smc91x_resources[] = {
 104         [0] = {
 105                 .name   = "smc91x-regs",
 106                 .start  = XCEP_ETH_PHYS,
 107                 .end    = XCEP_ETH_PHYS_END,
 108                 .flags  = IORESOURCE_MEM,
 109         },
 110         [1] = {
 111                 .start  = XCEP_ETH_IRQ,
 112                 .end    = XCEP_ETH_IRQ,
 113                 .flags  = IORESOURCE_IRQ,
 114         },
 115         [2] = {
 116                 .name   = "smc91x-attrib",
 117                 .start  = XCEP_ETH_ATTR,
 118                 .end    = XCEP_ETH_ATTR_END,
 119                 .flags  = IORESOURCE_MEM,
 120         },
 121 };
 122
 123 static struct smc91x_platdata xcep_smc91x_info = {
 124         .flags  = SMC91X_USE_8BIT | SMC91X_USE_16BIT | SMC91X_USE_32BIT |
 125                   SMC91X_NOWAIT | SMC91X_USE_DMA,
 126 };
 127
 128 static struct platform_device smc91x_device = {
 129         .name           = "smc91x",
 130         .id             = -1,
 131         .num_resources  = ARRAY_SIZE(smc91x_resources),
 132         .resource       = smc91x_resources,
 133         .dev            = {
 134                 .platform_data = &xcep_smc91x_info,
 135         },
 136 };
 137
 138
 139 static struct platform_device *devices[] __initdata = {
 140         &flash_device,
 141         &smc91x_device,
 142 };
 143
 144
 145 /* We have to state that there are HWMON devices on the I2C bus on XCEP.
 146  * Drivers for HWMON verify capabilities of the adapter when loading and
 147  * refuse to attach if the adapter doesn't support HWMON class of devices. */
 148 static struct i2c_pxa_platform_data xcep_i2c_platform_data  = {
 149         .class = I2C_CLASS_HWMON
 150 };
 151
 152
 153 static mfp_cfg_t xcep_pin_config[] __initdata = {
 154         GPIO79_nCS_3,   /* SMC 91C111 chip select. */
 155         GPIO80_nCS_4,   /* CPLD chip select. */
 156         /* SSP communication to MSP430 */
 157         GPIO23_SSP1_SCLK,
 158         GPIO24_SSP1_SFRM,
 159         GPIO25_SSP1_TXD,
 160         GPIO26_SSP1_RXD,
 161         GPIO27_SSP1_EXTCLK
 162 };
 163
 164 static void __init xcep_init(void)
 165 {
 166         pxa2xx_mfp_config(ARRAY_AND_SIZE(xcep_pin_config));
 167
 168         pxa_set_ffuart_info(NULL);
 169         pxa_set_btuart_info(NULL);
 170         pxa_set_stuart_info(NULL);
 171         pxa_set_hwuart_info(NULL);
 172
 173         /* See Intel XScale Developer's Guide for details */
 174         /* Set RDF and RDN to appropriate values (chip select 3 (smc91x)) */
 175         __raw_writel((__raw_readl(MSC1) & 0xffff) | 0xD5540000, MSC1);
 176         /* Set RDF and RDN to appropriate values (chip select 5 (fpga)) */
 177         __raw_writel((__raw_readl(MSC2) & 0xffff) | 0x72A00000, MSC2);
 178
 179         platform_add_devices(ARRAY_AND_SIZE(devices));
 180         pxa_set_i2c_info(&xcep_i2c_platform_data);
 181 }
 182
 183 MACHINE_START(XCEP, "Iskratel XCEP")
 184         .atag_offset    = 0x100,
 185         .init_machine   = xcep_init,
 186         .map_io         = pxa25x_map_io,
 187         .nr_irqs        = PXA_NR_IRQS,
 188         .init_irq       = pxa25x_init_irq,
 189         .handle_irq     = pxa25x_handle_irq,
 190         .init_time      = pxa_timer_init,
 191         .restart        = pxa_restart,
 192 MACHINE_END
 193