1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mach-pxa/cm-x255.c
5 * Copyright (C) 2007, 2008 CompuLab, Ltd.
6 * Mike Rapoport <mike@compulab.co.il>
9 #include <linux/platform_device.h>
10 #include <linux/irq.h>
11 #include <linux/mtd/partitions.h>
12 #include <linux/mtd/physmap.h>
13 #include <linux/mtd/nand-gpio.h>
14 #include <linux/gpio/machine.h>
15 #include <linux/spi/spi.h>
16 #include <linux/spi/pxa2xx_spi.h>
18 #include <asm/mach/arch.h>
19 #include <asm/mach-types.h>
20 #include <asm/mach/map.h>
26 #define GPIO_NAND_CS (5)
27 #define GPIO_NAND_ALE (4)
28 #define GPIO_NAND_CLE (3)
29 #define GPIO_NAND_RB (10)
31 static unsigned long cmx255_pin_config[] = {
34 GPIO29_AC97_SDATA_IN_0,
35 GPIO30_AC97_SDATA_OUT,
75 /* SDRAM and local bus */
84 GPIO0_GPIO | WAKEUP_ON_EDGE_BOTH,
85 GPIO9_GPIO, /* PC card reset */
88 GPIO5_GPIO | MFP_LPM_DRIVE_HIGH, /* NAND CE# */
89 GPIO4_GPIO | MFP_LPM_DRIVE_LOW, /* NAND ALE */
90 GPIO3_GPIO | MFP_LPM_DRIVE_LOW, /* NAND CLE */
91 GPIO10_GPIO, /* NAND Ready/Busy */
94 GPIO22_GPIO, /* DM9000 interrupt */
97 #if defined(CONFIG_SPI_PXA2XX)
98 static struct pxa2xx_spi_controller pxa_ssp_master_info = {
102 static struct spi_board_info spi_board_info[] __initdata = {
104 .modalias = "rtc-max6902",
105 .max_speed_hz = 1000000,
111 static void __init cmx255_init_rtc(void)
113 pxa2xx_set_spi_info(1, &pxa_ssp_master_info);
114 spi_register_board_info(ARRAY_AND_SIZE(spi_board_info));
117 static inline void cmx255_init_rtc(void) {}
120 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
121 static struct mtd_partition cmx255_nor_partitions[] = {
126 .mask_flags = MTD_WRITEABLE /* force read-only */
128 .name = "ARMmon setup block",
130 .offset = MTDPART_OFS_APPEND,
131 .mask_flags = MTD_WRITEABLE /* force read-only */
135 .offset = MTDPART_OFS_APPEND,
138 .size = MTDPART_SIZ_FULL,
139 .offset = MTDPART_OFS_APPEND
143 static struct physmap_flash_data cmx255_nor_flash_data[] = {
145 .width = 2, /* bankwidth in bytes */
146 .parts = cmx255_nor_partitions,
147 .nr_parts = ARRAY_SIZE(cmx255_nor_partitions)
151 static struct resource cmx255_nor_resource = {
152 .start = PXA_CS0_PHYS,
153 .end = PXA_CS0_PHYS + SZ_8M - 1,
154 .flags = IORESOURCE_MEM,
157 static struct platform_device cmx255_nor = {
158 .name = "physmap-flash",
161 .platform_data = cmx255_nor_flash_data,
163 .resource = &cmx255_nor_resource,
167 static void __init cmx255_init_nor(void)
169 platform_device_register(&cmx255_nor);
172 static inline void cmx255_init_nor(void) {}
175 #if defined(CONFIG_MTD_NAND_GPIO) || defined(CONFIG_MTD_NAND_GPIO_MODULE)
177 static struct gpiod_lookup_table cmx255_nand_gpiod_table = {
178 .dev_id = "gpio-nand",
180 GPIO_LOOKUP("gpio-pxa", GPIO_NAND_CS, "nce", GPIO_ACTIVE_HIGH),
181 GPIO_LOOKUP("gpio-pxa", GPIO_NAND_CLE, "cle", GPIO_ACTIVE_HIGH),
182 GPIO_LOOKUP("gpio-pxa", GPIO_NAND_ALE, "ale", GPIO_ACTIVE_HIGH),
183 GPIO_LOOKUP("gpio-pxa", GPIO_NAND_RB, "rdy", GPIO_ACTIVE_HIGH),
187 static struct resource cmx255_nand_resource[] = {
189 .start = PXA_CS1_PHYS,
190 .end = PXA_CS1_PHYS + 11,
191 .flags = IORESOURCE_MEM,
194 .start = PXA_CS5_PHYS,
195 .end = PXA_CS5_PHYS + 3,
196 .flags = IORESOURCE_MEM,
200 static struct mtd_partition cmx255_nand_parts[] = {
202 .name = "cmx255-nand",
203 .size = MTDPART_SIZ_FULL,
208 static struct gpio_nand_platdata cmx255_nand_platdata = {
209 .parts = cmx255_nand_parts,
210 .num_parts = ARRAY_SIZE(cmx255_nand_parts),
214 static struct platform_device cmx255_nand = {
216 .num_resources = ARRAY_SIZE(cmx255_nand_resource),
217 .resource = cmx255_nand_resource,
220 .platform_data = &cmx255_nand_platdata,
224 static void __init cmx255_init_nand(void)
226 gpiod_add_lookup_table(&cmx255_nand_gpiod_table);
227 platform_device_register(&cmx255_nand);
230 static inline void cmx255_init_nand(void) {}
233 void __init cmx255_init(void)
235 pxa2xx_mfp_config(ARRAY_AND_SIZE(cmx255_pin_config));