1 // SPDX-License-Identifier: GPL-2.0-only
2 // arch/arm/mach-orion5x/wrt350n-v2-setup.c
3 #include <linux/gpio.h>
4 #include <linux/kernel.h>
5 #include <linux/init.h>
6 #include <linux/platform_device.h>
9 #include <linux/delay.h>
10 #include <linux/mtd/physmap.h>
11 #include <linux/mv643xx_eth.h>
12 #include <linux/ethtool.h>
13 #include <linux/leds.h>
14 #include <linux/gpio_keys.h>
15 #include <linux/input.h>
16 #include <linux/platform_data/dsa.h>
17 #include <asm/mach-types.h>
18 #include <asm/mach/arch.h>
19 #include <asm/mach/pci.h>
25 * LEDs attached to GPIO
27 static struct gpio_led wrt350n_v2_led_pins[] = {
29 .name = "wrt350nv2:green:power",
33 .name = "wrt350nv2:green:security",
37 .name = "wrt350nv2:orange:power",
41 .name = "wrt350nv2:green:usb",
45 .name = "wrt350nv2:green:wireless",
51 static struct gpio_led_platform_data wrt350n_v2_led_data = {
52 .leds = wrt350n_v2_led_pins,
53 .num_leds = ARRAY_SIZE(wrt350n_v2_led_pins),
56 static struct platform_device wrt350n_v2_leds = {
60 .platform_data = &wrt350n_v2_led_data,
65 * Buttons attached to GPIO
67 static struct gpio_keys_button wrt350n_v2_buttons[] = {
71 .desc = "Reset Button",
74 .code = KEY_WPS_BUTTON,
81 static struct gpio_keys_platform_data wrt350n_v2_button_data = {
82 .buttons = wrt350n_v2_buttons,
83 .nbuttons = ARRAY_SIZE(wrt350n_v2_buttons),
86 static struct platform_device wrt350n_v2_button_device = {
91 .platform_data = &wrt350n_v2_button_data,
98 static unsigned int wrt350n_v2_mpp_modes[] __initdata = {
99 MPP0_GPIO, /* Power LED green (0=on) */
100 MPP1_GPIO, /* Security LED (0=on) */
101 MPP2_GPIO, /* Internal Button (0=on) */
102 MPP3_GPIO, /* Reset Button (0=on) */
103 MPP4_GPIO, /* PCI int */
104 MPP5_GPIO, /* Power LED orange (0=on) */
105 MPP6_GPIO, /* USB LED (0=on) */
106 MPP7_GPIO, /* Wireless LED (0=on) */
107 MPP8_UNUSED, /* ??? */
108 MPP9_GIGE, /* GE_RXERR */
109 MPP10_UNUSED, /* ??? */
110 MPP11_UNUSED, /* ??? */
111 MPP12_GIGE, /* GE_TXD[4] */
112 MPP13_GIGE, /* GE_TXD[5] */
113 MPP14_GIGE, /* GE_TXD[6] */
114 MPP15_GIGE, /* GE_TXD[7] */
115 MPP16_GIGE, /* GE_RXD[4] */
116 MPP17_GIGE, /* GE_RXD[5] */
117 MPP18_GIGE, /* GE_RXD[6] */
118 MPP19_GIGE, /* GE_RXD[7] */
123 * 8M NOR flash Device bus boot chip select
125 #define WRT350N_V2_NOR_BOOT_BASE 0xf4000000
126 #define WRT350N_V2_NOR_BOOT_SIZE SZ_8M
128 static struct mtd_partition wrt350n_v2_nor_flash_partitions[] = {
131 .offset = 0x00000000,
135 .offset = 0x001a0000,
139 .offset = 0x00760000,
143 .offset = 0x007a0000,
147 .offset = 0x007c0000,
152 static struct physmap_flash_data wrt350n_v2_nor_flash_data = {
154 .parts = wrt350n_v2_nor_flash_partitions,
155 .nr_parts = ARRAY_SIZE(wrt350n_v2_nor_flash_partitions),
158 static struct resource wrt350n_v2_nor_flash_resource = {
159 .flags = IORESOURCE_MEM,
160 .start = WRT350N_V2_NOR_BOOT_BASE,
161 .end = WRT350N_V2_NOR_BOOT_BASE + WRT350N_V2_NOR_BOOT_SIZE - 1,
164 static struct platform_device wrt350n_v2_nor_flash = {
165 .name = "physmap-flash",
168 .platform_data = &wrt350n_v2_nor_flash_data,
171 .resource = &wrt350n_v2_nor_flash_resource,
174 static struct mv643xx_eth_platform_data wrt350n_v2_eth_data = {
175 .phy_addr = MV643XX_ETH_PHY_NONE,
177 .duplex = DUPLEX_FULL,
180 static struct dsa_chip_data wrt350n_v2_switch_chip_data = {
181 .port_names[0] = "lan2",
182 .port_names[1] = "lan1",
183 .port_names[2] = "wan",
184 .port_names[3] = "cpu",
185 .port_names[5] = "lan3",
186 .port_names[7] = "lan4",
189 static void __init wrt350n_v2_init(void)
192 * Setup basic Orion functions. Need to be called early.
196 orion5x_mpp_conf(wrt350n_v2_mpp_modes);
199 * Configure peripherals.
201 orion5x_ehci0_init();
202 orion5x_eth_init(&wrt350n_v2_eth_data);
203 orion5x_eth_switch_init(&wrt350n_v2_switch_chip_data);
204 orion5x_uart0_init();
206 mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET,
207 ORION_MBUS_DEVBUS_BOOT_ATTR,
208 WRT350N_V2_NOR_BOOT_BASE,
209 WRT350N_V2_NOR_BOOT_SIZE);
210 platform_device_register(&wrt350n_v2_nor_flash);
211 platform_device_register(&wrt350n_v2_leds);
212 platform_device_register(&wrt350n_v2_button_device);
215 static int __init wrt350n_v2_pci_map_irq(const struct pci_dev *dev, u8 slot,
221 * Check for devices with hard-wired IRQs.
223 irq = orion5x_pci_map_irq(dev, slot, pin);
231 return gpio_to_irq(4);
236 static struct hw_pci wrt350n_v2_pci __initdata = {
238 .setup = orion5x_pci_sys_setup,
239 .scan = orion5x_pci_sys_scan_bus,
240 .map_irq = wrt350n_v2_pci_map_irq,
243 static int __init wrt350n_v2_pci_init(void)
245 if (machine_is_wrt350n_v2())
246 pci_common_init(&wrt350n_v2_pci);
250 subsys_initcall(wrt350n_v2_pci_init);
252 MACHINE_START(WRT350N_V2, "Linksys WRT350N v2")
253 /* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */
254 .atag_offset = 0x100,
255 .nr_irqs = ORION5X_NR_IRQS,
256 .init_machine = wrt350n_v2_init,
257 .map_io = orion5x_map_io,
258 .init_early = orion5x_init_early,
259 .init_irq = orion5x_init_irq,
260 .init_time = orion5x_timer_init,
261 .fixup = tag_fixup_mem32,
262 .restart = orion5x_restart,