1 // SPDX-License-Identifier: GPL-2.0-only
2 // arch/arm/mach-orion5x/wnr854t-setup.c
3 #include <linux/gpio.h>
4 #include <linux/kernel.h>
5 #include <linux/init.h>
6 #include <linux/platform_device.h>
9 #include <linux/delay.h>
10 #include <linux/mtd/physmap.h>
11 #include <linux/mv643xx_eth.h>
12 #include <linux/ethtool.h>
13 #include <linux/platform_data/dsa.h>
14 #include <asm/mach-types.h>
15 #include <asm/mach/arch.h>
16 #include <asm/mach/pci.h>
21 static unsigned int wnr854t_mpp_modes[] __initdata = {
22 MPP0_GPIO, /* Power LED green (0=on) */
23 MPP1_GPIO, /* Reset Button (0=off) */
24 MPP2_GPIO, /* Power LED blink (0=off) */
25 MPP3_GPIO, /* WAN Status LED amber (0=off) */
26 MPP4_GPIO, /* PCI int */
30 MPP8_UNUSED, /* ??? */
31 MPP9_GIGE, /* GE_RXERR */
32 MPP10_UNUSED, /* ??? */
33 MPP11_UNUSED, /* ??? */
34 MPP12_GIGE, /* GE_TXD[4] */
35 MPP13_GIGE, /* GE_TXD[5] */
36 MPP14_GIGE, /* GE_TXD[6] */
37 MPP15_GIGE, /* GE_TXD[7] */
38 MPP16_GIGE, /* GE_RXD[4] */
39 MPP17_GIGE, /* GE_RXD[5] */
40 MPP18_GIGE, /* GE_RXD[6] */
41 MPP19_GIGE, /* GE_RXD[7] */
46 * 8M NOR flash Device bus boot chip select
48 #define WNR854T_NOR_BOOT_BASE 0xf4000000
49 #define WNR854T_NOR_BOOT_SIZE SZ_8M
51 static struct mtd_partition wnr854t_nor_flash_partitions[] = {
67 static struct physmap_flash_data wnr854t_nor_flash_data = {
69 .parts = wnr854t_nor_flash_partitions,
70 .nr_parts = ARRAY_SIZE(wnr854t_nor_flash_partitions),
73 static struct resource wnr854t_nor_flash_resource = {
74 .flags = IORESOURCE_MEM,
75 .start = WNR854T_NOR_BOOT_BASE,
76 .end = WNR854T_NOR_BOOT_BASE + WNR854T_NOR_BOOT_SIZE - 1,
79 static struct platform_device wnr854t_nor_flash = {
80 .name = "physmap-flash",
83 .platform_data = &wnr854t_nor_flash_data,
86 .resource = &wnr854t_nor_flash_resource,
89 static struct mv643xx_eth_platform_data wnr854t_eth_data = {
90 .phy_addr = MV643XX_ETH_PHY_NONE,
92 .duplex = DUPLEX_FULL,
95 static struct dsa_chip_data wnr854t_switch_chip_data = {
96 .port_names[0] = "lan3",
97 .port_names[1] = "lan4",
98 .port_names[2] = "wan",
99 .port_names[3] = "cpu",
100 .port_names[5] = "lan1",
101 .port_names[7] = "lan2",
104 static void __init wnr854t_init(void)
107 * Setup basic Orion functions. Need to be called early.
111 orion5x_mpp_conf(wnr854t_mpp_modes);
114 * Configure peripherals.
116 orion5x_eth_init(&wnr854t_eth_data);
117 orion5x_eth_switch_init(&wnr854t_switch_chip_data);
118 orion5x_uart0_init();
120 mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET,
121 ORION_MBUS_DEVBUS_BOOT_ATTR,
122 WNR854T_NOR_BOOT_BASE,
123 WNR854T_NOR_BOOT_SIZE);
124 platform_device_register(&wnr854t_nor_flash);
127 static int __init wnr854t_pci_map_irq(const struct pci_dev *dev, u8 slot,
133 * Check for devices with hard-wired IRQs.
135 irq = orion5x_pci_map_irq(dev, slot, pin);
143 return gpio_to_irq(4);
148 static struct hw_pci wnr854t_pci __initdata = {
150 .setup = orion5x_pci_sys_setup,
151 .scan = orion5x_pci_sys_scan_bus,
152 .map_irq = wnr854t_pci_map_irq,
155 static int __init wnr854t_pci_init(void)
157 if (machine_is_wnr854t())
158 pci_common_init(&wnr854t_pci);
162 subsys_initcall(wnr854t_pci_init);
164 MACHINE_START(WNR854T, "Netgear WNR854T")
165 /* Maintainer: Imre Kaloz <kaloz@openwrt.org> */
166 .atag_offset = 0x100,
167 .nr_irqs = ORION5X_NR_IRQS,
168 .init_machine = wnr854t_init,
169 .map_io = orion5x_map_io,
170 .init_early = orion5x_init_early,
171 .init_irq = orion5x_init_irq,
172 .init_time = orion5x_timer_init,
173 .fixup = tag_fixup_mem32,
174 .restart = orion5x_restart,