arch/arm/mach-orion5x/rd88f5182-setup.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * arch/arm/mach-orion5x/rd88f5182-setup.c
   4  *
   5  * Marvell Orion-NAS Reference Design Setup
   6  *
   7  * Maintainer: Ronen Shitrit <rshitrit@marvell.com>
   8  */
   9 #include <linux/gpio.h>
  10 #include <linux/kernel.h>
  11 #include <linux/init.h>
  12 #include <linux/platform_device.h>
  13 #include <linux/pci.h>
  14 #include <linux/irq.h>
  15 #include <linux/mtd/physmap.h>
  16 #include <linux/mv643xx_eth.h>
  17 #include <linux/ata_platform.h>
  18 #include <linux/i2c.h>
  19 #include <linux/leds.h>
  20 #include <asm/mach-types.h>
  21 #include <asm/mach/arch.h>
  22 #include <asm/mach/pci.h>
  23 #include "common.h"
  24 #include "mpp.h"
  25 #include "orion5x.h"
  26
  27 /*****************************************************************************
  28  * RD-88F5182 Info
  29  ****************************************************************************/
  30
  31 /*
  32  * 512K NOR flash Device bus boot chip select
  33  */
  34
  35 #define RD88F5182_NOR_BOOT_BASE         0xf4000000
  36 #define RD88F5182_NOR_BOOT_SIZE         SZ_512K
  37
  38 /*
  39  * 16M NOR flash on Device bus chip select 1
  40  */
  41
  42 #define RD88F5182_NOR_BASE              0xfc000000
  43 #define RD88F5182_NOR_SIZE              SZ_16M
  44
  45 /*
  46  * PCI
  47  */
  48
  49 #define RD88F5182_PCI_SLOT0_OFFS        7
  50 #define RD88F5182_PCI_SLOT0_IRQ_A_PIN   7
  51 #define RD88F5182_PCI_SLOT0_IRQ_B_PIN   6
  52
  53 /*****************************************************************************
  54  * 16M NOR Flash on Device bus CS1
  55  ****************************************************************************/
  56
  57 static struct physmap_flash_data rd88f5182_nor_flash_data = {
  58         .width          = 1,
  59 };
  60
  61 static struct resource rd88f5182_nor_flash_resource = {
  62         .flags                  = IORESOURCE_MEM,
  63         .start                  = RD88F5182_NOR_BASE,
  64         .end                    = RD88F5182_NOR_BASE + RD88F5182_NOR_SIZE - 1,
  65 };
  66
  67 static struct platform_device rd88f5182_nor_flash = {
  68         .name                   = "physmap-flash",
  69         .id                     = 0,
  70         .dev            = {
  71                 .platform_data  = &rd88f5182_nor_flash_data,
  72         },
  73         .num_resources          = 1,
  74         .resource               = &rd88f5182_nor_flash_resource,
  75 };
  76
  77 /*****************************************************************************
  78  * Use GPIO LED as CPU active indication
  79  ****************************************************************************/
  80
  81 #define RD88F5182_GPIO_LED              0
  82
  83 static struct gpio_led rd88f5182_gpio_led_pins[] = {
  84         {
  85                 .name           = "rd88f5182:cpu",
  86                 .default_trigger = "cpu0",
  87                 .gpio           = RD88F5182_GPIO_LED,
  88         },
  89 };
  90
  91 static struct gpio_led_platform_data rd88f5182_gpio_led_data = {
  92         .leds           = rd88f5182_gpio_led_pins,
  93         .num_leds       = ARRAY_SIZE(rd88f5182_gpio_led_pins),
  94 };
  95
  96 static struct platform_device rd88f5182_gpio_leds = {
  97         .name   = "leds-gpio",
  98         .id     = -1,
  99         .dev    = {
 100                 .platform_data = &rd88f5182_gpio_led_data,
 101         },
 102 };
 103
 104 /*****************************************************************************
 105  * PCI
 106  ****************************************************************************/
 107
 108 static void __init rd88f5182_pci_preinit(void)
 109 {
 110         int pin;
 111
 112         /*
 113          * Configure PCI GPIO IRQ pins
 114          */
 115         pin = RD88F5182_PCI_SLOT0_IRQ_A_PIN;
 116         if (gpio_request(pin, "PCI IntA") == 0) {
 117                 if (gpio_direction_input(pin) == 0) {
 118                         irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
 119                 } else {
 120                         printk(KERN_ERR "rd88f5182_pci_preinit failed to "
 121                                         "set_irq_type pin %d\n", pin);
 122                         gpio_free(pin);
 123                 }
 124         } else {
 125                 printk(KERN_ERR "rd88f5182_pci_preinit failed to request gpio %d\n", pin);
 126         }
 127
 128         pin = RD88F5182_PCI_SLOT0_IRQ_B_PIN;
 129         if (gpio_request(pin, "PCI IntB") == 0) {
 130                 if (gpio_direction_input(pin) == 0) {
 131                         irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
 132                 } else {
 133                         printk(KERN_ERR "rd88f5182_pci_preinit failed to "
 134                                         "set_irq_type pin %d\n", pin);
 135                         gpio_free(pin);
 136                 }
 137         } else {
 138                 printk(KERN_ERR "rd88f5182_pci_preinit failed to gpio_request %d\n", pin);
 139         }
 140 }
 141
 142 static int __init rd88f5182_pci_map_irq(const struct pci_dev *dev, u8 slot,
 143         u8 pin)
 144 {
 145         int irq;
 146
 147         /*
 148          * Check for devices with hard-wired IRQs.
 149          */
 150         irq = orion5x_pci_map_irq(dev, slot, pin);
 151         if (irq != -1)
 152                 return irq;
 153
 154         /*
 155          * PCI IRQs are connected via GPIOs
 156          */
 157         switch (slot - RD88F5182_PCI_SLOT0_OFFS) {
 158         case 0:
 159                 if (pin == 1)
 160                         return gpio_to_irq(RD88F5182_PCI_SLOT0_IRQ_A_PIN);
 161                 else
 162                         return gpio_to_irq(RD88F5182_PCI_SLOT0_IRQ_B_PIN);
 163         default:
 164                 return -1;
 165         }
 166 }
 167
 168 static struct hw_pci rd88f5182_pci __initdata = {
 169         .nr_controllers = 2,
 170         .preinit        = rd88f5182_pci_preinit,
 171         .setup          = orion5x_pci_sys_setup,
 172         .scan           = orion5x_pci_sys_scan_bus,
 173         .map_irq        = rd88f5182_pci_map_irq,
 174 };
 175
 176 static int __init rd88f5182_pci_init(void)
 177 {
 178         if (machine_is_rd88f5182())
 179                 pci_common_init(&rd88f5182_pci);
 180
 181         return 0;
 182 }
 183
 184 subsys_initcall(rd88f5182_pci_init);
 185
 186 /*****************************************************************************
 187  * Ethernet
 188  ****************************************************************************/
 189
 190 static struct mv643xx_eth_platform_data rd88f5182_eth_data = {
 191         .phy_addr       = MV643XX_ETH_PHY_ADDR(8),
 192 };
 193
 194 /*****************************************************************************
 195  * RTC DS1338 on I2C bus
 196  ****************************************************************************/
 197 static struct i2c_board_info __initdata rd88f5182_i2c_rtc = {
 198         I2C_BOARD_INFO("ds1338", 0x68),
 199 };
 200
 201 /*****************************************************************************
 202  * Sata
 203  ****************************************************************************/
 204 static struct mv_sata_platform_data rd88f5182_sata_data = {
 205         .n_ports        = 2,
 206 };
 207
 208 /*****************************************************************************
 209  * General Setup
 210  ****************************************************************************/
 211 static unsigned int rd88f5182_mpp_modes[] __initdata = {
 212         MPP0_GPIO,              /* Debug Led */
 213         MPP1_GPIO,              /* Reset Switch */
 214         MPP2_UNUSED,
 215         MPP3_GPIO,              /* RTC Int */
 216         MPP4_GPIO,
 217         MPP5_GPIO,
 218         MPP6_GPIO,              /* PCI_intA */
 219         MPP7_GPIO,              /* PCI_intB */
 220         MPP8_UNUSED,
 221         MPP9_UNUSED,
 222         MPP10_UNUSED,
 223         MPP11_UNUSED,
 224         MPP12_SATA_LED,         /* SATA 0 presence */
 225         MPP13_SATA_LED,         /* SATA 1 presence */
 226         MPP14_SATA_LED,         /* SATA 0 active */
 227         MPP15_SATA_LED,         /* SATA 1 active */
 228         MPP16_UNUSED,
 229         MPP17_UNUSED,
 230         MPP18_UNUSED,
 231         MPP19_UNUSED,
 232         0,
 233 };
 234
 235 static void __init rd88f5182_init(void)
 236 {
 237         /*
 238          * Setup basic Orion functions. Need to be called early.
 239          */
 240         orion5x_init();
 241
 242         orion5x_mpp_conf(rd88f5182_mpp_modes);
 243
 244         /*
 245          * MPP[20] PCI Clock to MV88F5182
 246          * MPP[21] PCI Clock to mini PCI CON11
 247          * MPP[22] USB 0 over current indication
 248          * MPP[23] USB 1 over current indication
 249          * MPP[24] USB 1 over current enable
 250          * MPP[25] USB 0 over current enable
 251          */
 252
 253         /*
 254          * Configure peripherals.
 255          */
 256         orion5x_ehci0_init();
 257         orion5x_ehci1_init();
 258         orion5x_eth_init(&rd88f5182_eth_data);
 259         orion5x_i2c_init();
 260         orion5x_sata_init(&rd88f5182_sata_data);
 261         orion5x_uart0_init();
 262         orion5x_xor_init();
 263
 264         mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET,
 265                                     ORION_MBUS_DEVBUS_BOOT_ATTR,
 266                                     RD88F5182_NOR_BOOT_BASE,
 267                                     RD88F5182_NOR_BOOT_SIZE);
 268         mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_TARGET(1),
 269                                     ORION_MBUS_DEVBUS_ATTR(1),
 270                                     RD88F5182_NOR_BASE,
 271                                     RD88F5182_NOR_SIZE);
 272         platform_device_register(&rd88f5182_nor_flash);
 273         platform_device_register(&rd88f5182_gpio_leds);
 274
 275         i2c_register_board_info(0, &rd88f5182_i2c_rtc, 1);
 276 }
 277
 278 MACHINE_START(RD88F5182, "Marvell Orion-NAS Reference Design")
 279         /* Maintainer: Ronen Shitrit <rshitrit@marvell.com> */
 280         .atag_offset    = 0x100,
 281         .nr_irqs        = ORION5X_NR_IRQS,
 282         .init_machine   = rd88f5182_init,
 283         .map_io         = orion5x_map_io,
 284         .init_early     = orion5x_init_early,
 285         .init_irq       = orion5x_init_irq,
 286         .init_time      = orion5x_timer_init,
 287         .restart        = orion5x_restart,
 288 MACHINE_END