arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
   4  *
   5  * Marvell Orion-VoIP FXO Reference Design Setup
   6  */
   7 #include <linux/gpio.h>
   8 #include <linux/kernel.h>
   9 #include <linux/init.h>
  10 #include <linux/platform_device.h>
  11 #include <linux/pci.h>
  12 #include <linux/irq.h>
  13 #include <linux/mtd/physmap.h>
  14 #include <linux/mv643xx_eth.h>
  15 #include <linux/ethtool.h>
  16 #include <linux/platform_data/dsa.h>
  17 #include <asm/mach-types.h>
  18 #include <asm/mach/arch.h>
  19 #include <asm/mach/pci.h>
  20 #include "common.h"
  21 #include "mpp.h"
  22 #include "orion5x.h"
  23
  24 /*****************************************************************************
  25  * RD-88F5181L FXO Info
  26  ****************************************************************************/
  27 /*
  28  * 8M NOR flash Device bus boot chip select
  29  */
  30 #define RD88F5181L_FXO_NOR_BOOT_BASE            0xff800000
  31 #define RD88F5181L_FXO_NOR_BOOT_SIZE            SZ_8M
  32
  33
  34 /*****************************************************************************
  35  * 8M NOR Flash on Device bus Boot chip select
  36  ****************************************************************************/
  37 static struct physmap_flash_data rd88f5181l_fxo_nor_boot_flash_data = {
  38         .width          = 1,
  39 };
  40
  41 static struct resource rd88f5181l_fxo_nor_boot_flash_resource = {
  42         .flags          = IORESOURCE_MEM,
  43         .start          = RD88F5181L_FXO_NOR_BOOT_BASE,
  44         .end            = RD88F5181L_FXO_NOR_BOOT_BASE +
  45                           RD88F5181L_FXO_NOR_BOOT_SIZE - 1,
  46 };
  47
  48 static struct platform_device rd88f5181l_fxo_nor_boot_flash = {
  49         .name                   = "physmap-flash",
  50         .id                     = 0,
  51         .dev            = {
  52                 .platform_data  = &rd88f5181l_fxo_nor_boot_flash_data,
  53         },
  54         .num_resources          = 1,
  55         .resource               = &rd88f5181l_fxo_nor_boot_flash_resource,
  56 };
  57
  58
  59 /*****************************************************************************
  60  * General Setup
  61  ****************************************************************************/
  62 static unsigned int rd88f5181l_fxo_mpp_modes[] __initdata = {
  63         MPP0_GPIO,              /* LED1 CardBus LED (front panel) */
  64         MPP1_GPIO,              /* PCI_intA */
  65         MPP2_GPIO,              /* Hard Reset / Factory Init*/
  66         MPP3_GPIO,              /* FXS or DAA select */
  67         MPP4_GPIO,              /* LED6 - phone LED (front panel) */
  68         MPP5_GPIO,              /* LED5 - phone LED (front panel) */
  69         MPP6_PCI_CLK,           /* CPU PCI refclk */
  70         MPP7_PCI_CLK,           /* PCI/PCIe refclk */
  71         MPP8_GPIO,              /* CardBus reset */
  72         MPP9_GPIO,              /* GE_RXERR */
  73         MPP10_GPIO,             /* LED2 MiniPCI LED (front panel) */
  74         MPP11_GPIO,             /* Lifeline control */
  75         MPP12_GIGE,             /* GE_TXD[4] */
  76         MPP13_GIGE,             /* GE_TXD[5] */
  77         MPP14_GIGE,             /* GE_TXD[6] */
  78         MPP15_GIGE,             /* GE_TXD[7] */
  79         MPP16_GIGE,             /* GE_RXD[4] */
  80         MPP17_GIGE,             /* GE_RXD[5] */
  81         MPP18_GIGE,             /* GE_RXD[6] */
  82         MPP19_GIGE,             /* GE_RXD[7] */
  83         0,
  84 };
  85
  86 static struct mv643xx_eth_platform_data rd88f5181l_fxo_eth_data = {
  87         .phy_addr       = MV643XX_ETH_PHY_NONE,
  88         .speed          = SPEED_1000,
  89         .duplex         = DUPLEX_FULL,
  90 };
  91
  92 static struct dsa_chip_data rd88f5181l_fxo_switch_chip_data = {
  93         .port_names[0]  = "lan2",
  94         .port_names[1]  = "lan1",
  95         .port_names[2]  = "wan",
  96         .port_names[3]  = "cpu",
  97         .port_names[5]  = "lan4",
  98         .port_names[7]  = "lan3",
  99 };
 100
 101 static void __init rd88f5181l_fxo_init(void)
 102 {
 103         /*
 104          * Setup basic Orion functions. Need to be called early.
 105          */
 106         orion5x_init();
 107
 108         orion5x_mpp_conf(rd88f5181l_fxo_mpp_modes);
 109
 110         /*
 111          * Configure peripherals.
 112          */
 113         orion5x_ehci0_init();
 114         orion5x_eth_init(&rd88f5181l_fxo_eth_data);
 115         orion5x_eth_switch_init(&rd88f5181l_fxo_switch_chip_data);
 116         orion5x_uart0_init();
 117
 118         mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET,
 119                                     ORION_MBUS_DEVBUS_BOOT_ATTR,
 120                                     RD88F5181L_FXO_NOR_BOOT_BASE,
 121                                     RD88F5181L_FXO_NOR_BOOT_SIZE);
 122         platform_device_register(&rd88f5181l_fxo_nor_boot_flash);
 123 }
 124
 125 static int __init
 126 rd88f5181l_fxo_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 127 {
 128         int irq;
 129
 130         /*
 131          * Check for devices with hard-wired IRQs.
 132          */
 133         irq = orion5x_pci_map_irq(dev, slot, pin);
 134         if (irq != -1)
 135                 return irq;
 136
 137         /*
 138          * Mini-PCI / Cardbus slot.
 139          */
 140         return gpio_to_irq(1);
 141 }
 142
 143 static struct hw_pci rd88f5181l_fxo_pci __initdata = {
 144         .nr_controllers = 2,
 145         .setup          = orion5x_pci_sys_setup,
 146         .scan           = orion5x_pci_sys_scan_bus,
 147         .map_irq        = rd88f5181l_fxo_pci_map_irq,
 148 };
 149
 150 static int __init rd88f5181l_fxo_pci_init(void)
 151 {
 152         if (machine_is_rd88f5181l_fxo()) {
 153                 orion5x_pci_set_cardbus_mode();
 154                 pci_common_init(&rd88f5181l_fxo_pci);
 155         }
 156
 157         return 0;
 158 }
 159 subsys_initcall(rd88f5181l_fxo_pci_init);
 160
 161 MACHINE_START(RD88F5181L_FXO, "Marvell Orion-VoIP FXO Reference Design")
 162         /* Maintainer: Nicolas Pitre <nico@marvell.com> */
 163         .atag_offset    = 0x100,
 164         .nr_irqs        = ORION5X_NR_IRQS,
 165         .init_machine   = rd88f5181l_fxo_init,
 166         .map_io         = orion5x_map_io,
 167         .init_early     = orion5x_init_early,
 168         .init_irq       = orion5x_init_irq,
 169         .init_time      = orion5x_timer_init,
 170         .fixup          = tag_fixup_mem32,
 171         .restart        = orion5x_restart,
 172 MACHINE_END