1 // SPDX-License-Identifier: GPL-2.0-only
3 * OMAP3/OMAP4 smartreflex device file
5 * Author: Thara Gopinath <thara@ti.com>
7 * Based originally on code from smartreflex.c
8 * Copyright (C) 2010 Texas Instruments, Inc.
9 * Thara Gopinath <thara@ti.com>
11 * Copyright (C) 2008 Nokia Corporation
14 * Copyright (C) 2007 Texas Instruments, Inc.
15 * Lesly A M <x0080970@ti.com>
17 #include <linux/power/smartreflex.h>
19 #include <linux/err.h>
20 #include <linux/slab.h>
24 #include "omap_device.h"
29 static bool sr_enable_on_init;
31 /* Read EFUSE values from control registers for OMAP3430 */
32 static void __init sr_set_nvalues(struct omap_volt_data *volt_data,
33 struct omap_sr_data *sr_data)
35 struct omap_sr_nvalue_table *nvalue_table;
38 sr_data->nvalue_count = 0;
39 sr_data->nvalue_table = NULL;
41 while (volt_data[count].volt_nominal)
44 nvalue_table = kcalloc(count, sizeof(*nvalue_table), GFP_KERNEL);
48 for (i = 0, j = 0; i < count; i++) {
52 * In OMAP4 the efuse registers are 24 bit aligned.
53 * A readl_relaxed will fail for non-32 bit aligned address
54 * and hence the 8-bit read and shift.
56 if (cpu_is_omap44xx()) {
57 u16 offset = volt_data[i].sr_efuse_offs;
59 v = omap_ctrl_readb(offset) |
60 omap_ctrl_readb(offset + 1) << 8 |
61 omap_ctrl_readb(offset + 2) << 16;
63 v = omap_ctrl_readl(volt_data[i].sr_efuse_offs);
67 * Many OMAP SoCs don't have the eFuse values set.
68 * For example, pretty much all OMAP3xxx before
71 * XXX There needs to be some way for board files or
72 * userspace to add these in.
77 nvalue_table[j].nvalue = v;
78 nvalue_table[j].efuse_offs = volt_data[i].sr_efuse_offs;
79 nvalue_table[j].errminlimit = volt_data[i].sr_errminlimit;
80 nvalue_table[j].volt_nominal = volt_data[i].volt_nominal;
85 sr_data->nvalue_table = nvalue_table;
86 sr_data->nvalue_count = j;
89 extern struct omap_sr_data omap_sr_pdata[];
91 static int __init sr_dev_init(struct omap_hwmod *oh, void *user)
93 struct omap_sr_data *sr_data = NULL;
94 struct omap_volt_data *volt_data;
95 struct omap_smartreflex_dev_attr *sr_dev_attr;
98 if (!strncmp(oh->name, "smartreflex_mpu_iva", 20) ||
99 !strncmp(oh->name, "smartreflex_mpu", 16))
100 sr_data = &omap_sr_pdata[OMAP_SR_MPU];
101 else if (!strncmp(oh->name, "smartreflex_core", 17))
102 sr_data = &omap_sr_pdata[OMAP_SR_CORE];
103 else if (!strncmp(oh->name, "smartreflex_iva", 16))
104 sr_data = &omap_sr_pdata[OMAP_SR_IVA];
107 pr_err("%s: Unknown instance %s\n", __func__, oh->name);
111 sr_dev_attr = (struct omap_smartreflex_dev_attr *)oh->dev_attr;
112 if (!sr_dev_attr || !sr_dev_attr->sensor_voltdm_name) {
113 pr_err("%s: No voltage domain specified for %s. Cannot initialize\n",
118 sr_data->name = oh->name;
119 if (cpu_is_omap343x())
120 sr_data->ip_type = 1;
122 sr_data->ip_type = 2;
123 sr_data->senn_mod = 0x1;
124 sr_data->senp_mod = 0x1;
126 if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
127 sr_data->err_weight = OMAP3430_SR_ERRWEIGHT;
128 sr_data->err_maxlimit = OMAP3430_SR_ERRMAXLIMIT;
129 sr_data->accum_data = OMAP3430_SR_ACCUMDATA;
130 if (!(strcmp(sr_data->name, "smartreflex_mpu"))) {
131 sr_data->senn_avgweight = OMAP3430_SR1_SENNAVGWEIGHT;
132 sr_data->senp_avgweight = OMAP3430_SR1_SENPAVGWEIGHT;
134 sr_data->senn_avgweight = OMAP3430_SR2_SENNAVGWEIGHT;
135 sr_data->senp_avgweight = OMAP3430_SR2_SENPAVGWEIGHT;
139 sr_data->voltdm = voltdm_lookup(sr_dev_attr->sensor_voltdm_name);
140 if (!sr_data->voltdm) {
141 pr_err("%s: Unable to get voltage domain pointer for VDD %s\n",
142 __func__, sr_dev_attr->sensor_voltdm_name);
146 omap_voltage_get_volttable(sr_data->voltdm, &volt_data);
148 pr_err("%s: No Voltage table registered for VDD%d\n",
153 sr_set_nvalues(volt_data, sr_data);
155 sr_data->enable_on_init = sr_enable_on_init;
164 * API to be called from board files to enable smartreflex
165 * autocompensation at init.
167 void __init omap_enable_smartreflex_on_init(void)
169 sr_enable_on_init = true;
172 int __init omap_devinit_smartreflex(void)
174 return omap_hwmod_for_each_by_class("smartreflex", sr_dev_init, NULL);