1 // SPDX-License-Identifier: GPL-2.0-only
3 * OMAP4 Power domains framework
5 * Copyright (C) 2009-2011 Texas Instruments, Inc.
6 * Copyright (C) 2009-2011 Nokia Corporation
8 * Abhijit Pagare (abhijitpagare@ti.com)
9 * Benoit Cousson (b-cousson@ti.com)
10 * Paul Walmsley (paul@pwsan.com)
12 * This file is automatically generated from the OMAP hardware databases.
13 * We respectfully ask that any modifications to this file be coordinated
14 * with the public linux-omap@vger.kernel.org mailing list and the
15 * authors above to ensure that the autogeneration scripts are kept
16 * up-to-date with the file contents.
19 #include <linux/kernel.h>
20 #include <linux/init.h>
22 #include "powerdomain.h"
24 #include "prcm-common.h"
26 #include "prm-regbits-44xx.h"
28 #include "prcm_mpu44xx.h"
30 /* core_44xx_pwrdm: CORE power domain */
31 static struct powerdomain core_44xx_pwrdm = {
33 .voltdm = { .name = "core" },
34 .prcm_offs = OMAP4430_PRM_CORE_INST,
35 .prcm_partition = OMAP4430_PRM_PARTITION,
36 .pwrsts = PWRSTS_RET_ON,
37 .pwrsts_logic_ret = PWRSTS_OFF_RET,
40 [0] = PWRSTS_OFF, /* core_nret_bank */
41 [1] = PWRSTS_RET, /* core_ocmram */
42 [2] = PWRSTS_RET, /* core_other_bank */
43 [3] = PWRSTS_OFF_RET, /* ducati_l2ram */
44 [4] = PWRSTS_OFF_RET, /* ducati_unicache */
47 [0] = PWRSTS_ON, /* core_nret_bank */
48 [1] = PWRSTS_ON, /* core_ocmram */
49 [2] = PWRSTS_ON, /* core_other_bank */
50 [3] = PWRSTS_ON, /* ducati_l2ram */
51 [4] = PWRSTS_ON, /* ducati_unicache */
53 .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
56 /* gfx_44xx_pwrdm: 3D accelerator power domain */
57 static struct powerdomain gfx_44xx_pwrdm = {
59 .voltdm = { .name = "core" },
60 .prcm_offs = OMAP4430_PRM_GFX_INST,
61 .prcm_partition = OMAP4430_PRM_PARTITION,
62 .pwrsts = PWRSTS_OFF_ON,
65 [0] = PWRSTS_OFF, /* gfx_mem */
68 [0] = PWRSTS_ON, /* gfx_mem */
70 .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
73 /* abe_44xx_pwrdm: Audio back end power domain */
74 static struct powerdomain abe_44xx_pwrdm = {
76 .voltdm = { .name = "iva" },
77 .prcm_offs = OMAP4430_PRM_ABE_INST,
78 .prcm_partition = OMAP4430_PRM_PARTITION,
79 .pwrsts = PWRSTS_OFF_RET_ON,
80 .pwrsts_logic_ret = PWRSTS_OFF,
83 [0] = PWRSTS_RET, /* aessmem */
84 [1] = PWRSTS_OFF, /* periphmem */
87 [0] = PWRSTS_ON, /* aessmem */
88 [1] = PWRSTS_ON, /* periphmem */
90 .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
93 /* dss_44xx_pwrdm: Display subsystem power domain */
94 static struct powerdomain dss_44xx_pwrdm = {
96 .voltdm = { .name = "core" },
97 .prcm_offs = OMAP4430_PRM_DSS_INST,
98 .prcm_partition = OMAP4430_PRM_PARTITION,
99 .pwrsts = PWRSTS_OFF_RET_ON,
100 .pwrsts_logic_ret = PWRSTS_OFF,
103 [0] = PWRSTS_OFF, /* dss_mem */
106 [0] = PWRSTS_ON, /* dss_mem */
108 .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
111 /* tesla_44xx_pwrdm: Tesla processor power domain */
112 static struct powerdomain tesla_44xx_pwrdm = {
113 .name = "tesla_pwrdm",
114 .voltdm = { .name = "iva" },
115 .prcm_offs = OMAP4430_PRM_TESLA_INST,
116 .prcm_partition = OMAP4430_PRM_PARTITION,
117 .pwrsts = PWRSTS_OFF_RET_ON,
118 .pwrsts_logic_ret = PWRSTS_OFF_RET,
121 [0] = PWRSTS_RET, /* tesla_edma */
122 [1] = PWRSTS_OFF_RET, /* tesla_l1 */
123 [2] = PWRSTS_OFF_RET, /* tesla_l2 */
126 [0] = PWRSTS_ON, /* tesla_edma */
127 [1] = PWRSTS_ON, /* tesla_l1 */
128 [2] = PWRSTS_ON, /* tesla_l2 */
130 .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
133 /* wkup_44xx_pwrdm: Wake-up power domain */
134 static struct powerdomain wkup_44xx_pwrdm = {
135 .name = "wkup_pwrdm",
136 .voltdm = { .name = "wakeup" },
137 .prcm_offs = OMAP4430_PRM_WKUP_INST,
138 .prcm_partition = OMAP4430_PRM_PARTITION,
142 [0] = PWRSTS_OFF, /* wkup_bank */
145 [0] = PWRSTS_ON, /* wkup_bank */
149 /* cpu0_44xx_pwrdm: MPU0 processor and Neon coprocessor power domain */
150 static struct powerdomain cpu0_44xx_pwrdm = {
151 .name = "cpu0_pwrdm",
152 .voltdm = { .name = "mpu" },
153 .prcm_offs = OMAP4430_PRCM_MPU_CPU0_INST,
154 .prcm_partition = OMAP4430_PRCM_MPU_PARTITION,
155 .pwrsts = PWRSTS_OFF_RET_ON,
156 .pwrsts_logic_ret = PWRSTS_OFF_RET,
159 [0] = PWRSTS_OFF_RET, /* cpu0_l1 */
162 [0] = PWRSTS_ON, /* cpu0_l1 */
166 /* cpu1_44xx_pwrdm: MPU1 processor and Neon coprocessor power domain */
167 static struct powerdomain cpu1_44xx_pwrdm = {
168 .name = "cpu1_pwrdm",
169 .voltdm = { .name = "mpu" },
170 .prcm_offs = OMAP4430_PRCM_MPU_CPU1_INST,
171 .prcm_partition = OMAP4430_PRCM_MPU_PARTITION,
172 .pwrsts = PWRSTS_OFF_RET_ON,
173 .pwrsts_logic_ret = PWRSTS_OFF_RET,
176 [0] = PWRSTS_OFF_RET, /* cpu1_l1 */
179 [0] = PWRSTS_ON, /* cpu1_l1 */
183 /* emu_44xx_pwrdm: Emulation power domain */
184 static struct powerdomain emu_44xx_pwrdm = {
186 .voltdm = { .name = "wakeup" },
187 .prcm_offs = OMAP4430_PRM_EMU_INST,
188 .prcm_partition = OMAP4430_PRM_PARTITION,
189 .pwrsts = PWRSTS_OFF_ON,
192 [0] = PWRSTS_OFF, /* emu_bank */
195 [0] = PWRSTS_ON, /* emu_bank */
199 /* mpu_44xx_pwrdm: Modena processor and the Neon coprocessor power domain */
200 static struct powerdomain mpu_44xx_pwrdm = {
202 .voltdm = { .name = "mpu" },
203 .prcm_offs = OMAP4430_PRM_MPU_INST,
204 .prcm_partition = OMAP4430_PRM_PARTITION,
205 .pwrsts = PWRSTS_RET_ON,
206 .pwrsts_logic_ret = PWRSTS_OFF_RET,
209 [0] = PWRSTS_OFF_RET, /* mpu_l1 */
210 [1] = PWRSTS_OFF_RET, /* mpu_l2 */
211 [2] = PWRSTS_RET, /* mpu_ram */
214 [0] = PWRSTS_ON, /* mpu_l1 */
215 [1] = PWRSTS_ON, /* mpu_l2 */
216 [2] = PWRSTS_ON, /* mpu_ram */
220 /* ivahd_44xx_pwrdm: IVA-HD power domain */
221 static struct powerdomain ivahd_44xx_pwrdm = {
222 .name = "ivahd_pwrdm",
223 .voltdm = { .name = "iva" },
224 .prcm_offs = OMAP4430_PRM_IVAHD_INST,
225 .prcm_partition = OMAP4430_PRM_PARTITION,
226 .pwrsts = PWRSTS_OFF_RET_ON,
227 .pwrsts_logic_ret = PWRSTS_OFF,
230 [0] = PWRSTS_OFF, /* hwa_mem */
231 [1] = PWRSTS_OFF_RET, /* sl2_mem */
232 [2] = PWRSTS_OFF_RET, /* tcm1_mem */
233 [3] = PWRSTS_OFF_RET, /* tcm2_mem */
236 [0] = PWRSTS_ON, /* hwa_mem */
237 [1] = PWRSTS_ON, /* sl2_mem */
238 [2] = PWRSTS_ON, /* tcm1_mem */
239 [3] = PWRSTS_ON, /* tcm2_mem */
241 .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
244 /* cam_44xx_pwrdm: Camera subsystem power domain */
245 static struct powerdomain cam_44xx_pwrdm = {
247 .voltdm = { .name = "core" },
248 .prcm_offs = OMAP4430_PRM_CAM_INST,
249 .prcm_partition = OMAP4430_PRM_PARTITION,
250 .pwrsts = PWRSTS_OFF_ON,
253 [0] = PWRSTS_OFF, /* cam_mem */
256 [0] = PWRSTS_ON, /* cam_mem */
258 .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
261 /* l3init_44xx_pwrdm: L3 initators pheripherals power domain */
262 static struct powerdomain l3init_44xx_pwrdm = {
263 .name = "l3init_pwrdm",
264 .voltdm = { .name = "core" },
265 .prcm_offs = OMAP4430_PRM_L3INIT_INST,
266 .prcm_partition = OMAP4430_PRM_PARTITION,
267 .pwrsts = PWRSTS_RET_ON,
268 .pwrsts_logic_ret = PWRSTS_OFF_RET,
271 [0] = PWRSTS_OFF, /* l3init_bank1 */
274 [0] = PWRSTS_ON, /* l3init_bank1 */
276 .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
279 /* l4per_44xx_pwrdm: Target peripherals power domain */
280 static struct powerdomain l4per_44xx_pwrdm = {
281 .name = "l4per_pwrdm",
282 .voltdm = { .name = "core" },
283 .prcm_offs = OMAP4430_PRM_L4PER_INST,
284 .prcm_partition = OMAP4430_PRM_PARTITION,
285 .pwrsts = PWRSTS_RET_ON,
286 .pwrsts_logic_ret = PWRSTS_OFF_RET,
289 [0] = PWRSTS_OFF, /* nonretained_bank */
290 [1] = PWRSTS_RET, /* retained_bank */
293 [0] = PWRSTS_ON, /* nonretained_bank */
294 [1] = PWRSTS_ON, /* retained_bank */
296 .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
300 * always_on_core_44xx_pwrdm: Always ON logic that sits in VDD_CORE voltage
303 static struct powerdomain always_on_core_44xx_pwrdm = {
304 .name = "always_on_core_pwrdm",
305 .voltdm = { .name = "core" },
306 .prcm_offs = OMAP4430_PRM_ALWAYS_ON_INST,
307 .prcm_partition = OMAP4430_PRM_PARTITION,
311 /* cefuse_44xx_pwrdm: Customer efuse controller power domain */
312 static struct powerdomain cefuse_44xx_pwrdm = {
313 .name = "cefuse_pwrdm",
314 .voltdm = { .name = "core" },
315 .prcm_offs = OMAP4430_PRM_CEFUSE_INST,
316 .prcm_partition = OMAP4430_PRM_PARTITION,
317 .pwrsts = PWRSTS_OFF_ON,
318 .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
322 * The following power domains are not under SW control
329 /* As powerdomains are added or removed above, this list must also be changed */
330 static struct powerdomain *powerdomains_omap44xx[] __initdata = {
345 &always_on_core_44xx_pwrdm,
350 void __init omap44xx_powerdomains_init(void)
352 pwrdm_register_platform_funcs(&omap4_pwrdm_operations);
353 pwrdm_register_pwrdms(powerdomains_omap44xx);
354 pwrdm_complete_init();