GNU Linux-libre 6.7.9-gnu
[releases.git] / arch / arm / mach-omap2 / powerdomains33xx_data.c
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * AM33XX Power domain data
4  *
5  * Copyright (C) 2011-2012 Texas Instruments Incorporated - https://www.ti.com/
6  */
7
8 #include <linux/kernel.h>
9 #include <linux/init.h>
10
11 #include "powerdomain.h"
12 #include "prcm-common.h"
13 #include "prm-regbits-33xx.h"
14 #include "prm33xx.h"
15
16 static struct powerdomain gfx_33xx_pwrdm = {
17         .name                   = "gfx_pwrdm",
18         .voltdm                 = { .name = "core" },
19         .prcm_offs              = AM33XX_PRM_GFX_MOD,
20         .pwrstctrl_offs         = AM33XX_PM_GFX_PWRSTCTRL_OFFSET,
21         .pwrstst_offs           = AM33XX_PM_GFX_PWRSTST_OFFSET,
22         .pwrsts                 = PWRSTS_OFF_RET_ON,
23         .pwrsts_logic_ret       = PWRSTS_OFF_RET,
24         .flags                  = PWRDM_HAS_LOWPOWERSTATECHANGE,
25         .banks                  = 1,
26         .logicretstate_mask     = AM33XX_LOGICRETSTATE_MASK,
27         .mem_on_mask            = {
28                 [0]             = AM33XX_GFX_MEM_ONSTATE_MASK,  /* gfx_mem */
29         },
30         .mem_ret_mask           = {
31                 [0]             = AM33XX_GFX_MEM_RETSTATE_MASK, /* gfx_mem */
32         },
33         .mem_pwrst_mask         = {
34                 [0]             = AM33XX_GFX_MEM_STATEST_MASK,  /* gfx_mem */
35         },
36         .mem_retst_mask         = {
37                 [0]             = AM33XX_GFX_MEM_RETSTATE_MASK, /* gfx_mem */
38         },
39         .pwrsts_mem_ret         = {
40                 [0]             = PWRSTS_OFF_RET,       /* gfx_mem */
41         },
42         .pwrsts_mem_on          = {
43                 [0]             = PWRSTS_ON,            /* gfx_mem */
44         },
45 };
46
47 static struct powerdomain rtc_33xx_pwrdm = {
48         .name                   = "rtc_pwrdm",
49         .voltdm                 = { .name = "rtc" },
50         .prcm_offs              = AM33XX_PRM_RTC_MOD,
51         .pwrstctrl_offs         = AM33XX_PM_RTC_PWRSTCTRL_OFFSET,
52         .pwrstst_offs           = AM33XX_PM_RTC_PWRSTST_OFFSET,
53         .pwrsts                 = PWRSTS_ON,
54         .logicretstate_mask     = AM33XX_LOGICRETSTATE_MASK,
55 };
56
57 static struct powerdomain wkup_33xx_pwrdm = {
58         .name                   = "wkup_pwrdm",
59         .voltdm                 = { .name = "core" },
60         .prcm_offs              = AM33XX_PRM_WKUP_MOD,
61         .pwrstctrl_offs         = AM33XX_PM_WKUP_PWRSTCTRL_OFFSET,
62         .pwrstst_offs           = AM33XX_PM_WKUP_PWRSTST_OFFSET,
63         .pwrsts                 = PWRSTS_ON,
64         .logicretstate_mask     = AM33XX_LOGICRETSTATE_3_3_MASK,
65 };
66
67 static struct powerdomain per_33xx_pwrdm = {
68         .name                   = "per_pwrdm",
69         .voltdm                 = { .name = "core" },
70         .prcm_offs              = AM33XX_PRM_PER_MOD,
71         .pwrstctrl_offs         = AM33XX_PM_PER_PWRSTCTRL_OFFSET,
72         .pwrstst_offs           = AM33XX_PM_PER_PWRSTST_OFFSET,
73         .pwrsts                 = PWRSTS_OFF_RET_ON,
74         .pwrsts_logic_ret       = PWRSTS_OFF_RET,
75         .flags                  = PWRDM_HAS_LOWPOWERSTATECHANGE,
76         .banks                  = 3,
77         .logicretstate_mask     = AM33XX_LOGICRETSTATE_3_3_MASK,
78         .mem_on_mask            = {
79                 [0]             = AM33XX_PRUSS_MEM_ONSTATE_MASK, /* pruss_mem */
80                 [1]             = AM33XX_PER_MEM_ONSTATE_MASK,  /* per_mem */
81                 [2]             = AM33XX_RAM_MEM_ONSTATE_MASK,  /* ram_mem */
82         },
83         .mem_ret_mask           = {
84                 [0]             = AM33XX_PRUSS_MEM_RETSTATE_MASK, /* pruss_mem */
85                 [1]             = AM33XX_PER_MEM_RETSTATE_MASK, /* per_mem */
86                 [2]             = AM33XX_RAM_MEM_RETSTATE_MASK, /* ram_mem */
87         },
88         .mem_pwrst_mask         = {
89                 [0]             = AM33XX_PRUSS_MEM_STATEST_MASK, /* pruss_mem */
90                 [1]             = AM33XX_PER_MEM_STATEST_MASK,  /* per_mem */
91                 [2]             = AM33XX_RAM_MEM_STATEST_MASK,  /* ram_mem */
92         },
93         .mem_retst_mask         = {
94                 [0]             = AM33XX_PRUSS_MEM_RETSTATE_MASK, /* pruss_mem */
95                 [1]             = AM33XX_PER_MEM_RETSTATE_MASK, /* per_mem */
96                 [2]             = AM33XX_RAM_MEM_RETSTATE_MASK, /* ram_mem */
97         },
98         .pwrsts_mem_ret         = {
99                 [0]             = PWRSTS_OFF_RET,       /* pruss_mem */
100                 [1]             = PWRSTS_OFF_RET,       /* per_mem */
101                 [2]             = PWRSTS_OFF_RET,       /* ram_mem */
102         },
103         .pwrsts_mem_on          = {
104                 [0]             = PWRSTS_ON,            /* pruss_mem */
105                 [1]             = PWRSTS_ON,            /* per_mem */
106                 [2]             = PWRSTS_ON,            /* ram_mem */
107         },
108 };
109
110 static struct powerdomain mpu_33xx_pwrdm = {
111         .name                   = "mpu_pwrdm",
112         .voltdm                 = { .name = "mpu" },
113         .prcm_offs              = AM33XX_PRM_MPU_MOD,
114         .pwrstctrl_offs         = AM33XX_PM_MPU_PWRSTCTRL_OFFSET,
115         .pwrstst_offs           = AM33XX_PM_MPU_PWRSTST_OFFSET,
116         .pwrsts                 = PWRSTS_OFF_RET_ON,
117         .pwrsts_logic_ret       = PWRSTS_OFF_RET,
118         .flags                  = PWRDM_HAS_LOWPOWERSTATECHANGE,
119         .banks                  = 3,
120         .logicretstate_mask     = AM33XX_LOGICRETSTATE_MASK,
121         .mem_on_mask            = {
122                 [0]             = AM33XX_MPU_L1_ONSTATE_MASK,   /* mpu_l1 */
123                 [1]             = AM33XX_MPU_L2_ONSTATE_MASK,   /* mpu_l2 */
124                 [2]             = AM33XX_MPU_RAM_ONSTATE_MASK,  /* mpu_ram */
125         },
126         .mem_ret_mask           = {
127                 [0]             = AM33XX_MPU_L1_RETSTATE_MASK,  /* mpu_l1 */
128                 [1]             = AM33XX_MPU_L2_RETSTATE_MASK,  /* mpu_l2 */
129                 [2]             = AM33XX_MPU_RAM_RETSTATE_MASK, /* mpu_ram */
130         },
131         .mem_pwrst_mask         = {
132                 [0]             = AM33XX_MPU_L1_STATEST_MASK,   /* mpu_l1 */
133                 [1]             = AM33XX_MPU_L2_STATEST_MASK,   /* mpu_l2 */
134                 [2]             = AM33XX_MPU_RAM_STATEST_MASK,  /* mpu_ram */
135         },
136         .mem_retst_mask         = {
137                 [0]             = AM33XX_MPU_L1_RETSTATE_MASK,  /* mpu_l1 */
138                 [1]             = AM33XX_MPU_L2_RETSTATE_MASK,  /* mpu_l2 */
139                 [2]             = AM33XX_MPU_RAM_RETSTATE_MASK, /* mpu_ram */
140         },
141         .pwrsts_mem_ret         = {
142                 [0]             = PWRSTS_OFF_RET,       /* mpu_l1 */
143                 [1]             = PWRSTS_OFF_RET,       /* mpu_l2 */
144                 [2]             = PWRSTS_OFF_RET,       /* mpu_ram */
145         },
146         .pwrsts_mem_on          = {
147                 [0]             = PWRSTS_ON,            /* mpu_l1 */
148                 [1]             = PWRSTS_ON,            /* mpu_l2 */
149                 [2]             = PWRSTS_ON,            /* mpu_ram */
150         },
151 };
152
153 static struct powerdomain cefuse_33xx_pwrdm = {
154         .name           = "cefuse_pwrdm",
155         .voltdm         = { .name = "core" },
156         .prcm_offs      = AM33XX_PRM_CEFUSE_MOD,
157         .pwrstctrl_offs = AM33XX_PM_CEFUSE_PWRSTCTRL_OFFSET,
158         .pwrstst_offs   = AM33XX_PM_CEFUSE_PWRSTST_OFFSET,
159         .pwrsts         = PWRSTS_OFF_ON,
160 };
161
162 static struct powerdomain *powerdomains_am33xx[] __initdata = {
163         &gfx_33xx_pwrdm,
164         &rtc_33xx_pwrdm,
165         &wkup_33xx_pwrdm,
166         &per_33xx_pwrdm,
167         &mpu_33xx_pwrdm,
168         &cefuse_33xx_pwrdm,
169         NULL,
170 };
171
172 void __init am33xx_powerdomains_init(void)
173 {
174         pwrdm_register_platform_funcs(&am33xx_pwrdm_operations);
175         pwrdm_register_pwrdms(powerdomains_am33xx);
176         pwrdm_complete_init();
177 }