1 // SPDX-License-Identifier: GPL-2.0
3 * AM33XX Arch Power Management Routines
5 * Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/
9 #include <asm/smp_scu.h>
10 #include <asm/suspend.h>
11 #include <linux/errno.h>
12 #include <linux/platform_data/pm33xx.h>
17 #include "clockdomain.h"
19 #include "omap_hwmod.h"
21 #include "powerdomain.h"
26 static struct powerdomain *cefuse_pwrdm, *gfx_pwrdm, *per_pwrdm, *mpu_pwrdm;
27 static struct clockdomain *gfx_l4ls_clkdm;
28 static void __iomem *scu_base;
29 static struct omap_hwmod *rtc_oh;
31 static int __init am43xx_map_scu(void)
33 scu_base = ioremap(scu_a9_get_base(), SZ_256);
41 static int amx3_common_init(void)
43 gfx_pwrdm = pwrdm_lookup("gfx_pwrdm");
44 per_pwrdm = pwrdm_lookup("per_pwrdm");
45 mpu_pwrdm = pwrdm_lookup("mpu_pwrdm");
47 if ((!gfx_pwrdm) || (!per_pwrdm) || (!mpu_pwrdm))
50 (void)clkdm_for_each(omap_pm_clkdms_setup, NULL);
52 /* CEFUSE domain can be turned off post bootup */
53 cefuse_pwrdm = pwrdm_lookup("cefuse_pwrdm");
55 pr_err("PM: Failed to get cefuse_pwrdm\n");
56 else if (omap_type() != OMAP2_DEVICE_TYPE_GP)
57 pr_info("PM: Leaving EFUSE power domain active\n");
59 omap_set_pwrdm_state(cefuse_pwrdm, PWRDM_POWER_OFF);
64 static int am33xx_suspend_init(void)
68 gfx_l4ls_clkdm = clkdm_lookup("gfx_l4ls_gfx_clkdm");
70 if (!gfx_l4ls_clkdm) {
71 pr_err("PM: Cannot lookup gfx_l4ls_clkdm clockdomains\n");
75 ret = amx3_common_init();
80 static int am43xx_suspend_init(void)
84 ret = am43xx_map_scu();
86 pr_err("PM: Could not ioremap SCU\n");
90 ret = amx3_common_init();
95 static void amx3_pre_suspend_common(void)
97 omap_set_pwrdm_state(gfx_pwrdm, PWRDM_POWER_OFF);
100 static void amx3_post_suspend_common(void)
104 * Because gfx_pwrdm is the only one under MPU control,
105 * comment on transition status
107 status = pwrdm_read_pwrst(gfx_pwrdm);
108 if (status != PWRDM_POWER_OFF)
109 pr_err("PM: GFX domain did not transition: %x\n", status);
112 static int am33xx_suspend(unsigned int state, int (*fn)(unsigned long),
117 amx3_pre_suspend_common();
118 ret = cpu_suspend(args, fn);
119 amx3_post_suspend_common();
122 * BUG: GFX_L4LS clock domain needs to be woken up to
123 * ensure thet L4LS clock domain does not get stuck in
124 * transition. If that happens L3 module does not get
125 * disabled, thereby leading to PER power domain
129 clkdm_wakeup(gfx_l4ls_clkdm);
130 clkdm_sleep(gfx_l4ls_clkdm);
135 static int am43xx_suspend(unsigned int state, int (*fn)(unsigned long),
140 amx3_pre_suspend_common();
141 scu_power_mode(scu_base, SCU_PM_POWEROFF);
142 ret = cpu_suspend(args, fn);
143 scu_power_mode(scu_base, SCU_PM_NORMAL);
144 amx3_post_suspend_common();
149 static struct am33xx_pm_sram_addr *amx3_get_sram_addrs(void)
152 return &am33xx_pm_sram;
153 else if (soc_is_am437x())
154 return &am43xx_pm_sram;
159 void __iomem *am43xx_get_rtc_base_addr(void)
161 rtc_oh = omap_hwmod_lookup("rtc");
163 return omap_hwmod_get_mpu_rt_va(rtc_oh);
166 static struct am33xx_pm_platform_data am33xx_ops = {
167 .init = am33xx_suspend_init,
168 .soc_suspend = am33xx_suspend,
169 .get_sram_addrs = amx3_get_sram_addrs,
170 .get_rtc_base_addr = am43xx_get_rtc_base_addr,
173 static struct am33xx_pm_platform_data am43xx_ops = {
174 .init = am43xx_suspend_init,
175 .soc_suspend = am43xx_suspend,
176 .get_sram_addrs = amx3_get_sram_addrs,
177 .get_rtc_base_addr = am43xx_get_rtc_base_addr,
180 static struct am33xx_pm_platform_data *am33xx_pm_get_pdata(void)
184 else if (soc_is_am437x())
190 int __init amx3_common_pm_init(void)
192 struct am33xx_pm_platform_data *pdata;
193 struct platform_device_info devinfo;
195 pdata = am33xx_pm_get_pdata();
197 memset(&devinfo, 0, sizeof(devinfo));
198 devinfo.name = "pm33xx";
199 devinfo.data = pdata;
200 devinfo.size_data = sizeof(*pdata);
202 platform_device_register_full(&devinfo);