1 // SPDX-License-Identifier: GPL-2.0-only
3 * omap_hwmod implementation for OMAP2/3/4
5 * Copyright (C) 2009-2011 Nokia Corporation
6 * Copyright (C) 2011-2012 Texas Instruments, Inc.
8 * Paul Walmsley, BenoƮt Cousson, Kevin Hilman
10 * Created in collaboration with (alphabetical order): Thara Gopinath,
11 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
12 * Sawant, Santosh Shilimkar, Richard Woodruff
16 * One way to view an OMAP SoC is as a collection of largely unrelated
17 * IP blocks connected by interconnects. The IP blocks include
18 * devices such as ARM processors, audio serial interfaces, UARTs,
19 * etc. Some of these devices, like the DSP, are created by TI;
20 * others, like the SGX, largely originate from external vendors. In
21 * TI's documentation, on-chip devices are referred to as "OMAP
22 * modules." Some of these IP blocks are identical across several
23 * OMAP versions. Others are revised frequently.
25 * These OMAP modules are tied together by various interconnects.
26 * Most of the address and data flow between modules is via OCP-based
27 * interconnects such as the L3 and L4 buses; but there are other
28 * interconnects that distribute the hardware clock tree, handle idle
29 * and reset signaling, supply power, and connect the modules to
30 * various pads or balls on the OMAP package.
32 * OMAP hwmod provides a consistent way to describe the on-chip
33 * hardware blocks and their integration into the rest of the chip.
34 * This description can be automatically generated from the TI
35 * hardware database. OMAP hwmod provides a standard, consistent API
36 * to reset, enable, idle, and disable these hardware blocks. And
37 * hwmod provides a way for other core code, such as the Linux device
38 * code or the OMAP power management and address space mapping code,
39 * to query the hardware database.
43 * Drivers won't call hwmod functions directly. That is done by the
44 * omap_device code, and in rare occasions, by custom integration code
45 * in arch/arm/ *omap*. The omap_device code includes functions to
46 * build a struct platform_device using omap_hwmod data, and that is
47 * currently how hwmod data is communicated to drivers and to the
48 * Linux driver model. Most drivers will call omap_hwmod functions only
49 * indirectly, via pm_runtime*() functions.
51 * From a layering perspective, here is where the OMAP hwmod code
52 * fits into the kernel software stack:
54 * +-------------------------------+
55 * | Device driver code |
56 * | (e.g., drivers/) |
57 * +-------------------------------+
58 * | Linux driver model |
59 * | (platform_device / |
60 * | platform_driver data/code) |
61 * +-------------------------------+
62 * | OMAP core-driver integration |
63 * |(arch/arm/mach-omap2/devices.c)|
64 * +-------------------------------+
65 * | omap_device code |
66 * | (../plat-omap/omap_device.c) |
67 * +-------------------------------+
68 * ----> | omap_hwmod code/data | <-----
69 * | (../mach-omap2/omap_hwmod*) |
70 * +-------------------------------+
71 * | OMAP clock/PRCM/register fns |
72 * | ({read,write}l_relaxed, clk*) |
73 * +-------------------------------+
75 * Device drivers should not contain any OMAP-specific code or data in
76 * them. They should only contain code to operate the IP block that
77 * the driver is responsible for. This is because these IP blocks can
78 * also appear in other SoCs, either from TI (such as DaVinci) or from
79 * other manufacturers; and drivers should be reusable across other
82 * The OMAP hwmod code also will attempt to reset and idle all on-chip
83 * devices upon boot. The goal here is for the kernel to be
84 * completely self-reliant and independent from bootloaders. This is
85 * to ensure a repeatable configuration, both to ensure consistent
86 * runtime behavior, and to make it easier for others to reproduce
89 * OMAP module activity states
90 * ---------------------------
91 * The hwmod code considers modules to be in one of several activity
92 * states. IP blocks start out in an UNKNOWN state, then once they
93 * are registered via the hwmod code, proceed to the REGISTERED state.
94 * Once their clock names are resolved to clock pointers, the module
95 * enters the CLKS_INITED state; and finally, once the module has been
96 * reset and the integration registers programmed, the INITIALIZED state
97 * is entered. The hwmod code will then place the module into either
98 * the IDLE state to save power, or in the case of a critical system
99 * module, the ENABLED state.
101 * OMAP core integration code can then call omap_hwmod*() functions
102 * directly to move the module between the IDLE, ENABLED, and DISABLED
103 * states, as needed. This is done during both the PM idle loop, and
104 * in the OMAP core integration code's implementation of the PM runtime
109 * This is a partial list.
110 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
111 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
112 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
113 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
114 * - Open Core Protocol Specification 2.2
117 * - handle IO mapping
118 * - bus throughput & module latency measurement code
120 * XXX add tests at the beginning of each function to ensure the hwmod is
121 * in the appropriate state
122 * XXX error return values should be checked to ensure that they are
127 #include <linux/kernel.h>
128 #include <linux/errno.h>
129 #include <linux/io.h>
130 #include <linux/clk.h>
131 #include <linux/clk-provider.h>
132 #include <linux/delay.h>
133 #include <linux/err.h>
134 #include <linux/list.h>
135 #include <linux/mutex.h>
136 #include <linux/spinlock.h>
137 #include <linux/slab.h>
138 #include <linux/cpu.h>
139 #include <linux/of.h>
140 #include <linux/of_address.h>
141 #include <linux/memblock.h>
143 #include <linux/platform_data/ti-sysc.h>
145 #include <dt-bindings/bus/ti-sysc.h>
147 #include <asm/system_misc.h>
150 #include "omap_hwmod.h"
154 #include "clockdomain.h"
157 #include "powerdomain.h"
165 #include "prminst44xx.h"
167 #include "wd_timer.h"
169 /* Name of the OMAP hwmod for the MPU */
170 #define MPU_INITIATOR_NAME "mpu"
173 * Number of struct omap_hwmod_link records per struct
174 * omap_hwmod_ocp_if record (master->slave and slave->master)
176 #define LINKS_PER_OCP_IF 2
179 * Address offset (in bytes) between the reset control and the reset
180 * status registers: 4 bytes on OMAP4
182 #define OMAP4_RST_CTRL_ST_OFFSET 4
185 * Maximum length for module clock handle names
187 #define MOD_CLK_MAX_NAME_LEN 32
190 * struct clkctrl_provider - clkctrl provider mapping data
191 * @num_addrs: number of base address ranges for the provider
192 * @addr: base address(es) for the provider
193 * @size: size(s) of the provider address space(s)
194 * @node: device node associated with the provider
197 struct clkctrl_provider {
201 struct device_node *node;
202 struct list_head link;
205 static LIST_HEAD(clkctrl_providers);
208 * struct omap_hwmod_reset - IP specific reset functions
209 * @match: string to match against the module name
210 * @len: number of characters to match
211 * @reset: IP specific reset function
213 * Used only in cases where struct omap_hwmod is dynamically allocated.
215 struct omap_hwmod_reset {
218 int (*reset)(struct omap_hwmod *oh);
222 * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
223 * @enable_module: function to enable a module (via MODULEMODE)
224 * @disable_module: function to disable a module (via MODULEMODE)
226 * XXX Eventually this functionality will be hidden inside the PRM/CM
227 * device drivers. Until then, this should avoid huge blocks of cpu_is_*()
228 * conditionals in this code.
230 struct omap_hwmod_soc_ops {
231 void (*enable_module)(struct omap_hwmod *oh);
232 int (*disable_module)(struct omap_hwmod *oh);
233 int (*wait_target_ready)(struct omap_hwmod *oh);
234 int (*assert_hardreset)(struct omap_hwmod *oh,
235 struct omap_hwmod_rst_info *ohri);
236 int (*deassert_hardreset)(struct omap_hwmod *oh,
237 struct omap_hwmod_rst_info *ohri);
238 int (*is_hardreset_asserted)(struct omap_hwmod *oh,
239 struct omap_hwmod_rst_info *ohri);
240 int (*init_clkdm)(struct omap_hwmod *oh);
241 void (*update_context_lost)(struct omap_hwmod *oh);
242 int (*get_context_lost)(struct omap_hwmod *oh);
243 int (*disable_direct_prcm)(struct omap_hwmod *oh);
244 u32 (*xlate_clkctrl)(struct omap_hwmod *oh);
247 /* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
248 static struct omap_hwmod_soc_ops soc_ops;
250 /* omap_hwmod_list contains all registered struct omap_hwmods */
251 static LIST_HEAD(omap_hwmod_list);
252 static DEFINE_MUTEX(list_lock);
254 /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
255 static struct omap_hwmod *mpu_oh;
257 /* inited: set to true once the hwmod code is initialized */
260 /* Private functions */
263 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
264 * @oh: struct omap_hwmod *
266 * Load the current value of the hwmod OCP_SYSCONFIG register into the
267 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
268 * OCP_SYSCONFIG register or 0 upon success.
270 static int _update_sysc_cache(struct omap_hwmod *oh)
272 if (!oh->class->sysc) {
273 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
277 /* XXX ensure module interface clock is up */
279 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
281 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
282 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
288 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
289 * @v: OCP_SYSCONFIG value to write
290 * @oh: struct omap_hwmod *
292 * Write @v into the module class' OCP_SYSCONFIG register, if it has
293 * one. No return value.
295 static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
297 if (!oh->class->sysc) {
298 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
302 /* XXX ensure module interface clock is up */
304 /* Module might have lost context, always update cache and register */
308 * Some IP blocks (such as RTC) require unlocking of IP before
309 * accessing its registers. If a function pointer is present
310 * to unlock, then call it before accessing sysconfig and
311 * call lock after writing sysconfig.
313 if (oh->class->unlock)
314 oh->class->unlock(oh);
316 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
323 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
324 * @oh: struct omap_hwmod *
325 * @standbymode: MIDLEMODE field bits
326 * @v: pointer to register contents to modify
328 * Update the master standby mode bits in @v to be @standbymode for
329 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
330 * upon error or 0 upon success.
332 static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
338 if (!oh->class->sysc ||
339 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
342 if (!oh->class->sysc->sysc_fields) {
343 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
347 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
348 mstandby_mask = (0x3 << mstandby_shift);
350 *v &= ~mstandby_mask;
351 *v |= __ffs(standbymode) << mstandby_shift;
357 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
358 * @oh: struct omap_hwmod *
359 * @idlemode: SIDLEMODE field bits
360 * @v: pointer to register contents to modify
362 * Update the slave idle mode bits in @v to be @idlemode for the @oh
363 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
366 static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
371 if (!oh->class->sysc ||
372 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
375 if (!oh->class->sysc->sysc_fields) {
376 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
380 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
381 sidle_mask = (0x3 << sidle_shift);
384 *v |= __ffs(idlemode) << sidle_shift;
390 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
391 * @oh: struct omap_hwmod *
392 * @clockact: CLOCKACTIVITY field bits
393 * @v: pointer to register contents to modify
395 * Update the clockactivity mode bits in @v to be @clockact for the
396 * @oh hwmod. Used for additional powersaving on some modules. Does
397 * not write to the hardware. Returns -EINVAL upon error or 0 upon
400 static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
405 if (!oh->class->sysc ||
406 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
409 if (!oh->class->sysc->sysc_fields) {
410 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
414 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
415 clkact_mask = (0x3 << clkact_shift);
418 *v |= clockact << clkact_shift;
424 * _set_softreset: set OCP_SYSCONFIG.SOFTRESET bit in @v
425 * @oh: struct omap_hwmod *
426 * @v: pointer to register contents to modify
428 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
429 * error or 0 upon success.
431 static int _set_softreset(struct omap_hwmod *oh, u32 *v)
435 if (!oh->class->sysc ||
436 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
439 if (!oh->class->sysc->sysc_fields) {
440 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
444 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
452 * _clear_softreset: clear OCP_SYSCONFIG.SOFTRESET bit in @v
453 * @oh: struct omap_hwmod *
454 * @v: pointer to register contents to modify
456 * Clear the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
457 * error or 0 upon success.
459 static int _clear_softreset(struct omap_hwmod *oh, u32 *v)
463 if (!oh->class->sysc ||
464 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
467 if (!oh->class->sysc->sysc_fields) {
469 "omap_hwmod: %s: sysc_fields absent for sysconfig class\n",
474 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
482 * _wait_softreset_complete - wait for an OCP softreset to complete
483 * @oh: struct omap_hwmod * to wait on
485 * Wait until the IP block represented by @oh reports that its OCP
486 * softreset is complete. This can be triggered by software (see
487 * _ocp_softreset()) or by hardware upon returning from off-mode (one
488 * example is HSMMC). Waits for up to MAX_MODULE_SOFTRESET_WAIT
489 * microseconds. Returns the number of microseconds waited.
491 static int _wait_softreset_complete(struct omap_hwmod *oh)
493 struct omap_hwmod_class_sysconfig *sysc;
497 sysc = oh->class->sysc;
499 if (sysc->sysc_flags & SYSS_HAS_RESET_STATUS && sysc->syss_offs > 0)
500 omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs)
501 & SYSS_RESETDONE_MASK),
502 MAX_MODULE_SOFTRESET_WAIT, c);
503 else if (sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
504 softrst_mask = (0x1 << sysc->sysc_fields->srst_shift);
505 omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs)
507 MAX_MODULE_SOFTRESET_WAIT, c);
514 * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
515 * @oh: struct omap_hwmod *
517 * The DMADISABLE bit is a semi-automatic bit present in sysconfig register
518 * of some modules. When the DMA must perform read/write accesses, the
519 * DMADISABLE bit is cleared by the hardware. But when the DMA must stop
520 * for power management, software must set the DMADISABLE bit back to 1.
522 * Set the DMADISABLE bit in @v for hwmod @oh. Returns -EINVAL upon
523 * error or 0 upon success.
525 static int _set_dmadisable(struct omap_hwmod *oh)
530 if (!oh->class->sysc ||
531 !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE))
534 if (!oh->class->sysc->sysc_fields) {
535 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
539 /* clocks must be on for this operation */
540 if (oh->_state != _HWMOD_STATE_ENABLED) {
541 pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name);
545 pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name);
549 (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift);
550 v |= dmadisable_mask;
551 _write_sysconfig(v, oh);
557 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
558 * @oh: struct omap_hwmod *
559 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
560 * @v: pointer to register contents to modify
562 * Update the module autoidle bit in @v to be @autoidle for the @oh
563 * hwmod. The autoidle bit controls whether the module can gate
564 * internal clocks automatically when it isn't doing anything; the
565 * exact function of this bit varies on a per-module basis. This
566 * function does not write to the hardware. Returns -EINVAL upon
567 * error or 0 upon success.
569 static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
575 if (!oh->class->sysc ||
576 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
579 if (!oh->class->sysc->sysc_fields) {
580 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
584 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
585 autoidle_mask = (0x1 << autoidle_shift);
587 *v &= ~autoidle_mask;
588 *v |= autoidle << autoidle_shift;
594 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
595 * @oh: struct omap_hwmod *
597 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
598 * upon error or 0 upon success.
600 static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
602 if (!oh->class->sysc ||
603 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
604 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
605 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
608 if (!oh->class->sysc->sysc_fields) {
609 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
613 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
614 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
616 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
617 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
618 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
619 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
621 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
627 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
628 * @oh: struct omap_hwmod *
630 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
631 * upon error or 0 upon success.
633 static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
635 if (!oh->class->sysc ||
636 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
637 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
638 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
641 if (!oh->class->sysc->sysc_fields) {
642 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
646 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
647 *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
649 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
650 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
651 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
652 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v);
654 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
659 static struct clockdomain *_get_clkdm(struct omap_hwmod *oh)
661 struct clk_hw_omap *clk;
665 } else if (oh->_clk) {
666 if (!omap2_clk_is_hw_omap(__clk_get_hw(oh->_clk)))
668 clk = to_clk_hw_omap(__clk_get_hw(oh->_clk));
675 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
676 * @oh: struct omap_hwmod *
678 * Prevent the hardware module @oh from entering idle while the
679 * hardare module initiator @init_oh is active. Useful when a module
680 * will be accessed by a particular initiator (e.g., if a module will
681 * be accessed by the IVA, there should be a sleepdep between the IVA
682 * initiator and the module). Only applies to modules in smart-idle
683 * mode. If the clockdomain is marked as not needing autodeps, return
684 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
685 * passes along clkdm_add_sleepdep() value upon success.
687 static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
689 struct clockdomain *clkdm, *init_clkdm;
691 clkdm = _get_clkdm(oh);
692 init_clkdm = _get_clkdm(init_oh);
694 if (!clkdm || !init_clkdm)
697 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
700 return clkdm_add_sleepdep(clkdm, init_clkdm);
704 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
705 * @oh: struct omap_hwmod *
707 * Allow the hardware module @oh to enter idle while the hardare
708 * module initiator @init_oh is active. Useful when a module will not
709 * be accessed by a particular initiator (e.g., if a module will not
710 * be accessed by the IVA, there should be no sleepdep between the IVA
711 * initiator and the module). Only applies to modules in smart-idle
712 * mode. If the clockdomain is marked as not needing autodeps, return
713 * 0 without doing anything. Returns -EINVAL upon error or passes
714 * along clkdm_del_sleepdep() value upon success.
716 static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
718 struct clockdomain *clkdm, *init_clkdm;
720 clkdm = _get_clkdm(oh);
721 init_clkdm = _get_clkdm(init_oh);
723 if (!clkdm || !init_clkdm)
726 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
729 return clkdm_del_sleepdep(clkdm, init_clkdm);
732 static const struct of_device_id ti_clkctrl_match_table[] __initconst = {
733 { .compatible = "ti,clkctrl" },
737 static int __init _setup_clkctrl_provider(struct device_node *np)
740 struct clkctrl_provider *provider;
744 provider = memblock_alloc(sizeof(*provider), SMP_CACHE_BYTES);
750 provider->num_addrs =
751 of_property_count_elems_of_size(np, "reg", sizeof(u32)) / 2;
754 memblock_alloc(sizeof(void *) * provider->num_addrs,
760 memblock_alloc(sizeof(u32) * provider->num_addrs,
765 for (i = 0; i < provider->num_addrs; i++) {
766 addrp = of_get_address(np, i, &size, NULL);
767 provider->addr[i] = (u32)of_translate_address(np, addrp);
768 provider->size[i] = size;
769 pr_debug("%s: %pOF: %x...%x\n", __func__, np, provider->addr[i],
770 provider->addr[i] + provider->size[i]);
773 list_add(&provider->link, &clkctrl_providers);
778 static int __init _init_clkctrl_providers(void)
780 struct device_node *np;
783 for_each_matching_node(np, ti_clkctrl_match_table) {
784 ret = _setup_clkctrl_provider(np);
794 static u32 _omap4_xlate_clkctrl(struct omap_hwmod *oh)
796 if (!oh->prcm.omap4.modulemode)
799 return omap_cm_xlate_clkctrl(oh->clkdm->prcm_partition,
801 oh->prcm.omap4.clkctrl_offs);
804 static struct clk *_lookup_clkctrl_clk(struct omap_hwmod *oh)
806 struct clkctrl_provider *provider;
810 if (!soc_ops.xlate_clkctrl)
813 addr = soc_ops.xlate_clkctrl(oh);
817 pr_debug("%s: %s: addr=%x\n", __func__, oh->name, addr);
819 list_for_each_entry(provider, &clkctrl_providers, link) {
822 for (i = 0; i < provider->num_addrs; i++) {
823 if (provider->addr[i] <= addr &&
824 provider->addr[i] + provider->size[i] > addr) {
825 struct of_phandle_args clkspec;
827 clkspec.np = provider->node;
828 clkspec.args_count = 2;
829 clkspec.args[0] = addr - provider->addr[0];
832 clk = of_clk_get_from_provider(&clkspec);
834 pr_debug("%s: %s got %p (offset=%x, provider=%pOF)\n",
835 __func__, oh->name, clk,
836 clkspec.args[0], provider->node);
847 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
848 * @oh: struct omap_hwmod *
850 * Called from _init_clocks(). Populates the @oh _clk (main
851 * functional clock pointer) if a clock matching the hwmod name is found,
852 * or a main_clk is present. Returns 0 on success or -EINVAL on error.
854 static int _init_main_clk(struct omap_hwmod *oh)
857 struct clk *clk = NULL;
859 clk = _lookup_clkctrl_clk(oh);
861 if (!IS_ERR_OR_NULL(clk)) {
862 pr_debug("%s: mapped main_clk %s for %s\n", __func__,
863 __clk_get_name(clk), oh->name);
864 oh->main_clk = __clk_get_name(clk);
866 soc_ops.disable_direct_prcm(oh);
871 oh->_clk = clk_get(NULL, oh->main_clk);
874 if (IS_ERR(oh->_clk)) {
875 pr_warn("omap_hwmod: %s: cannot clk_get main_clk %s\n",
876 oh->name, oh->main_clk);
880 * HACK: This needs a re-visit once clk_prepare() is implemented
881 * to do something meaningful. Today its just a no-op.
882 * If clk_prepare() is used at some point to do things like
883 * voltage scaling etc, then this would have to be moved to
884 * some point where subsystems like i2c and pmic become
887 clk_prepare(oh->_clk);
890 pr_debug("omap_hwmod: %s: missing clockdomain for %s.\n",
891 oh->name, oh->main_clk);
897 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
898 * @oh: struct omap_hwmod *
900 * Called from _init_clocks(). Populates the @oh OCP slave interface
901 * clock pointers. Returns 0 on success or -EINVAL on error.
903 static int _init_interface_clks(struct omap_hwmod *oh)
905 struct omap_hwmod_ocp_if *os;
909 list_for_each_entry(os, &oh->slave_ports, node) {
913 c = clk_get(NULL, os->clk);
915 pr_warn("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
922 * HACK: This needs a re-visit once clk_prepare() is implemented
923 * to do something meaningful. Today its just a no-op.
924 * If clk_prepare() is used at some point to do things like
925 * voltage scaling etc, then this would have to be moved to
926 * some point where subsystems like i2c and pmic become
929 clk_prepare(os->_clk);
936 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
937 * @oh: struct omap_hwmod *
939 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
940 * clock pointers. Returns 0 on success or -EINVAL on error.
942 static int _init_opt_clks(struct omap_hwmod *oh)
944 struct omap_hwmod_opt_clk *oc;
949 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
950 c = clk_get(NULL, oc->clk);
952 pr_warn("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
959 * HACK: This needs a re-visit once clk_prepare() is implemented
960 * to do something meaningful. Today its just a no-op.
961 * If clk_prepare() is used at some point to do things like
962 * voltage scaling etc, then this would have to be moved to
963 * some point where subsystems like i2c and pmic become
966 clk_prepare(oc->_clk);
972 static void _enable_optional_clocks(struct omap_hwmod *oh)
974 struct omap_hwmod_opt_clk *oc;
977 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
979 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
981 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
982 __clk_get_name(oc->_clk));
983 clk_enable(oc->_clk);
987 static void _disable_optional_clocks(struct omap_hwmod *oh)
989 struct omap_hwmod_opt_clk *oc;
992 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
994 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
996 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
997 __clk_get_name(oc->_clk));
998 clk_disable(oc->_clk);
1003 * _enable_clocks - enable hwmod main clock and interface clocks
1004 * @oh: struct omap_hwmod *
1006 * Enables all clocks necessary for register reads and writes to succeed
1007 * on the hwmod @oh. Returns 0.
1009 static int _enable_clocks(struct omap_hwmod *oh)
1011 struct omap_hwmod_ocp_if *os;
1013 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
1015 if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
1016 _enable_optional_clocks(oh);
1019 clk_enable(oh->_clk);
1021 list_for_each_entry(os, &oh->slave_ports, node) {
1022 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE)) {
1023 omap2_clk_deny_idle(os->_clk);
1024 clk_enable(os->_clk);
1028 /* The opt clocks are controlled by the device driver. */
1034 * _omap4_clkctrl_managed_by_clkfwk - true if clkctrl managed by clock framework
1035 * @oh: struct omap_hwmod *
1037 static bool _omap4_clkctrl_managed_by_clkfwk(struct omap_hwmod *oh)
1039 if (oh->prcm.omap4.flags & HWMOD_OMAP4_CLKFWK_CLKCTR_CLOCK)
1046 * _omap4_has_clkctrl_clock - returns true if a module has clkctrl clock
1047 * @oh: struct omap_hwmod *
1049 static bool _omap4_has_clkctrl_clock(struct omap_hwmod *oh)
1051 if (oh->prcm.omap4.clkctrl_offs)
1054 if (!oh->prcm.omap4.clkctrl_offs &&
1055 oh->prcm.omap4.flags & HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET)
1062 * _disable_clocks - disable hwmod main clock and interface clocks
1063 * @oh: struct omap_hwmod *
1065 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
1067 static int _disable_clocks(struct omap_hwmod *oh)
1069 struct omap_hwmod_ocp_if *os;
1071 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
1074 clk_disable(oh->_clk);
1076 list_for_each_entry(os, &oh->slave_ports, node) {
1077 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE)) {
1078 clk_disable(os->_clk);
1079 omap2_clk_allow_idle(os->_clk);
1083 if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
1084 _disable_optional_clocks(oh);
1086 /* The opt clocks are controlled by the device driver. */
1092 * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
1093 * @oh: struct omap_hwmod *
1095 * Enables the PRCM module mode related to the hwmod @oh.
1098 static void _omap4_enable_module(struct omap_hwmod *oh)
1100 if (!oh->clkdm || !oh->prcm.omap4.modulemode ||
1101 _omap4_clkctrl_managed_by_clkfwk(oh))
1104 pr_debug("omap_hwmod: %s: %s: %d\n",
1105 oh->name, __func__, oh->prcm.omap4.modulemode);
1107 omap_cm_module_enable(oh->prcm.omap4.modulemode,
1108 oh->clkdm->prcm_partition,
1109 oh->clkdm->cm_inst, oh->prcm.omap4.clkctrl_offs);
1113 * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
1114 * @oh: struct omap_hwmod *
1116 * Wait for a module @oh to enter slave idle. Returns 0 if the module
1117 * does not have an IDLEST bit or if the module successfully enters
1118 * slave idle; otherwise, pass along the return value of the
1119 * appropriate *_cm*_wait_module_idle() function.
1121 static int _omap4_wait_target_disable(struct omap_hwmod *oh)
1126 if (oh->_int_flags & _HWMOD_NO_MPU_PORT || !oh->clkdm)
1129 if (oh->flags & HWMOD_NO_IDLEST)
1132 if (_omap4_clkctrl_managed_by_clkfwk(oh))
1135 if (!_omap4_has_clkctrl_clock(oh))
1138 return omap_cm_wait_module_idle(oh->clkdm->prcm_partition,
1140 oh->prcm.omap4.clkctrl_offs, 0);
1144 * _save_mpu_port_index - find and save the index to @oh's MPU port
1145 * @oh: struct omap_hwmod *
1147 * Determines the array index of the OCP slave port that the MPU uses
1148 * to address the device, and saves it into the struct omap_hwmod.
1149 * Intended to be called during hwmod registration only. No return
1152 static void __init _save_mpu_port_index(struct omap_hwmod *oh)
1154 struct omap_hwmod_ocp_if *os = NULL;
1159 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
1161 list_for_each_entry(os, &oh->slave_ports, node) {
1162 if (os->user & OCP_USER_MPU) {
1164 oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
1173 * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
1174 * @oh: struct omap_hwmod *
1176 * Given a pointer to a struct omap_hwmod record @oh, return a pointer
1177 * to the struct omap_hwmod_ocp_if record that is used by the MPU to
1178 * communicate with the IP block. This interface need not be directly
1179 * connected to the MPU (and almost certainly is not), but is directly
1180 * connected to the IP block represented by @oh. Returns a pointer
1181 * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
1182 * error or if there does not appear to be a path from the MPU to this
1185 static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
1187 if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
1190 return oh->_mpu_port;
1194 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
1195 * @oh: struct omap_hwmod *
1197 * Ensure that the OCP_SYSCONFIG register for the IP block represented
1198 * by @oh is set to indicate to the PRCM that the IP block is active.
1199 * Usually this means placing the module into smart-idle mode and
1200 * smart-standby, but if there is a bug in the automatic idle handling
1201 * for the IP block, it may need to be placed into the force-idle or
1202 * no-idle variants of these modes. No return value.
1204 static void _enable_sysc(struct omap_hwmod *oh)
1209 struct clockdomain *clkdm;
1211 if (!oh->class->sysc)
1215 * Wait until reset has completed, this is needed as the IP
1216 * block is reset automatically by hardware in some cases
1217 * (off-mode for example), and the drivers require the
1218 * IP to be ready when they access it
1220 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1221 _enable_optional_clocks(oh);
1222 _wait_softreset_complete(oh);
1223 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1224 _disable_optional_clocks(oh);
1226 v = oh->_sysc_cache;
1227 sf = oh->class->sysc->sysc_flags;
1229 clkdm = _get_clkdm(oh);
1230 if (sf & SYSC_HAS_SIDLEMODE) {
1231 if (oh->flags & HWMOD_SWSUP_SIDLE ||
1232 oh->flags & HWMOD_SWSUP_SIDLE_ACT) {
1233 idlemode = HWMOD_IDLEMODE_NO;
1235 if (sf & SYSC_HAS_ENAWAKEUP)
1236 _enable_wakeup(oh, &v);
1237 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
1238 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1240 idlemode = HWMOD_IDLEMODE_SMART;
1244 * This is special handling for some IPs like
1245 * 32k sync timer. Force them to idle!
1247 clkdm_act = (clkdm && clkdm->flags & CLKDM_ACTIVE_WITH_MPU);
1248 if (clkdm_act && !(oh->class->sysc->idlemodes &
1249 (SIDLE_SMART | SIDLE_SMART_WKUP)))
1250 idlemode = HWMOD_IDLEMODE_FORCE;
1252 _set_slave_idlemode(oh, idlemode, &v);
1255 if (sf & SYSC_HAS_MIDLEMODE) {
1256 if (oh->flags & HWMOD_FORCE_MSTANDBY) {
1257 idlemode = HWMOD_IDLEMODE_FORCE;
1258 } else if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1259 idlemode = HWMOD_IDLEMODE_NO;
1261 if (sf & SYSC_HAS_ENAWAKEUP)
1262 _enable_wakeup(oh, &v);
1263 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1264 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1266 idlemode = HWMOD_IDLEMODE_SMART;
1268 _set_master_standbymode(oh, idlemode, &v);
1272 * XXX The clock framework should handle this, by
1273 * calling into this code. But this must wait until the
1274 * clock structures are tagged with omap_hwmod entries
1276 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
1277 (sf & SYSC_HAS_CLOCKACTIVITY))
1278 _set_clockactivity(oh, CLOCKACT_TEST_ICLK, &v);
1280 _write_sysconfig(v, oh);
1283 * Set the autoidle bit only after setting the smartidle bit
1284 * Setting this will not have any impact on the other modules.
1286 if (sf & SYSC_HAS_AUTOIDLE) {
1287 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
1289 _set_module_autoidle(oh, idlemode, &v);
1290 _write_sysconfig(v, oh);
1295 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
1296 * @oh: struct omap_hwmod *
1298 * If module is marked as SWSUP_SIDLE, force the module into slave
1299 * idle; otherwise, configure it for smart-idle. If module is marked
1300 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
1301 * configure it for smart-standby. No return value.
1303 static void _idle_sysc(struct omap_hwmod *oh)
1308 if (!oh->class->sysc)
1311 v = oh->_sysc_cache;
1312 sf = oh->class->sysc->sysc_flags;
1314 if (sf & SYSC_HAS_SIDLEMODE) {
1315 if (oh->flags & HWMOD_SWSUP_SIDLE) {
1316 idlemode = HWMOD_IDLEMODE_FORCE;
1318 if (sf & SYSC_HAS_ENAWAKEUP)
1319 _enable_wakeup(oh, &v);
1320 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
1321 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1323 idlemode = HWMOD_IDLEMODE_SMART;
1325 _set_slave_idlemode(oh, idlemode, &v);
1328 if (sf & SYSC_HAS_MIDLEMODE) {
1329 if ((oh->flags & HWMOD_SWSUP_MSTANDBY) ||
1330 (oh->flags & HWMOD_FORCE_MSTANDBY)) {
1331 idlemode = HWMOD_IDLEMODE_FORCE;
1333 if (sf & SYSC_HAS_ENAWAKEUP)
1334 _enable_wakeup(oh, &v);
1335 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1336 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1338 idlemode = HWMOD_IDLEMODE_SMART;
1340 _set_master_standbymode(oh, idlemode, &v);
1343 /* If the cached value is the same as the new value, skip the write */
1344 if (oh->_sysc_cache != v)
1345 _write_sysconfig(v, oh);
1349 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
1350 * @oh: struct omap_hwmod *
1352 * Force the module into slave idle and master suspend. No return
1355 static void _shutdown_sysc(struct omap_hwmod *oh)
1360 if (!oh->class->sysc)
1363 v = oh->_sysc_cache;
1364 sf = oh->class->sysc->sysc_flags;
1366 if (sf & SYSC_HAS_SIDLEMODE)
1367 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
1369 if (sf & SYSC_HAS_MIDLEMODE)
1370 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
1372 if (sf & SYSC_HAS_AUTOIDLE)
1373 _set_module_autoidle(oh, 1, &v);
1375 _write_sysconfig(v, oh);
1379 * _lookup - find an omap_hwmod by name
1380 * @name: find an omap_hwmod by name
1382 * Return a pointer to an omap_hwmod by name, or NULL if not found.
1384 static struct omap_hwmod *_lookup(const char *name)
1386 struct omap_hwmod *oh, *temp_oh;
1390 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1391 if (!strcmp(name, temp_oh->name)) {
1401 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
1402 * @oh: struct omap_hwmod *
1404 * Convert a clockdomain name stored in a struct omap_hwmod into a
1405 * clockdomain pointer, and save it into the struct omap_hwmod.
1406 * Return -EINVAL if the clkdm_name lookup failed.
1408 static int _init_clkdm(struct omap_hwmod *oh)
1410 if (!oh->clkdm_name) {
1411 pr_debug("omap_hwmod: %s: missing clockdomain\n", oh->name);
1415 oh->clkdm = clkdm_lookup(oh->clkdm_name);
1417 pr_warn("omap_hwmod: %s: could not associate to clkdm %s\n",
1418 oh->name, oh->clkdm_name);
1422 pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
1423 oh->name, oh->clkdm_name);
1429 * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
1430 * well the clockdomain.
1431 * @oh: struct omap_hwmod *
1432 * @np: device_node mapped to this hwmod
1434 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
1435 * Resolves all clock names embedded in the hwmod. Returns 0 on
1436 * success, or a negative error code on failure.
1438 static int _init_clocks(struct omap_hwmod *oh, struct device_node *np)
1442 if (oh->_state != _HWMOD_STATE_REGISTERED)
1445 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
1447 if (soc_ops.init_clkdm)
1448 ret |= soc_ops.init_clkdm(oh);
1450 ret |= _init_main_clk(oh);
1451 ret |= _init_interface_clks(oh);
1452 ret |= _init_opt_clks(oh);
1455 oh->_state = _HWMOD_STATE_CLKS_INITED;
1457 pr_warn("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
1463 * _lookup_hardreset - fill register bit info for this hwmod/reset line
1464 * @oh: struct omap_hwmod *
1465 * @name: name of the reset line in the context of this hwmod
1466 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
1468 * Return the bit position of the reset line that match the
1469 * input name. Return -ENOENT if not found.
1471 static int _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1472 struct omap_hwmod_rst_info *ohri)
1476 for (i = 0; i < oh->rst_lines_cnt; i++) {
1477 const char *rst_line = oh->rst_lines[i].name;
1478 if (!strcmp(rst_line, name)) {
1479 ohri->rst_shift = oh->rst_lines[i].rst_shift;
1480 ohri->st_shift = oh->rst_lines[i].st_shift;
1481 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1482 oh->name, __func__, rst_line, ohri->rst_shift,
1493 * _assert_hardreset - assert the HW reset line of submodules
1494 * contained in the hwmod module.
1495 * @oh: struct omap_hwmod *
1496 * @name: name of the reset line to lookup and assert
1498 * Some IP like dsp, ipu or iva contain processor that require an HW
1499 * reset line to be assert / deassert in order to enable fully the IP.
1500 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1501 * asserting the hardreset line on the currently-booted SoC, or passes
1502 * along the return value from _lookup_hardreset() or the SoC's
1503 * assert_hardreset code.
1505 static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1507 struct omap_hwmod_rst_info ohri;
1513 if (!soc_ops.assert_hardreset)
1516 ret = _lookup_hardreset(oh, name, &ohri);
1520 ret = soc_ops.assert_hardreset(oh, &ohri);
1526 * _deassert_hardreset - deassert the HW reset line of submodules contained
1527 * in the hwmod module.
1528 * @oh: struct omap_hwmod *
1529 * @name: name of the reset line to look up and deassert
1531 * Some IP like dsp, ipu or iva contain processor that require an HW
1532 * reset line to be assert / deassert in order to enable fully the IP.
1533 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1534 * deasserting the hardreset line on the currently-booted SoC, or passes
1535 * along the return value from _lookup_hardreset() or the SoC's
1536 * deassert_hardreset code.
1538 static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1540 struct omap_hwmod_rst_info ohri;
1546 if (!soc_ops.deassert_hardreset)
1549 ret = _lookup_hardreset(oh, name, &ohri);
1555 * A clockdomain must be in SW_SUP otherwise reset
1556 * might not be completed. The clockdomain can be set
1557 * in HW_AUTO only when the module become ready.
1559 clkdm_deny_idle(oh->clkdm);
1560 ret = clkdm_hwmod_enable(oh->clkdm, oh);
1562 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1563 oh->name, oh->clkdm->name, ret);
1569 if (soc_ops.enable_module)
1570 soc_ops.enable_module(oh);
1572 ret = soc_ops.deassert_hardreset(oh, &ohri);
1574 if (soc_ops.disable_module)
1575 soc_ops.disable_module(oh);
1576 _disable_clocks(oh);
1579 pr_warn("omap_hwmod: %s: failed to hardreset\n", oh->name);
1583 * Set the clockdomain to HW_AUTO, assuming that the
1584 * previous state was HW_AUTO.
1586 clkdm_allow_idle(oh->clkdm);
1588 clkdm_hwmod_disable(oh->clkdm, oh);
1595 * _read_hardreset - read the HW reset line state of submodules
1596 * contained in the hwmod module
1597 * @oh: struct omap_hwmod *
1598 * @name: name of the reset line to look up and read
1600 * Return the state of the reset line. Returns -EINVAL if @oh is
1601 * null, -ENOSYS if we have no way of reading the hardreset line
1602 * status on the currently-booted SoC, or passes along the return
1603 * value from _lookup_hardreset() or the SoC's is_hardreset_asserted
1606 static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1608 struct omap_hwmod_rst_info ohri;
1614 if (!soc_ops.is_hardreset_asserted)
1617 ret = _lookup_hardreset(oh, name, &ohri);
1621 return soc_ops.is_hardreset_asserted(oh, &ohri);
1625 * _are_all_hardreset_lines_asserted - return true if the @oh is hard-reset
1626 * @oh: struct omap_hwmod *
1628 * If all hardreset lines associated with @oh are asserted, then return true.
1629 * Otherwise, if part of @oh is out hardreset or if no hardreset lines
1630 * associated with @oh are asserted, then return false.
1631 * This function is used to avoid executing some parts of the IP block
1632 * enable/disable sequence if its hardreset line is set.
1634 static bool _are_all_hardreset_lines_asserted(struct omap_hwmod *oh)
1638 if (oh->rst_lines_cnt == 0)
1641 for (i = 0; i < oh->rst_lines_cnt; i++)
1642 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1645 if (oh->rst_lines_cnt == rst_cnt)
1652 * _are_any_hardreset_lines_asserted - return true if any part of @oh is
1654 * @oh: struct omap_hwmod *
1656 * If any hardreset lines associated with @oh are asserted, then
1657 * return true. Otherwise, if no hardreset lines associated with @oh
1658 * are asserted, or if @oh has no hardreset lines, then return false.
1659 * This function is used to avoid executing some parts of the IP block
1660 * enable/disable sequence if any hardreset line is set.
1662 static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
1667 for (i = 0; i < oh->rst_lines_cnt && rst_cnt == 0; i++)
1668 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1671 return (rst_cnt) ? true : false;
1675 * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
1676 * @oh: struct omap_hwmod *
1678 * Disable the PRCM module mode related to the hwmod @oh.
1679 * Return EINVAL if the modulemode is not supported and 0 in case of success.
1681 static int _omap4_disable_module(struct omap_hwmod *oh)
1685 if (!oh->clkdm || !oh->prcm.omap4.modulemode ||
1686 _omap4_clkctrl_managed_by_clkfwk(oh))
1690 * Since integration code might still be doing something, only
1691 * disable if all lines are under hardreset.
1693 if (_are_any_hardreset_lines_asserted(oh))
1696 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1698 omap_cm_module_disable(oh->clkdm->prcm_partition, oh->clkdm->cm_inst,
1699 oh->prcm.omap4.clkctrl_offs);
1701 v = _omap4_wait_target_disable(oh);
1703 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1710 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
1711 * @oh: struct omap_hwmod *
1713 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
1714 * enabled for this to work. Returns -ENOENT if the hwmod cannot be
1715 * reset this way, -EINVAL if the hwmod is in the wrong state,
1716 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1718 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
1719 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
1720 * use the SYSCONFIG softreset bit to provide the status.
1722 * Note that some IP like McBSP do have reset control but don't have
1725 static int _ocp_softreset(struct omap_hwmod *oh)
1731 if (!oh->class->sysc ||
1732 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
1735 /* clocks must be on for this operation */
1736 if (oh->_state != _HWMOD_STATE_ENABLED) {
1737 pr_warn("omap_hwmod: %s: reset can only be entered from enabled state\n",
1742 /* For some modules, all optionnal clocks need to be enabled as well */
1743 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1744 _enable_optional_clocks(oh);
1746 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
1748 v = oh->_sysc_cache;
1749 ret = _set_softreset(oh, &v);
1753 _write_sysconfig(v, oh);
1755 if (oh->class->sysc->srst_udelay)
1756 udelay(oh->class->sysc->srst_udelay);
1758 c = _wait_softreset_complete(oh);
1759 if (c == MAX_MODULE_SOFTRESET_WAIT) {
1760 pr_warn("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1761 oh->name, MAX_MODULE_SOFTRESET_WAIT);
1765 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
1768 ret = _clear_softreset(oh, &v);
1772 _write_sysconfig(v, oh);
1775 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1776 * _wait_target_ready() or _reset()
1780 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1781 _disable_optional_clocks(oh);
1787 * _reset - reset an omap_hwmod
1788 * @oh: struct omap_hwmod *
1790 * Resets an omap_hwmod @oh. If the module has a custom reset
1791 * function pointer defined, then call it to reset the IP block, and
1792 * pass along its return value to the caller. Otherwise, if the IP
1793 * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
1794 * associated with it, call a function to reset the IP block via that
1795 * method, and pass along the return value to the caller. Finally, if
1796 * the IP block has some hardreset lines associated with it, assert
1797 * all of those, but do _not_ deassert them. (This is because driver
1798 * authors have expressed an apparent requirement to control the
1799 * deassertion of the hardreset lines themselves.)
1801 * The default software reset mechanism for most OMAP IP blocks is
1802 * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
1803 * hwmods cannot be reset via this method. Some are not targets and
1804 * therefore have no OCP header registers to access. Others (like the
1805 * IVA) have idiosyncratic reset sequences. So for these relatively
1806 * rare cases, custom reset code can be supplied in the struct
1807 * omap_hwmod_class .reset function pointer.
1809 * _set_dmadisable() is called to set the DMADISABLE bit so that it
1810 * does not prevent idling of the system. This is necessary for cases
1811 * where ROMCODE/BOOTLOADER uses dma and transfers control to the
1812 * kernel without disabling dma.
1814 * Passes along the return value from either _ocp_softreset() or the
1815 * custom reset function - these must return -EINVAL if the hwmod
1816 * cannot be reset this way or if the hwmod is in the wrong state,
1817 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1819 static int _reset(struct omap_hwmod *oh)
1823 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1825 if (oh->class->reset) {
1826 r = oh->class->reset(oh);
1828 if (oh->rst_lines_cnt > 0) {
1829 for (i = 0; i < oh->rst_lines_cnt; i++)
1830 _assert_hardreset(oh, oh->rst_lines[i].name);
1833 r = _ocp_softreset(oh);
1839 _set_dmadisable(oh);
1842 * OCP_SYSCONFIG bits need to be reprogrammed after a
1843 * softreset. The _enable() function should be split to avoid
1844 * the rewrite of the OCP_SYSCONFIG register.
1846 if (oh->class->sysc) {
1847 _update_sysc_cache(oh);
1855 * _omap4_update_context_lost - increment hwmod context loss counter if
1856 * hwmod context was lost, and clear hardware context loss reg
1857 * @oh: hwmod to check for context loss
1859 * If the PRCM indicates that the hwmod @oh lost context, increment
1860 * our in-memory context loss counter, and clear the RM_*_CONTEXT
1861 * bits. No return value.
1863 static void _omap4_update_context_lost(struct omap_hwmod *oh)
1865 if (oh->prcm.omap4.flags & HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT)
1868 if (!prm_was_any_context_lost_old(oh->clkdm->pwrdm.ptr->prcm_partition,
1869 oh->clkdm->pwrdm.ptr->prcm_offs,
1870 oh->prcm.omap4.context_offs))
1873 oh->prcm.omap4.context_lost_counter++;
1874 prm_clear_context_loss_flags_old(oh->clkdm->pwrdm.ptr->prcm_partition,
1875 oh->clkdm->pwrdm.ptr->prcm_offs,
1876 oh->prcm.omap4.context_offs);
1880 * _omap4_get_context_lost - get context loss counter for a hwmod
1881 * @oh: hwmod to get context loss counter for
1883 * Returns the in-memory context loss counter for a hwmod.
1885 static int _omap4_get_context_lost(struct omap_hwmod *oh)
1887 return oh->prcm.omap4.context_lost_counter;
1891 * _enable_preprogram - Pre-program an IP block during the _enable() process
1892 * @oh: struct omap_hwmod *
1894 * Some IP blocks (such as AESS) require some additional programming
1895 * after enable before they can enter idle. If a function pointer to
1896 * do so is present in the hwmod data, then call it and pass along the
1897 * return value; otherwise, return 0.
1899 static int _enable_preprogram(struct omap_hwmod *oh)
1901 if (!oh->class->enable_preprogram)
1904 return oh->class->enable_preprogram(oh);
1908 * _enable - enable an omap_hwmod
1909 * @oh: struct omap_hwmod *
1911 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
1912 * register target. Returns -EINVAL if the hwmod is in the wrong
1913 * state or passes along the return value of _wait_target_ready().
1915 static int _enable(struct omap_hwmod *oh)
1919 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
1922 * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
1925 if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
1926 oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
1930 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1931 oh->_state != _HWMOD_STATE_IDLE &&
1932 oh->_state != _HWMOD_STATE_DISABLED) {
1933 WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
1939 * If an IP block contains HW reset lines and all of them are
1940 * asserted, we let integration code associated with that
1941 * block handle the enable. We've received very little
1942 * information on what those driver authors need, and until
1943 * detailed information is provided and the driver code is
1944 * posted to the public lists, this is probably the best we
1947 if (_are_all_hardreset_lines_asserted(oh))
1950 _add_initiator_dep(oh, mpu_oh);
1954 * A clockdomain must be in SW_SUP before enabling
1955 * completely the module. The clockdomain can be set
1956 * in HW_AUTO only when the module become ready.
1958 clkdm_deny_idle(oh->clkdm);
1959 r = clkdm_hwmod_enable(oh->clkdm, oh);
1961 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1962 oh->name, oh->clkdm->name, r);
1968 if (soc_ops.enable_module)
1969 soc_ops.enable_module(oh);
1970 if (oh->flags & HWMOD_BLOCK_WFI)
1971 cpu_idle_poll_ctrl(true);
1973 if (soc_ops.update_context_lost)
1974 soc_ops.update_context_lost(oh);
1976 r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) :
1978 if (oh->clkdm && !(oh->flags & HWMOD_CLKDM_NOAUTO))
1979 clkdm_allow_idle(oh->clkdm);
1982 oh->_state = _HWMOD_STATE_ENABLED;
1984 /* Access the sysconfig only if the target is ready */
1985 if (oh->class->sysc) {
1986 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
1987 _update_sysc_cache(oh);
1990 r = _enable_preprogram(oh);
1992 if (soc_ops.disable_module)
1993 soc_ops.disable_module(oh);
1994 _disable_clocks(oh);
1995 pr_err("omap_hwmod: %s: _wait_target_ready failed: %d\n",
1999 clkdm_hwmod_disable(oh->clkdm, oh);
2006 * _idle - idle an omap_hwmod
2007 * @oh: struct omap_hwmod *
2009 * Idles an omap_hwmod @oh. This should be called once the hwmod has
2010 * no further work. Returns -EINVAL if the hwmod is in the wrong
2011 * state or returns 0.
2013 static int _idle(struct omap_hwmod *oh)
2015 if (oh->flags & HWMOD_NO_IDLE) {
2016 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
2020 pr_debug("omap_hwmod: %s: idling\n", oh->name);
2022 if (_are_all_hardreset_lines_asserted(oh))
2025 if (oh->_state != _HWMOD_STATE_ENABLED) {
2026 WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
2031 if (oh->class->sysc)
2033 _del_initiator_dep(oh, mpu_oh);
2036 * If HWMOD_CLKDM_NOAUTO is set then we don't
2037 * deny idle the clkdm again since idle was already denied
2040 if (oh->clkdm && !(oh->flags & HWMOD_CLKDM_NOAUTO))
2041 clkdm_deny_idle(oh->clkdm);
2043 if (oh->flags & HWMOD_BLOCK_WFI)
2044 cpu_idle_poll_ctrl(false);
2045 if (soc_ops.disable_module)
2046 soc_ops.disable_module(oh);
2049 * The module must be in idle mode before disabling any parents
2050 * clocks. Otherwise, the parent clock might be disabled before
2051 * the module transition is done, and thus will prevent the
2052 * transition to complete properly.
2054 _disable_clocks(oh);
2056 clkdm_allow_idle(oh->clkdm);
2057 clkdm_hwmod_disable(oh->clkdm, oh);
2060 oh->_state = _HWMOD_STATE_IDLE;
2066 * _shutdown - shutdown an omap_hwmod
2067 * @oh: struct omap_hwmod *
2069 * Shut down an omap_hwmod @oh. This should be called when the driver
2070 * used for the hwmod is removed or unloaded or if the driver is not
2071 * used by the system. Returns -EINVAL if the hwmod is in the wrong
2072 * state or returns 0.
2074 static int _shutdown(struct omap_hwmod *oh)
2079 if (_are_all_hardreset_lines_asserted(oh))
2082 if (oh->_state != _HWMOD_STATE_IDLE &&
2083 oh->_state != _HWMOD_STATE_ENABLED) {
2084 WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
2089 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
2091 if (oh->class->pre_shutdown) {
2092 prev_state = oh->_state;
2093 if (oh->_state == _HWMOD_STATE_IDLE)
2095 ret = oh->class->pre_shutdown(oh);
2097 if (prev_state == _HWMOD_STATE_IDLE)
2103 if (oh->class->sysc) {
2104 if (oh->_state == _HWMOD_STATE_IDLE)
2109 /* clocks and deps are already disabled in idle */
2110 if (oh->_state == _HWMOD_STATE_ENABLED) {
2111 _del_initiator_dep(oh, mpu_oh);
2112 /* XXX what about the other system initiators here? dma, dsp */
2113 if (oh->flags & HWMOD_BLOCK_WFI)
2114 cpu_idle_poll_ctrl(false);
2115 if (soc_ops.disable_module)
2116 soc_ops.disable_module(oh);
2117 _disable_clocks(oh);
2119 clkdm_hwmod_disable(oh->clkdm, oh);
2121 /* XXX Should this code also force-disable the optional clocks? */
2123 for (i = 0; i < oh->rst_lines_cnt; i++)
2124 _assert_hardreset(oh, oh->rst_lines[i].name);
2126 oh->_state = _HWMOD_STATE_DISABLED;
2131 static int of_dev_find_hwmod(struct device_node *np,
2132 struct omap_hwmod *oh)
2137 count = of_property_count_strings(np, "ti,hwmods");
2141 for (i = 0; i < count; i++) {
2142 res = of_property_read_string_index(np, "ti,hwmods",
2146 if (!strcmp(p, oh->name)) {
2147 pr_debug("omap_hwmod: dt %pOFn[%i] uses hwmod %s\n",
2157 * of_dev_hwmod_lookup - look up needed hwmod from dt blob
2158 * @np: struct device_node *
2159 * @oh: struct omap_hwmod *
2160 * @index: index of the entry found
2161 * @found: struct device_node * found or NULL
2163 * Parse the dt blob and find out needed hwmod. Recursive function is
2164 * implemented to take care hierarchical dt blob parsing.
2165 * Return: Returns 0 on success, -ENODEV when not found.
2167 static int of_dev_hwmod_lookup(struct device_node *np,
2168 struct omap_hwmod *oh,
2170 struct device_node **found)
2172 struct device_node *np0 = NULL;
2175 res = of_dev_find_hwmod(np, oh);
2182 for_each_child_of_node(np, np0) {
2183 struct device_node *fc;
2186 res = of_dev_hwmod_lookup(np0, oh, &i, &fc);
2201 * omap_hwmod_fix_mpu_rt_idx - fix up mpu_rt_idx register offsets
2203 * @oh: struct omap_hwmod *
2204 * @np: struct device_node *
2206 * Fix up module register offsets for modules with mpu_rt_idx.
2207 * Only needed for cpsw with interconnect target module defined
2208 * in device tree while still using legacy hwmod platform data
2209 * for rev, sysc and syss registers.
2211 * Can be removed when all cpsw hwmod platform data has been
2214 static void omap_hwmod_fix_mpu_rt_idx(struct omap_hwmod *oh,
2215 struct device_node *np,
2216 struct resource *res)
2218 struct device_node *child = NULL;
2221 child = of_get_next_child(np, child);
2225 error = of_address_to_resource(child, oh->mpu_rt_idx, res);
2227 pr_err("%s: error mapping mpu_rt_idx: %i\n",
2232 * omap_hwmod_parse_module_range - map module IO range from device tree
2233 * @oh: struct omap_hwmod *
2234 * @np: struct device_node *
2236 * Parse the device tree range an interconnect target module provides
2237 * for it's child device IP blocks. This way we can support the old
2238 * "ti,hwmods" property with just dts data without a need for platform
2239 * data for IO resources. And we don't need all the child IP device
2240 * nodes available in the dts.
2242 int omap_hwmod_parse_module_range(struct omap_hwmod *oh,
2243 struct device_node *np,
2244 struct resource *res)
2246 struct property *prop;
2247 const __be32 *ranges;
2249 u32 nr_addr, nr_size;
2256 ranges = of_get_property(np, "ranges", &len);
2260 len /= sizeof(*ranges);
2265 of_property_for_each_string(np, "compatible", prop, name)
2266 if (!strncmp("ti,sysc-", name, 8))
2272 error = of_property_read_u32(np, "#address-cells", &nr_addr);
2276 error = of_property_read_u32(np, "#size-cells", &nr_size);
2280 if (nr_addr != 1 || nr_size != 1) {
2281 pr_err("%s: invalid range for %s->%pOFn\n", __func__,
2287 base = of_translate_address(np, ranges++);
2288 size = be32_to_cpup(ranges);
2290 pr_debug("omap_hwmod: %s %pOFn at 0x%llx size 0x%llx\n",
2291 oh->name, np, base, size);
2293 if (oh && oh->mpu_rt_idx) {
2294 omap_hwmod_fix_mpu_rt_idx(oh, np, res);
2300 res->end = base + size - 1;
2301 res->flags = IORESOURCE_MEM;
2307 * _init_mpu_rt_base - populate the virtual address for a hwmod
2308 * @oh: struct omap_hwmod * to locate the virtual address
2309 * @data: (unused, caller should pass NULL)
2310 * @index: index of the reg entry iospace in device tree
2311 * @np: struct device_node * of the IP block's device node in the DT data
2313 * Cache the virtual address used by the MPU to access this IP block's
2314 * registers. This address is needed early so the OCP registers that
2315 * are part of the device's address space can be ioremapped properly.
2317 * If SYSC access is not needed, the registers will not be remapped
2318 * and non-availability of MPU access is not treated as an error.
2320 * Returns 0 on success, -EINVAL if an invalid hwmod is passed, and
2321 * -ENXIO on absent or invalid register target address space.
2323 static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data,
2324 int index, struct device_node *np)
2326 void __iomem *va_start = NULL;
2327 struct resource res;
2333 _save_mpu_port_index(oh);
2335 /* if we don't need sysc access we don't need to ioremap */
2336 if (!oh->class->sysc)
2339 /* we can't continue without MPU PORT if we need sysc access */
2340 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2344 pr_err("omap_hwmod: %s: no dt node\n", oh->name);
2348 /* Do we have a dts range for the interconnect target module? */
2349 error = omap_hwmod_parse_module_range(oh, np, &res);
2351 va_start = ioremap(res.start, resource_size(&res));
2353 /* No ranges, rely on device reg entry */
2355 va_start = of_iomap(np, index + oh->mpu_rt_idx);
2357 pr_err("omap_hwmod: %s: Missing dt reg%i for %pOF\n",
2358 oh->name, index, np);
2362 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
2363 oh->name, va_start);
2365 oh->_mpu_rt_va = va_start;
2369 static void __init parse_module_flags(struct omap_hwmod *oh,
2370 struct device_node *np)
2372 if (of_find_property(np, "ti,no-reset-on-init", NULL))
2373 oh->flags |= HWMOD_INIT_NO_RESET;
2374 if (of_find_property(np, "ti,no-idle-on-init", NULL))
2375 oh->flags |= HWMOD_INIT_NO_IDLE;
2376 if (of_find_property(np, "ti,no-idle", NULL))
2377 oh->flags |= HWMOD_NO_IDLE;
2381 * _init - initialize internal data for the hwmod @oh
2382 * @oh: struct omap_hwmod *
2385 * Look up the clocks and the address space used by the MPU to access
2386 * registers belonging to the hwmod @oh. @oh must already be
2387 * registered at this point. This is the first of two phases for
2388 * hwmod initialization. Code called here does not touch any hardware
2389 * registers, it simply prepares internal data structures. Returns 0
2390 * upon success or if the hwmod isn't registered or if the hwmod's
2391 * address space is not defined, or -EINVAL upon failure.
2393 static int __init _init(struct omap_hwmod *oh, void *data)
2396 struct device_node *np = NULL;
2397 struct device_node *bus;
2399 if (oh->_state != _HWMOD_STATE_REGISTERED)
2402 bus = of_find_node_by_name(NULL, "ocp");
2406 r = of_dev_hwmod_lookup(bus, oh, &index, &np);
2408 pr_debug("omap_hwmod: %s missing dt data\n", oh->name);
2409 else if (np && index)
2410 pr_warn("omap_hwmod: %s using broken dt data from %pOFn\n",
2413 r = _init_mpu_rt_base(oh, NULL, index, np);
2415 WARN(1, "omap_hwmod: %s: doesn't have mpu register target base\n",
2420 r = _init_clocks(oh, np);
2422 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
2427 struct device_node *child;
2429 parse_module_flags(oh, np);
2430 child = of_get_next_child(np, NULL);
2432 parse_module_flags(oh, child);
2435 oh->_state = _HWMOD_STATE_INITIALIZED;
2441 * _setup_iclk_autoidle - configure an IP block's interface clocks
2442 * @oh: struct omap_hwmod *
2444 * Set up the module's interface clocks. XXX This function is still mostly
2445 * a stub; implementing this properly requires iclk autoidle usecounting in
2446 * the clock code. No return value.
2448 static void _setup_iclk_autoidle(struct omap_hwmod *oh)
2450 struct omap_hwmod_ocp_if *os;
2452 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2455 list_for_each_entry(os, &oh->slave_ports, node) {
2459 if (os->flags & OCPIF_SWSUP_IDLE) {
2461 * we might have multiple users of one iclk with
2462 * different requirements, disable autoidle when
2463 * the module is enabled, e.g. dss iclk
2466 /* we are enabling autoidle afterwards anyways */
2467 clk_enable(os->_clk);
2475 * _setup_reset - reset an IP block during the setup process
2476 * @oh: struct omap_hwmod *
2478 * Reset the IP block corresponding to the hwmod @oh during the setup
2479 * process. The IP block is first enabled so it can be successfully
2480 * reset. Returns 0 upon success or a negative error code upon
2483 static int _setup_reset(struct omap_hwmod *oh)
2487 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2490 if (oh->flags & HWMOD_EXT_OPT_MAIN_CLK)
2493 if (oh->rst_lines_cnt == 0) {
2496 pr_warn("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
2497 oh->name, oh->_state);
2502 if (!(oh->flags & HWMOD_INIT_NO_RESET))
2509 * _setup_postsetup - transition to the appropriate state after _setup
2510 * @oh: struct omap_hwmod *
2512 * Place an IP block represented by @oh into a "post-setup" state --
2513 * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
2514 * this function is called at the end of _setup().) The postsetup
2515 * state for an IP block can be changed by calling
2516 * omap_hwmod_enter_postsetup_state() early in the boot process,
2517 * before one of the omap_hwmod_setup*() functions are called for the
2520 * The IP block stays in this state until a PM runtime-based driver is
2521 * loaded for that IP block. A post-setup state of IDLE is
2522 * appropriate for almost all IP blocks with runtime PM-enabled
2523 * drivers, since those drivers are able to enable the IP block. A
2524 * post-setup state of ENABLED is appropriate for kernels with PM
2525 * runtime disabled. The DISABLED state is appropriate for unusual IP
2526 * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
2527 * included, since the WDTIMER starts running on reset and will reset
2528 * the MPU if left active.
2530 * This post-setup mechanism is deprecated. Once all of the OMAP
2531 * drivers have been converted to use PM runtime, and all of the IP
2532 * block data and interconnect data is available to the hwmod code, it
2533 * should be possible to replace this mechanism with a "lazy reset"
2534 * arrangement. In a "lazy reset" setup, each IP block is enabled
2535 * when the driver first probes, then all remaining IP blocks without
2536 * drivers are either shut down or enabled after the drivers have
2537 * loaded. However, this cannot take place until the above
2538 * preconditions have been met, since otherwise the late reset code
2539 * has no way of knowing which IP blocks are in use by drivers, and
2540 * which ones are unused.
2544 static void _setup_postsetup(struct omap_hwmod *oh)
2548 if (oh->rst_lines_cnt > 0)
2551 postsetup_state = oh->_postsetup_state;
2552 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
2553 postsetup_state = _HWMOD_STATE_ENABLED;
2556 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
2557 * it should be set by the core code as a runtime flag during startup
2559 if ((oh->flags & (HWMOD_INIT_NO_IDLE | HWMOD_NO_IDLE)) &&
2560 (postsetup_state == _HWMOD_STATE_IDLE)) {
2561 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
2562 postsetup_state = _HWMOD_STATE_ENABLED;
2565 if (postsetup_state == _HWMOD_STATE_IDLE)
2567 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2569 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2570 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2571 oh->name, postsetup_state);
2577 * _setup - prepare IP block hardware for use
2578 * @oh: struct omap_hwmod *
2579 * @n: (unused, pass NULL)
2581 * Configure the IP block represented by @oh. This may include
2582 * enabling the IP block, resetting it, and placing it into a
2583 * post-setup state, depending on the type of IP block and applicable
2584 * flags. IP blocks are reset to prevent any previous configuration
2585 * by the bootloader or previous operating system from interfering
2586 * with power management or other parts of the system. The reset can
2587 * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
2588 * two phases for hwmod initialization. Code called here generally
2589 * affects the IP block hardware, or system integration hardware
2590 * associated with the IP block. Returns 0.
2592 static int _setup(struct omap_hwmod *oh, void *data)
2594 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2597 if (oh->parent_hwmod) {
2600 r = _enable(oh->parent_hwmod);
2601 WARN(r, "hwmod: %s: setup: failed to enable parent hwmod %s\n",
2602 oh->name, oh->parent_hwmod->name);
2605 _setup_iclk_autoidle(oh);
2607 if (!_setup_reset(oh))
2608 _setup_postsetup(oh);
2610 if (oh->parent_hwmod) {
2613 postsetup_state = oh->parent_hwmod->_postsetup_state;
2615 if (postsetup_state == _HWMOD_STATE_IDLE)
2616 _idle(oh->parent_hwmod);
2617 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2618 _shutdown(oh->parent_hwmod);
2619 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2620 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2621 oh->parent_hwmod->name, postsetup_state);
2628 * _register - register a struct omap_hwmod
2629 * @oh: struct omap_hwmod *
2631 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
2632 * already has been registered by the same name; -EINVAL if the
2633 * omap_hwmod is in the wrong state, if @oh is NULL, if the
2634 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
2635 * name, or if the omap_hwmod's class is missing a name; or 0 upon
2638 * XXX The data should be copied into bootmem, so the original data
2639 * should be marked __initdata and freed after init. This would allow
2640 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
2641 * that the copy process would be relatively complex due to the large number
2644 static int _register(struct omap_hwmod *oh)
2646 if (!oh || !oh->name || !oh->class || !oh->class->name ||
2647 (oh->_state != _HWMOD_STATE_UNKNOWN))
2650 pr_debug("omap_hwmod: %s: registering\n", oh->name);
2652 if (_lookup(oh->name))
2655 list_add_tail(&oh->node, &omap_hwmod_list);
2657 INIT_LIST_HEAD(&oh->slave_ports);
2658 spin_lock_init(&oh->_lock);
2659 lockdep_set_class(&oh->_lock, &oh->hwmod_key);
2661 oh->_state = _HWMOD_STATE_REGISTERED;
2664 * XXX Rather than doing a strcmp(), this should test a flag
2665 * set in the hwmod data, inserted by the autogenerator code.
2667 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
2674 * _add_link - add an interconnect between two IP blocks
2675 * @oi: pointer to a struct omap_hwmod_ocp_if record
2677 * Add struct omap_hwmod_link records connecting the slave IP block
2678 * specified in @oi->slave to @oi. This code is assumed to run before
2679 * preemption or SMP has been enabled, thus avoiding the need for
2680 * locking in this code. Changes to this assumption will require
2681 * additional locking. Returns 0.
2683 static int _add_link(struct omap_hwmod_ocp_if *oi)
2685 pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name,
2688 list_add(&oi->node, &oi->slave->slave_ports);
2689 oi->slave->slaves_cnt++;
2695 * _register_link - register a struct omap_hwmod_ocp_if
2696 * @oi: struct omap_hwmod_ocp_if *
2698 * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it
2699 * has already been registered; -EINVAL if @oi is NULL or if the
2700 * record pointed to by @oi is missing required fields; or 0 upon
2703 * XXX The data should be copied into bootmem, so the original data
2704 * should be marked __initdata and freed after init. This would allow
2705 * unneeded omap_hwmods to be freed on multi-OMAP configurations.
2707 static int __init _register_link(struct omap_hwmod_ocp_if *oi)
2709 if (!oi || !oi->master || !oi->slave || !oi->user)
2712 if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED)
2715 pr_debug("omap_hwmod: registering link from %s to %s\n",
2716 oi->master->name, oi->slave->name);
2719 * Register the connected hwmods, if they haven't been
2720 * registered already
2722 if (oi->master->_state != _HWMOD_STATE_REGISTERED)
2723 _register(oi->master);
2725 if (oi->slave->_state != _HWMOD_STATE_REGISTERED)
2726 _register(oi->slave);
2730 oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED;
2735 /* Static functions intended only for use in soc_ops field function pointers */
2738 * _omap2xxx_3xxx_wait_target_ready - wait for a module to leave slave idle
2739 * @oh: struct omap_hwmod *
2741 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2742 * does not have an IDLEST bit or if the module successfully leaves
2743 * slave idle; otherwise, pass along the return value of the
2744 * appropriate *_cm*_wait_module_ready() function.
2746 static int _omap2xxx_3xxx_wait_target_ready(struct omap_hwmod *oh)
2751 if (oh->flags & HWMOD_NO_IDLEST)
2754 if (!_find_mpu_rt_port(oh))
2757 /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
2759 return omap_cm_wait_module_ready(0, oh->prcm.omap2.module_offs,
2760 oh->prcm.omap2.idlest_reg_id,
2761 oh->prcm.omap2.idlest_idle_bit);
2765 * _omap4_wait_target_ready - wait for a module to leave slave idle
2766 * @oh: struct omap_hwmod *
2768 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2769 * does not have an IDLEST bit or if the module successfully leaves
2770 * slave idle; otherwise, pass along the return value of the
2771 * appropriate *_cm*_wait_module_ready() function.
2773 static int _omap4_wait_target_ready(struct omap_hwmod *oh)
2778 if (oh->flags & HWMOD_NO_IDLEST || !oh->clkdm)
2781 if (!_find_mpu_rt_port(oh))
2784 if (_omap4_clkctrl_managed_by_clkfwk(oh))
2787 if (!_omap4_has_clkctrl_clock(oh))
2790 /* XXX check module SIDLEMODE, hardreset status */
2792 return omap_cm_wait_module_ready(oh->clkdm->prcm_partition,
2794 oh->prcm.omap4.clkctrl_offs, 0);
2798 * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2799 * @oh: struct omap_hwmod * to assert hardreset
2800 * @ohri: hardreset line data
2802 * Call omap2_prm_assert_hardreset() with parameters extracted from
2803 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2804 * use as an soc_ops function pointer. Passes along the return value
2805 * from omap2_prm_assert_hardreset(). XXX This function is scheduled
2806 * for removal when the PRM code is moved into drivers/.
2808 static int _omap2_assert_hardreset(struct omap_hwmod *oh,
2809 struct omap_hwmod_rst_info *ohri)
2811 return omap_prm_assert_hardreset(ohri->rst_shift, 0,
2812 oh->prcm.omap2.module_offs, 0);
2816 * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2817 * @oh: struct omap_hwmod * to deassert hardreset
2818 * @ohri: hardreset line data
2820 * Call omap2_prm_deassert_hardreset() with parameters extracted from
2821 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2822 * use as an soc_ops function pointer. Passes along the return value
2823 * from omap2_prm_deassert_hardreset(). XXX This function is
2824 * scheduled for removal when the PRM code is moved into drivers/.
2826 static int _omap2_deassert_hardreset(struct omap_hwmod *oh,
2827 struct omap_hwmod_rst_info *ohri)
2829 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift, 0,
2830 oh->prcm.omap2.module_offs, 0, 0);
2834 * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args
2835 * @oh: struct omap_hwmod * to test hardreset
2836 * @ohri: hardreset line data
2838 * Call omap2_prm_is_hardreset_asserted() with parameters extracted
2839 * from the hwmod @oh and the hardreset line data @ohri. Only
2840 * intended for use as an soc_ops function pointer. Passes along the
2841 * return value from omap2_prm_is_hardreset_asserted(). XXX This
2842 * function is scheduled for removal when the PRM code is moved into
2845 static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh,
2846 struct omap_hwmod_rst_info *ohri)
2848 return omap_prm_is_hardreset_asserted(ohri->st_shift, 0,
2849 oh->prcm.omap2.module_offs, 0);
2853 * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2854 * @oh: struct omap_hwmod * to assert hardreset
2855 * @ohri: hardreset line data
2857 * Call omap4_prminst_assert_hardreset() with parameters extracted
2858 * from the hwmod @oh and the hardreset line data @ohri. Only
2859 * intended for use as an soc_ops function pointer. Passes along the
2860 * return value from omap4_prminst_assert_hardreset(). XXX This
2861 * function is scheduled for removal when the PRM code is moved into
2864 static int _omap4_assert_hardreset(struct omap_hwmod *oh,
2865 struct omap_hwmod_rst_info *ohri)
2870 return omap_prm_assert_hardreset(ohri->rst_shift,
2871 oh->clkdm->pwrdm.ptr->prcm_partition,
2872 oh->clkdm->pwrdm.ptr->prcm_offs,
2873 oh->prcm.omap4.rstctrl_offs);
2877 * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2878 * @oh: struct omap_hwmod * to deassert hardreset
2879 * @ohri: hardreset line data
2881 * Call omap4_prminst_deassert_hardreset() with parameters extracted
2882 * from the hwmod @oh and the hardreset line data @ohri. Only
2883 * intended for use as an soc_ops function pointer. Passes along the
2884 * return value from omap4_prminst_deassert_hardreset(). XXX This
2885 * function is scheduled for removal when the PRM code is moved into
2888 static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
2889 struct omap_hwmod_rst_info *ohri)
2895 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
2896 oh->name, ohri->name);
2897 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->rst_shift,
2898 oh->clkdm->pwrdm.ptr->prcm_partition,
2899 oh->clkdm->pwrdm.ptr->prcm_offs,
2900 oh->prcm.omap4.rstctrl_offs,
2901 oh->prcm.omap4.rstctrl_offs +
2902 OMAP4_RST_CTRL_ST_OFFSET);
2906 * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args
2907 * @oh: struct omap_hwmod * to test hardreset
2908 * @ohri: hardreset line data
2910 * Call omap4_prminst_is_hardreset_asserted() with parameters
2911 * extracted from the hwmod @oh and the hardreset line data @ohri.
2912 * Only intended for use as an soc_ops function pointer. Passes along
2913 * the return value from omap4_prminst_is_hardreset_asserted(). XXX
2914 * This function is scheduled for removal when the PRM code is moved
2917 static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
2918 struct omap_hwmod_rst_info *ohri)
2923 return omap_prm_is_hardreset_asserted(ohri->rst_shift,
2924 oh->clkdm->pwrdm.ptr->
2926 oh->clkdm->pwrdm.ptr->prcm_offs,
2927 oh->prcm.omap4.rstctrl_offs);
2931 * _omap4_disable_direct_prcm - disable direct PRCM control for hwmod
2932 * @oh: struct omap_hwmod * to disable control for
2934 * Disables direct PRCM clkctrl done by hwmod core. Instead, the hwmod
2935 * will be using its main_clk to enable/disable the module. Returns
2938 static int _omap4_disable_direct_prcm(struct omap_hwmod *oh)
2943 oh->prcm.omap4.flags |= HWMOD_OMAP4_CLKFWK_CLKCTR_CLOCK;
2949 * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args
2950 * @oh: struct omap_hwmod * to deassert hardreset
2951 * @ohri: hardreset line data
2953 * Call am33xx_prminst_deassert_hardreset() with parameters extracted
2954 * from the hwmod @oh and the hardreset line data @ohri. Only
2955 * intended for use as an soc_ops function pointer. Passes along the
2956 * return value from am33xx_prminst_deassert_hardreset(). XXX This
2957 * function is scheduled for removal when the PRM code is moved into
2960 static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
2961 struct omap_hwmod_rst_info *ohri)
2963 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift,
2964 oh->clkdm->pwrdm.ptr->prcm_partition,
2965 oh->clkdm->pwrdm.ptr->prcm_offs,
2966 oh->prcm.omap4.rstctrl_offs,
2967 oh->prcm.omap4.rstst_offs);
2970 /* Public functions */
2972 u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
2974 if (oh->flags & HWMOD_16BIT_REG)
2975 return readw_relaxed(oh->_mpu_rt_va + reg_offs);
2977 return readl_relaxed(oh->_mpu_rt_va + reg_offs);
2980 void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
2982 if (oh->flags & HWMOD_16BIT_REG)
2983 writew_relaxed(v, oh->_mpu_rt_va + reg_offs);
2985 writel_relaxed(v, oh->_mpu_rt_va + reg_offs);
2989 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
2990 * @oh: struct omap_hwmod *
2992 * This is a public function exposed to drivers. Some drivers may need to do
2993 * some settings before and after resetting the device. Those drivers after
2994 * doing the necessary settings could use this function to start a reset by
2995 * setting the SYSCONFIG.SOFTRESET bit.
2997 int omap_hwmod_softreset(struct omap_hwmod *oh)
3002 if (!oh || !(oh->_sysc_cache))
3005 v = oh->_sysc_cache;
3006 ret = _set_softreset(oh, &v);
3009 _write_sysconfig(v, oh);
3011 ret = _clear_softreset(oh, &v);
3014 _write_sysconfig(v, oh);
3021 * omap_hwmod_lookup - look up a registered omap_hwmod by name
3022 * @name: name of the omap_hwmod to look up
3024 * Given a @name of an omap_hwmod, return a pointer to the registered
3025 * struct omap_hwmod *, or NULL upon error.
3027 struct omap_hwmod *omap_hwmod_lookup(const char *name)
3029 struct omap_hwmod *oh;
3040 * omap_hwmod_for_each - call function for each registered omap_hwmod
3041 * @fn: pointer to a callback function
3042 * @data: void * data to pass to callback function
3044 * Call @fn for each registered omap_hwmod, passing @data to each
3045 * function. @fn must return 0 for success or any other value for
3046 * failure. If @fn returns non-zero, the iteration across omap_hwmods
3047 * will stop and the non-zero return value will be passed to the
3048 * caller of omap_hwmod_for_each(). @fn is called with
3049 * omap_hwmod_for_each() held.
3051 int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
3054 struct omap_hwmod *temp_oh;
3060 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3061 ret = (*fn)(temp_oh, data);
3070 * omap_hwmod_register_links - register an array of hwmod links
3071 * @ois: pointer to an array of omap_hwmod_ocp_if to register
3073 * Intended to be called early in boot before the clock framework is
3074 * initialized. If @ois is not null, will register all omap_hwmods
3075 * listed in @ois that are valid for this chip. Returns -EINVAL if
3076 * omap_hwmod_init() hasn't been called before calling this function,
3077 * -ENOMEM if the link memory area can't be allocated, or 0 upon
3080 int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
3090 if (ois[0] == NULL) /* Empty list */
3095 r = _register_link(ois[i]);
3096 WARN(r && r != -EEXIST,
3097 "omap_hwmod: _register_link(%s -> %s) returned %d\n",
3098 ois[i]->master->name, ois[i]->slave->name, r);
3105 * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
3106 * @oh: pointer to the hwmod currently being set up (usually not the MPU)
3108 * If the hwmod data corresponding to the MPU subsystem IP block
3109 * hasn't been initialized and set up yet, do so now. This must be
3110 * done first since sleep dependencies may be added from other hwmods
3111 * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
3114 static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
3116 if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
3117 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
3118 __func__, MPU_INITIATOR_NAME);
3119 else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
3120 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
3124 * omap_hwmod_setup_one - set up a single hwmod
3125 * @oh_name: const char * name of the already-registered hwmod to set up
3127 * Initialize and set up a single hwmod. Intended to be used for a
3128 * small number of early devices, such as the timer IP blocks used for
3129 * the scheduler clock. Must be called after omap2_clk_init().
3130 * Resolves the struct clk names to struct clk pointers for each
3131 * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
3132 * -EINVAL upon error or 0 upon success.
3134 int __init omap_hwmod_setup_one(const char *oh_name)
3136 struct omap_hwmod *oh;
3138 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
3140 oh = _lookup(oh_name);
3142 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
3146 _ensure_mpu_hwmod_is_setup(oh);
3154 static void omap_hwmod_check_one(struct device *dev,
3155 const char *name, s8 v1, u8 v2)
3161 dev_warn(dev, "%s %d != %d\n", name, v1, v2);
3165 * omap_hwmod_check_sysc - check sysc against platform sysc
3166 * @dev: struct device
3167 * @data: module data
3168 * @sysc_fields: new sysc configuration
3170 static int omap_hwmod_check_sysc(struct device *dev,
3171 const struct ti_sysc_module_data *data,
3172 struct sysc_regbits *sysc_fields)
3174 const struct sysc_regbits *regbits = data->cap->regbits;
3176 omap_hwmod_check_one(dev, "dmadisable_shift",
3177 regbits->dmadisable_shift,
3178 sysc_fields->dmadisable_shift);
3179 omap_hwmod_check_one(dev, "midle_shift",
3180 regbits->midle_shift,
3181 sysc_fields->midle_shift);
3182 omap_hwmod_check_one(dev, "sidle_shift",
3183 regbits->sidle_shift,
3184 sysc_fields->sidle_shift);
3185 omap_hwmod_check_one(dev, "clkact_shift",
3186 regbits->clkact_shift,
3187 sysc_fields->clkact_shift);
3188 omap_hwmod_check_one(dev, "enwkup_shift",
3189 regbits->enwkup_shift,
3190 sysc_fields->enwkup_shift);
3191 omap_hwmod_check_one(dev, "srst_shift",
3192 regbits->srst_shift,
3193 sysc_fields->srst_shift);
3194 omap_hwmod_check_one(dev, "autoidle_shift",
3195 regbits->autoidle_shift,
3196 sysc_fields->autoidle_shift);
3202 * omap_hwmod_init_regbits - init sysconfig specific register bits
3203 * @dev: struct device
3204 * @data: module data
3205 * @sysc_fields: new sysc configuration
3207 static int omap_hwmod_init_regbits(struct device *dev,
3208 const struct ti_sysc_module_data *data,
3209 struct sysc_regbits **sysc_fields)
3211 *sysc_fields = NULL;
3213 switch (data->cap->type) {
3215 case TI_SYSC_OMAP2_TIMER:
3216 *sysc_fields = &omap_hwmod_sysc_type1;
3218 case TI_SYSC_OMAP3_SHAM:
3219 *sysc_fields = &omap3_sham_sysc_fields;
3221 case TI_SYSC_OMAP3_AES:
3222 *sysc_fields = &omap3xxx_aes_sysc_fields;
3225 case TI_SYSC_OMAP4_TIMER:
3226 *sysc_fields = &omap_hwmod_sysc_type2;
3228 case TI_SYSC_OMAP4_SIMPLE:
3229 *sysc_fields = &omap_hwmod_sysc_type3;
3231 case TI_SYSC_OMAP34XX_SR:
3232 *sysc_fields = &omap34xx_sr_sysc_fields;
3234 case TI_SYSC_OMAP36XX_SR:
3235 *sysc_fields = &omap36xx_sr_sysc_fields;
3237 case TI_SYSC_OMAP4_SR:
3238 *sysc_fields = &omap36xx_sr_sysc_fields;
3240 case TI_SYSC_OMAP4_MCASP:
3241 *sysc_fields = &omap_hwmod_sysc_type_mcasp;
3243 case TI_SYSC_OMAP4_USB_HOST_FS:
3244 *sysc_fields = &omap_hwmod_sysc_type_usb_host_fs;
3250 return omap_hwmod_check_sysc(dev, data, *sysc_fields);
3254 * omap_hwmod_init_reg_offs - initialize sysconfig register offsets
3255 * @dev: struct device
3256 * @data: module data
3257 * @rev_offs: revision register offset
3258 * @sysc_offs: sysc register offset
3259 * @syss_offs: syss register offset
3261 static int omap_hwmod_init_reg_offs(struct device *dev,
3262 const struct ti_sysc_module_data *data,
3263 s32 *rev_offs, s32 *sysc_offs,
3266 *rev_offs = -ENODEV;
3270 if (data->offsets[SYSC_REVISION] >= 0)
3271 *rev_offs = data->offsets[SYSC_REVISION];
3273 if (data->offsets[SYSC_SYSCONFIG] >= 0)
3274 *sysc_offs = data->offsets[SYSC_SYSCONFIG];
3276 if (data->offsets[SYSC_SYSSTATUS] >= 0)
3277 *syss_offs = data->offsets[SYSC_SYSSTATUS];
3283 * omap_hwmod_init_sysc_flags - initialize sysconfig features
3284 * @dev: struct device
3285 * @data: module data
3286 * @sysc_flags: module configuration
3288 static int omap_hwmod_init_sysc_flags(struct device *dev,
3289 const struct ti_sysc_module_data *data,
3294 switch (data->cap->type) {
3296 case TI_SYSC_OMAP2_TIMER:
3297 /* See SYSC_OMAP2_* in include/dt-bindings/bus/ti-sysc.h */
3298 if (data->cfg->sysc_val & SYSC_OMAP2_CLOCKACTIVITY)
3299 *sysc_flags |= SYSC_HAS_CLOCKACTIVITY;
3300 if (data->cfg->sysc_val & SYSC_OMAP2_EMUFREE)
3301 *sysc_flags |= SYSC_HAS_EMUFREE;
3302 if (data->cfg->sysc_val & SYSC_OMAP2_ENAWAKEUP)
3303 *sysc_flags |= SYSC_HAS_ENAWAKEUP;
3304 if (data->cfg->sysc_val & SYSC_OMAP2_SOFTRESET)
3305 *sysc_flags |= SYSC_HAS_SOFTRESET;
3306 if (data->cfg->sysc_val & SYSC_OMAP2_AUTOIDLE)
3307 *sysc_flags |= SYSC_HAS_AUTOIDLE;
3310 case TI_SYSC_OMAP4_TIMER:
3311 /* See SYSC_OMAP4_* in include/dt-bindings/bus/ti-sysc.h */
3312 if (data->cfg->sysc_val & SYSC_OMAP4_DMADISABLE)
3313 *sysc_flags |= SYSC_HAS_DMADISABLE;
3314 if (data->cfg->sysc_val & SYSC_OMAP4_FREEEMU)
3315 *sysc_flags |= SYSC_HAS_EMUFREE;
3316 if (data->cfg->sysc_val & SYSC_OMAP4_SOFTRESET)
3317 *sysc_flags |= SYSC_HAS_SOFTRESET;
3319 case TI_SYSC_OMAP34XX_SR:
3320 case TI_SYSC_OMAP36XX_SR:
3321 /* See SYSC_OMAP3_SR_* in include/dt-bindings/bus/ti-sysc.h */
3322 if (data->cfg->sysc_val & SYSC_OMAP3_SR_ENAWAKEUP)
3323 *sysc_flags |= SYSC_HAS_ENAWAKEUP;
3326 if (data->cap->regbits->emufree_shift >= 0)
3327 *sysc_flags |= SYSC_HAS_EMUFREE;
3328 if (data->cap->regbits->enwkup_shift >= 0)
3329 *sysc_flags |= SYSC_HAS_ENAWAKEUP;
3330 if (data->cap->regbits->srst_shift >= 0)
3331 *sysc_flags |= SYSC_HAS_SOFTRESET;
3332 if (data->cap->regbits->autoidle_shift >= 0)
3333 *sysc_flags |= SYSC_HAS_AUTOIDLE;
3337 if (data->cap->regbits->midle_shift >= 0 &&
3338 data->cfg->midlemodes)
3339 *sysc_flags |= SYSC_HAS_MIDLEMODE;
3341 if (data->cap->regbits->sidle_shift >= 0 &&
3342 data->cfg->sidlemodes)
3343 *sysc_flags |= SYSC_HAS_SIDLEMODE;
3345 if (data->cfg->quirks & SYSC_QUIRK_UNCACHED)
3346 *sysc_flags |= SYSC_NO_CACHE;
3347 if (data->cfg->quirks & SYSC_QUIRK_RESET_STATUS)
3348 *sysc_flags |= SYSC_HAS_RESET_STATUS;
3350 if (data->cfg->syss_mask & 1)
3351 *sysc_flags |= SYSS_HAS_RESET_STATUS;
3357 * omap_hwmod_init_idlemodes - initialize module idle modes
3358 * @dev: struct device
3359 * @data: module data
3360 * @idlemodes: module supported idle modes
3362 static int omap_hwmod_init_idlemodes(struct device *dev,
3363 const struct ti_sysc_module_data *data,
3368 if (data->cfg->midlemodes & BIT(SYSC_IDLE_FORCE))
3369 *idlemodes |= MSTANDBY_FORCE;
3370 if (data->cfg->midlemodes & BIT(SYSC_IDLE_NO))
3371 *idlemodes |= MSTANDBY_NO;
3372 if (data->cfg->midlemodes & BIT(SYSC_IDLE_SMART))
3373 *idlemodes |= MSTANDBY_SMART;
3374 if (data->cfg->midlemodes & BIT(SYSC_IDLE_SMART_WKUP))
3375 *idlemodes |= MSTANDBY_SMART_WKUP;
3377 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_FORCE))
3378 *idlemodes |= SIDLE_FORCE;
3379 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_NO))
3380 *idlemodes |= SIDLE_NO;
3381 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_SMART))
3382 *idlemodes |= SIDLE_SMART;
3383 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_SMART_WKUP))
3384 *idlemodes |= SIDLE_SMART_WKUP;
3390 * omap_hwmod_check_module - check new module against platform data
3391 * @dev: struct device
3393 * @data: new module data
3394 * @sysc_fields: sysc register bits
3395 * @rev_offs: revision register offset
3396 * @sysc_offs: sysconfig register offset
3397 * @syss_offs: sysstatus register offset
3398 * @sysc_flags: sysc specific flags
3399 * @idlemodes: sysc supported idlemodes
3401 static int omap_hwmod_check_module(struct device *dev,
3402 struct omap_hwmod *oh,
3403 const struct ti_sysc_module_data *data,
3404 struct sysc_regbits *sysc_fields,
3405 s32 rev_offs, s32 sysc_offs,
3406 s32 syss_offs, u32 sysc_flags,
3409 if (!oh->class->sysc)
3412 if (sysc_fields != oh->class->sysc->sysc_fields)
3413 dev_warn(dev, "sysc_fields %p != %p\n", sysc_fields,
3414 oh->class->sysc->sysc_fields);
3416 if (rev_offs != oh->class->sysc->rev_offs)
3417 dev_warn(dev, "rev_offs %08x != %08x\n", rev_offs,
3418 oh->class->sysc->rev_offs);
3419 if (sysc_offs != oh->class->sysc->sysc_offs)
3420 dev_warn(dev, "sysc_offs %08x != %08x\n", sysc_offs,
3421 oh->class->sysc->sysc_offs);
3422 if (syss_offs != oh->class->sysc->syss_offs)
3423 dev_warn(dev, "syss_offs %08x != %08x\n", syss_offs,
3424 oh->class->sysc->syss_offs);
3426 if (sysc_flags != oh->class->sysc->sysc_flags)
3427 dev_warn(dev, "sysc_flags %08x != %08x\n", sysc_flags,
3428 oh->class->sysc->sysc_flags);
3430 if (idlemodes != oh->class->sysc->idlemodes)
3431 dev_warn(dev, "idlemodes %08x != %08x\n", idlemodes,
3432 oh->class->sysc->idlemodes);
3434 if (data->cfg->srst_udelay != oh->class->sysc->srst_udelay)
3435 dev_warn(dev, "srst_udelay %i != %i\n",
3436 data->cfg->srst_udelay,
3437 oh->class->sysc->srst_udelay);
3443 * omap_hwmod_allocate_module - allocate new module
3444 * @dev: struct device
3446 * @sysc_fields: sysc register bits
3447 * @clockdomain: clockdomain
3448 * @rev_offs: revision register offset
3449 * @sysc_offs: sysconfig register offset
3450 * @syss_offs: sysstatus register offset
3451 * @sysc_flags: sysc specific flags
3452 * @idlemodes: sysc supported idlemodes
3454 * Note that the allocations here cannot use devm as ti-sysc can rebind.
3456 static int omap_hwmod_allocate_module(struct device *dev, struct omap_hwmod *oh,
3457 const struct ti_sysc_module_data *data,
3458 struct sysc_regbits *sysc_fields,
3459 struct clockdomain *clkdm,
3460 s32 rev_offs, s32 sysc_offs,
3461 s32 syss_offs, u32 sysc_flags,
3464 struct omap_hwmod_class_sysconfig *sysc;
3465 struct omap_hwmod_class *class = NULL;
3466 struct omap_hwmod_ocp_if *oi = NULL;
3467 void __iomem *regs = NULL;
3468 unsigned long flags;
3470 sysc = kzalloc(sizeof(*sysc), GFP_KERNEL);
3474 sysc->sysc_fields = sysc_fields;
3475 sysc->rev_offs = rev_offs;
3476 sysc->sysc_offs = sysc_offs;
3477 sysc->syss_offs = syss_offs;
3478 sysc->sysc_flags = sysc_flags;
3479 sysc->idlemodes = idlemodes;
3480 sysc->srst_udelay = data->cfg->srst_udelay;
3482 if (!oh->_mpu_rt_va) {
3483 regs = ioremap(data->module_pa,
3490 * We may need a new oh->class as the other devices in the same class
3491 * may not yet have ioremapped their registers.
3493 if (oh->class->name && strcmp(oh->class->name, data->name)) {
3494 class = kmemdup(oh->class, sizeof(*oh->class), GFP_KERNEL);
3499 if (list_empty(&oh->slave_ports)) {
3500 oi = kcalloc(1, sizeof(*oi), GFP_KERNEL);
3505 * Note that we assume interconnect interface clocks will be
3506 * managed by the interconnect driver for OCPIF_SWSUP_IDLE case
3507 * on omap24xx and omap3.
3510 oi->user = OCP_USER_MPU | OCP_USER_SDMA;
3513 spin_lock_irqsave(&oh->_lock, flags);
3515 oh->_mpu_rt_va = regs;
3518 oh->class->sysc = sysc;
3523 oh->_state = _HWMOD_STATE_INITIALIZED;
3524 oh->_postsetup_state = _HWMOD_STATE_DEFAULT;
3526 spin_unlock_irqrestore(&oh->_lock, flags);
3531 static const struct omap_hwmod_reset omap24xx_reset_quirks[] = {
3532 { .match = "msdi", .len = 4, .reset = omap_msdi_reset, },
3535 static const struct omap_hwmod_reset dra7_reset_quirks[] = {
3536 { .match = "pcie", .len = 4, .reset = dra7xx_pciess_reset, },
3539 static const struct omap_hwmod_reset omap_reset_quirks[] = {
3540 { .match = "dss_core", .len = 8, .reset = omap_dss_reset, },
3541 { .match = "hdq1w", .len = 5, .reset = omap_hdq1w_reset, },
3542 { .match = "i2c", .len = 3, .reset = omap_i2c_reset, },
3543 { .match = "wd_timer", .len = 8, .reset = omap2_wd_timer_reset, },
3547 omap_hwmod_init_reset_quirk(struct device *dev, struct omap_hwmod *oh,
3548 const struct ti_sysc_module_data *data,
3549 const struct omap_hwmod_reset *quirks,
3552 const struct omap_hwmod_reset *quirk;
3555 for (i = 0; i < quirks_sz; i++) {
3557 if (!strncmp(data->name, quirk->match, quirk->len)) {
3558 oh->class->reset = quirk->reset;
3566 omap_hwmod_init_reset_quirks(struct device *dev, struct omap_hwmod *oh,
3567 const struct ti_sysc_module_data *data)
3569 if (soc_is_omap24xx())
3570 omap_hwmod_init_reset_quirk(dev, oh, data,
3571 omap24xx_reset_quirks,
3572 ARRAY_SIZE(omap24xx_reset_quirks));
3574 if (soc_is_dra7xx())
3575 omap_hwmod_init_reset_quirk(dev, oh, data, dra7_reset_quirks,
3576 ARRAY_SIZE(dra7_reset_quirks));
3578 omap_hwmod_init_reset_quirk(dev, oh, data, omap_reset_quirks,
3579 ARRAY_SIZE(omap_reset_quirks));
3583 * omap_hwmod_init_module - initialize new module
3584 * @dev: struct device
3585 * @data: module data
3586 * @cookie: cookie for the caller to use for later calls
3588 int omap_hwmod_init_module(struct device *dev,
3589 const struct ti_sysc_module_data *data,
3590 struct ti_sysc_cookie *cookie)
3592 struct omap_hwmod *oh;
3593 struct sysc_regbits *sysc_fields;
3594 s32 rev_offs, sysc_offs, syss_offs;
3595 u32 sysc_flags, idlemodes;
3598 if (!dev || !data || !data->name || !cookie)
3601 oh = _lookup(data->name);
3603 oh = kzalloc(sizeof(*oh), GFP_KERNEL);
3607 oh->name = data->name;
3608 oh->_state = _HWMOD_STATE_UNKNOWN;
3609 lockdep_register_key(&oh->hwmod_key);
3611 /* Unused, can be handled by PRM driver handling resets */
3612 oh->prcm.omap4.flags = HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT;
3614 oh->class = kzalloc(sizeof(*oh->class), GFP_KERNEL);
3620 omap_hwmod_init_reset_quirks(dev, oh, data);
3622 oh->class->name = data->name;
3623 mutex_lock(&list_lock);
3624 error = _register(oh);
3625 mutex_unlock(&list_lock);
3630 error = omap_hwmod_init_regbits(dev, data, &sysc_fields);
3634 error = omap_hwmod_init_reg_offs(dev, data, &rev_offs,
3635 &sysc_offs, &syss_offs);
3639 error = omap_hwmod_init_sysc_flags(dev, data, &sysc_flags);
3643 error = omap_hwmod_init_idlemodes(dev, data, &idlemodes);
3647 if (data->cfg->quirks & SYSC_QUIRK_NO_IDLE)
3648 oh->flags |= HWMOD_NO_IDLE;
3649 if (data->cfg->quirks & SYSC_QUIRK_NO_IDLE_ON_INIT)
3650 oh->flags |= HWMOD_INIT_NO_IDLE;
3651 if (data->cfg->quirks & SYSC_QUIRK_NO_RESET_ON_INIT)
3652 oh->flags |= HWMOD_INIT_NO_RESET;
3653 if (data->cfg->quirks & SYSC_QUIRK_USE_CLOCKACT)
3654 oh->flags |= HWMOD_SET_DEFAULT_CLOCKACT;
3655 if (data->cfg->quirks & SYSC_QUIRK_SWSUP_SIDLE)
3656 oh->flags |= HWMOD_SWSUP_SIDLE;
3657 if (data->cfg->quirks & SYSC_QUIRK_SWSUP_SIDLE_ACT)
3658 oh->flags |= HWMOD_SWSUP_SIDLE_ACT;
3659 if (data->cfg->quirks & SYSC_QUIRK_SWSUP_MSTANDBY)
3660 oh->flags |= HWMOD_SWSUP_MSTANDBY;
3661 if (data->cfg->quirks & SYSC_QUIRK_CLKDM_NOAUTO)
3662 oh->flags |= HWMOD_CLKDM_NOAUTO;
3664 error = omap_hwmod_check_module(dev, oh, data, sysc_fields,
3665 rev_offs, sysc_offs, syss_offs,
3666 sysc_flags, idlemodes);
3670 return omap_hwmod_allocate_module(dev, oh, data, sysc_fields,
3671 cookie->clkdm, rev_offs,
3672 sysc_offs, syss_offs,
3673 sysc_flags, idlemodes);
3677 * omap_hwmod_setup_earlycon_flags - set up flags for early console
3679 * Enable DEBUG_OMAPUART_FLAGS for uart hwmod that is being used as
3680 * early concole so that hwmod core doesn't reset and keep it in idle
3681 * that specific uart.
3683 #ifdef CONFIG_SERIAL_EARLYCON
3684 static void __init omap_hwmod_setup_earlycon_flags(void)
3686 struct device_node *np;
3687 struct omap_hwmod *oh;
3690 np = of_find_node_by_path("/chosen");
3692 uart = of_get_property(np, "stdout-path", NULL);
3694 np = of_find_node_by_path(uart);
3696 uart = of_get_property(np, "ti,hwmods", NULL);
3697 oh = omap_hwmod_lookup(uart);
3699 uart = of_get_property(np->parent,
3702 oh = omap_hwmod_lookup(uart);
3705 oh->flags |= DEBUG_OMAPUART_FLAGS;
3713 * omap_hwmod_setup_all - set up all registered IP blocks
3715 * Initialize and set up all IP blocks registered with the hwmod code.
3716 * Must be called after omap2_clk_init(). Resolves the struct clk
3717 * names to struct clk pointers for each registered omap_hwmod. Also
3718 * calls _setup() on each hwmod. Returns 0 upon success.
3720 static int __init omap_hwmod_setup_all(void)
3722 _ensure_mpu_hwmod_is_setup(NULL);
3724 omap_hwmod_for_each(_init, NULL);
3725 #ifdef CONFIG_SERIAL_EARLYCON
3726 omap_hwmod_setup_earlycon_flags();
3728 omap_hwmod_for_each(_setup, NULL);
3732 omap_postcore_initcall(omap_hwmod_setup_all);
3735 * omap_hwmod_enable - enable an omap_hwmod
3736 * @oh: struct omap_hwmod *
3738 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
3739 * Returns -EINVAL on error or passes along the return value from _enable().
3741 int omap_hwmod_enable(struct omap_hwmod *oh)
3744 unsigned long flags;
3749 spin_lock_irqsave(&oh->_lock, flags);
3751 spin_unlock_irqrestore(&oh->_lock, flags);
3757 * omap_hwmod_idle - idle an omap_hwmod
3758 * @oh: struct omap_hwmod *
3760 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
3761 * Returns -EINVAL on error or passes along the return value from _idle().
3763 int omap_hwmod_idle(struct omap_hwmod *oh)
3766 unsigned long flags;
3771 spin_lock_irqsave(&oh->_lock, flags);
3773 spin_unlock_irqrestore(&oh->_lock, flags);
3779 * omap_hwmod_shutdown - shutdown an omap_hwmod
3780 * @oh: struct omap_hwmod *
3782 * Shutdown an omap_hwmod @oh. Intended to be called by
3783 * omap_device_shutdown(). Returns -EINVAL on error or passes along
3784 * the return value from _shutdown().
3786 int omap_hwmod_shutdown(struct omap_hwmod *oh)
3789 unsigned long flags;
3794 spin_lock_irqsave(&oh->_lock, flags);
3796 spin_unlock_irqrestore(&oh->_lock, flags);
3802 * IP block data retrieval functions
3806 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
3807 * @oh: struct omap_hwmod *
3809 * Return the powerdomain pointer associated with the OMAP module
3810 * @oh's main clock. If @oh does not have a main clk, return the
3811 * powerdomain associated with the interface clock associated with the
3812 * module's MPU port. (XXX Perhaps this should use the SDMA port
3813 * instead?) Returns NULL on error, or a struct powerdomain * on
3816 struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
3819 struct omap_hwmod_ocp_if *oi;
3820 struct clockdomain *clkdm;
3821 struct clk_hw_omap *clk;
3827 return oh->clkdm->pwrdm.ptr;
3832 oi = _find_mpu_rt_port(oh);
3838 clk = to_clk_hw_omap(__clk_get_hw(c));
3843 return clkdm->pwrdm.ptr;
3847 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
3848 * @oh: struct omap_hwmod *
3850 * Returns the virtual address corresponding to the beginning of the
3851 * module's register target, in the address range that is intended to
3852 * be used by the MPU. Returns the virtual address upon success or NULL
3855 void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
3860 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
3863 if (oh->_state == _HWMOD_STATE_UNKNOWN)
3866 return oh->_mpu_rt_va;
3870 * XXX what about functions for drivers to save/restore ocp_sysconfig
3871 * for context save/restore operations?
3875 * omap_hwmod_enable_wakeup - allow device to wake up the system
3876 * @oh: struct omap_hwmod *
3878 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
3879 * send wakeups to the PRCM, and enable I/O ring wakeup events for
3880 * this IP block if it has dynamic mux entries. Eventually this
3881 * should set PRCM wakeup registers to cause the PRCM to receive
3882 * wakeup events from the module. Does not set any wakeup routing
3883 * registers beyond this point - if the module is to wake up any other
3884 * module or subsystem, that must be set separately. Called by
3885 * omap_device code. Returns -EINVAL on error or 0 upon success.
3887 int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
3889 unsigned long flags;
3892 spin_lock_irqsave(&oh->_lock, flags);
3894 if (oh->class->sysc &&
3895 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3896 v = oh->_sysc_cache;
3897 _enable_wakeup(oh, &v);
3898 _write_sysconfig(v, oh);
3901 spin_unlock_irqrestore(&oh->_lock, flags);
3907 * omap_hwmod_disable_wakeup - prevent device from waking the system
3908 * @oh: struct omap_hwmod *
3910 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
3911 * from sending wakeups to the PRCM, and disable I/O ring wakeup
3912 * events for this IP block if it has dynamic mux entries. Eventually
3913 * this should clear PRCM wakeup registers to cause the PRCM to ignore
3914 * wakeup events from the module. Does not set any wakeup routing
3915 * registers beyond this point - if the module is to wake up any other
3916 * module or subsystem, that must be set separately. Called by
3917 * omap_device code. Returns -EINVAL on error or 0 upon success.
3919 int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
3921 unsigned long flags;
3924 spin_lock_irqsave(&oh->_lock, flags);
3926 if (oh->class->sysc &&
3927 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3928 v = oh->_sysc_cache;
3929 _disable_wakeup(oh, &v);
3930 _write_sysconfig(v, oh);
3933 spin_unlock_irqrestore(&oh->_lock, flags);
3939 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
3940 * contained in the hwmod module.
3941 * @oh: struct omap_hwmod *
3942 * @name: name of the reset line to lookup and assert
3944 * Some IP like dsp, ipu or iva contain processor that require
3945 * an HW reset line to be assert / deassert in order to enable fully
3946 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3947 * yet supported on this OMAP; otherwise, passes along the return value
3948 * from _assert_hardreset().
3950 int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
3953 unsigned long flags;
3958 spin_lock_irqsave(&oh->_lock, flags);
3959 ret = _assert_hardreset(oh, name);
3960 spin_unlock_irqrestore(&oh->_lock, flags);
3966 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
3967 * contained in the hwmod module.
3968 * @oh: struct omap_hwmod *
3969 * @name: name of the reset line to look up and deassert
3971 * Some IP like dsp, ipu or iva contain processor that require
3972 * an HW reset line to be assert / deassert in order to enable fully
3973 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3974 * yet supported on this OMAP; otherwise, passes along the return value
3975 * from _deassert_hardreset().
3977 int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
3980 unsigned long flags;
3985 spin_lock_irqsave(&oh->_lock, flags);
3986 ret = _deassert_hardreset(oh, name);
3987 spin_unlock_irqrestore(&oh->_lock, flags);
3993 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
3994 * @classname: struct omap_hwmod_class name to search for
3995 * @fn: callback function pointer to call for each hwmod in class @classname
3996 * @user: arbitrary context data to pass to the callback function
3998 * For each omap_hwmod of class @classname, call @fn.
3999 * If the callback function returns something other than
4000 * zero, the iterator is terminated, and the callback function's return
4001 * value is passed back to the caller. Returns 0 upon success, -EINVAL
4002 * if @classname or @fn are NULL, or passes back the error code from @fn.
4004 int omap_hwmod_for_each_by_class(const char *classname,
4005 int (*fn)(struct omap_hwmod *oh,
4009 struct omap_hwmod *temp_oh;
4012 if (!classname || !fn)
4015 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
4016 __func__, classname);
4018 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
4019 if (!strcmp(temp_oh->class->name, classname)) {
4020 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
4021 __func__, temp_oh->name);
4022 ret = (*fn)(temp_oh, user);
4029 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
4036 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
4037 * @oh: struct omap_hwmod *
4038 * @state: state that _setup() should leave the hwmod in
4040 * Sets the hwmod state that @oh will enter at the end of _setup()
4041 * (called by omap_hwmod_setup_*()). See also the documentation
4042 * for _setup_postsetup(), above. Returns 0 upon success or
4043 * -EINVAL if there is a problem with the arguments or if the hwmod is
4044 * in the wrong state.
4046 int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
4049 unsigned long flags;
4054 if (state != _HWMOD_STATE_DISABLED &&
4055 state != _HWMOD_STATE_ENABLED &&
4056 state != _HWMOD_STATE_IDLE)
4059 spin_lock_irqsave(&oh->_lock, flags);
4061 if (oh->_state != _HWMOD_STATE_REGISTERED) {
4066 oh->_postsetup_state = state;
4070 spin_unlock_irqrestore(&oh->_lock, flags);
4076 * omap_hwmod_get_context_loss_count - get lost context count
4077 * @oh: struct omap_hwmod *
4079 * Returns the context loss count of associated @oh
4080 * upon success, or zero if no context loss data is available.
4082 * On OMAP4, this queries the per-hwmod context loss register,
4083 * assuming one exists. If not, or on OMAP2/3, this queries the
4084 * enclosing powerdomain context loss count.
4086 int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
4088 struct powerdomain *pwrdm;
4091 if (soc_ops.get_context_lost)
4092 return soc_ops.get_context_lost(oh);
4094 pwrdm = omap_hwmod_get_pwrdm(oh);
4096 ret = pwrdm_get_context_loss_count(pwrdm);
4102 * omap_hwmod_init - initialize the hwmod code
4104 * Sets up some function pointers needed by the hwmod code to operate on the
4105 * currently-booted SoC. Intended to be called once during kernel init
4106 * before any hwmods are registered. No return value.
4108 void __init omap_hwmod_init(void)
4110 if (cpu_is_omap24xx()) {
4111 soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready;
4112 soc_ops.assert_hardreset = _omap2_assert_hardreset;
4113 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
4114 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
4115 } else if (cpu_is_omap34xx()) {
4116 soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready;
4117 soc_ops.assert_hardreset = _omap2_assert_hardreset;
4118 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
4119 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
4120 soc_ops.init_clkdm = _init_clkdm;
4121 } else if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx()) {
4122 soc_ops.enable_module = _omap4_enable_module;
4123 soc_ops.disable_module = _omap4_disable_module;
4124 soc_ops.wait_target_ready = _omap4_wait_target_ready;
4125 soc_ops.assert_hardreset = _omap4_assert_hardreset;
4126 soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
4127 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
4128 soc_ops.init_clkdm = _init_clkdm;
4129 soc_ops.update_context_lost = _omap4_update_context_lost;
4130 soc_ops.get_context_lost = _omap4_get_context_lost;
4131 soc_ops.disable_direct_prcm = _omap4_disable_direct_prcm;
4132 soc_ops.xlate_clkctrl = _omap4_xlate_clkctrl;
4133 } else if (cpu_is_ti814x() || cpu_is_ti816x() || soc_is_am33xx() ||
4135 soc_ops.enable_module = _omap4_enable_module;
4136 soc_ops.disable_module = _omap4_disable_module;
4137 soc_ops.wait_target_ready = _omap4_wait_target_ready;
4138 soc_ops.assert_hardreset = _omap4_assert_hardreset;
4139 soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
4140 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
4141 soc_ops.init_clkdm = _init_clkdm;
4142 soc_ops.disable_direct_prcm = _omap4_disable_direct_prcm;
4143 soc_ops.xlate_clkctrl = _omap4_xlate_clkctrl;
4145 WARN(1, "omap_hwmod: unknown SoC type\n");
4148 _init_clkctrl_providers();
4154 * omap_hwmod_get_main_clk - get pointer to main clock name
4155 * @oh: struct omap_hwmod *
4157 * Returns the main clock name assocated with @oh upon success,
4158 * or NULL if @oh is NULL.
4160 const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh)
4165 return oh->main_clk;