1 // SPDX-License-Identifier: GPL-2.0-only
3 * omap_hwmod implementation for OMAP2/3/4
5 * Copyright (C) 2009-2011 Nokia Corporation
6 * Copyright (C) 2011-2012 Texas Instruments, Inc.
8 * Paul Walmsley, BenoƮt Cousson, Kevin Hilman
10 * Created in collaboration with (alphabetical order): Thara Gopinath,
11 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
12 * Sawant, Santosh Shilimkar, Richard Woodruff
16 * One way to view an OMAP SoC is as a collection of largely unrelated
17 * IP blocks connected by interconnects. The IP blocks include
18 * devices such as ARM processors, audio serial interfaces, UARTs,
19 * etc. Some of these devices, like the DSP, are created by TI;
20 * others, like the SGX, largely originate from external vendors. In
21 * TI's documentation, on-chip devices are referred to as "OMAP
22 * modules." Some of these IP blocks are identical across several
23 * OMAP versions. Others are revised frequently.
25 * These OMAP modules are tied together by various interconnects.
26 * Most of the address and data flow between modules is via OCP-based
27 * interconnects such as the L3 and L4 buses; but there are other
28 * interconnects that distribute the hardware clock tree, handle idle
29 * and reset signaling, supply power, and connect the modules to
30 * various pads or balls on the OMAP package.
32 * OMAP hwmod provides a consistent way to describe the on-chip
33 * hardware blocks and their integration into the rest of the chip.
34 * This description can be automatically generated from the TI
35 * hardware database. OMAP hwmod provides a standard, consistent API
36 * to reset, enable, idle, and disable these hardware blocks. And
37 * hwmod provides a way for other core code, such as the Linux device
38 * code or the OMAP power management and address space mapping code,
39 * to query the hardware database.
43 * Drivers won't call hwmod functions directly. That is done by the
44 * omap_device code, and in rare occasions, by custom integration code
45 * in arch/arm/ *omap*. The omap_device code includes functions to
46 * build a struct platform_device using omap_hwmod data, and that is
47 * currently how hwmod data is communicated to drivers and to the
48 * Linux driver model. Most drivers will call omap_hwmod functions only
49 * indirectly, via pm_runtime*() functions.
51 * From a layering perspective, here is where the OMAP hwmod code
52 * fits into the kernel software stack:
54 * +-------------------------------+
55 * | Device driver code |
56 * | (e.g., drivers/) |
57 * +-------------------------------+
58 * | Linux driver model |
59 * | (platform_device / |
60 * | platform_driver data/code) |
61 * +-------------------------------+
62 * | OMAP core-driver integration |
63 * |(arch/arm/mach-omap2/devices.c)|
64 * +-------------------------------+
65 * | omap_device code |
66 * | (../plat-omap/omap_device.c) |
67 * +-------------------------------+
68 * ----> | omap_hwmod code/data | <-----
69 * | (../mach-omap2/omap_hwmod*) |
70 * +-------------------------------+
71 * | OMAP clock/PRCM/register fns |
72 * | ({read,write}l_relaxed, clk*) |
73 * +-------------------------------+
75 * Device drivers should not contain any OMAP-specific code or data in
76 * them. They should only contain code to operate the IP block that
77 * the driver is responsible for. This is because these IP blocks can
78 * also appear in other SoCs, either from TI (such as DaVinci) or from
79 * other manufacturers; and drivers should be reusable across other
82 * The OMAP hwmod code also will attempt to reset and idle all on-chip
83 * devices upon boot. The goal here is for the kernel to be
84 * completely self-reliant and independent from bootloaders. This is
85 * to ensure a repeatable configuration, both to ensure consistent
86 * runtime behavior, and to make it easier for others to reproduce
89 * OMAP module activity states
90 * ---------------------------
91 * The hwmod code considers modules to be in one of several activity
92 * states. IP blocks start out in an UNKNOWN state, then once they
93 * are registered via the hwmod code, proceed to the REGISTERED state.
94 * Once their clock names are resolved to clock pointers, the module
95 * enters the CLKS_INITED state; and finally, once the module has been
96 * reset and the integration registers programmed, the INITIALIZED state
97 * is entered. The hwmod code will then place the module into either
98 * the IDLE state to save power, or in the case of a critical system
99 * module, the ENABLED state.
101 * OMAP core integration code can then call omap_hwmod*() functions
102 * directly to move the module between the IDLE, ENABLED, and DISABLED
103 * states, as needed. This is done during both the PM idle loop, and
104 * in the OMAP core integration code's implementation of the PM runtime
109 * This is a partial list.
110 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
111 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
112 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
113 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
114 * - Open Core Protocol Specification 2.2
117 * - handle IO mapping
118 * - bus throughput & module latency measurement code
120 * XXX add tests at the beginning of each function to ensure the hwmod is
121 * in the appropriate state
122 * XXX error return values should be checked to ensure that they are
127 #include <linux/kernel.h>
128 #include <linux/errno.h>
129 #include <linux/io.h>
130 #include <linux/clk.h>
131 #include <linux/clk-provider.h>
132 #include <linux/delay.h>
133 #include <linux/err.h>
134 #include <linux/list.h>
135 #include <linux/mutex.h>
136 #include <linux/spinlock.h>
137 #include <linux/slab.h>
138 #include <linux/cpu.h>
139 #include <linux/of.h>
140 #include <linux/of_address.h>
141 #include <linux/memblock.h>
143 #include <linux/platform_data/ti-sysc.h>
145 #include <dt-bindings/bus/ti-sysc.h>
147 #include <asm/system_misc.h>
150 #include "omap_hwmod.h"
154 #include "clockdomain.h"
157 #include "powerdomain.h"
165 #include "prminst44xx.h"
167 #include "wd_timer.h"
169 /* Name of the OMAP hwmod for the MPU */
170 #define MPU_INITIATOR_NAME "mpu"
173 * Number of struct omap_hwmod_link records per struct
174 * omap_hwmod_ocp_if record (master->slave and slave->master)
176 #define LINKS_PER_OCP_IF 2
179 * Address offset (in bytes) between the reset control and the reset
180 * status registers: 4 bytes on OMAP4
182 #define OMAP4_RST_CTRL_ST_OFFSET 4
185 * Maximum length for module clock handle names
187 #define MOD_CLK_MAX_NAME_LEN 32
190 * struct clkctrl_provider - clkctrl provider mapping data
191 * @num_addrs: number of base address ranges for the provider
192 * @addr: base address(es) for the provider
193 * @size: size(s) of the provider address space(s)
194 * @node: device node associated with the provider
197 struct clkctrl_provider {
201 struct device_node *node;
202 struct list_head link;
205 static LIST_HEAD(clkctrl_providers);
208 * struct omap_hwmod_reset - IP specific reset functions
209 * @match: string to match against the module name
210 * @len: number of characters to match
211 * @reset: IP specific reset function
213 * Used only in cases where struct omap_hwmod is dynamically allocated.
215 struct omap_hwmod_reset {
218 int (*reset)(struct omap_hwmod *oh);
222 * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
223 * @enable_module: function to enable a module (via MODULEMODE)
224 * @disable_module: function to disable a module (via MODULEMODE)
226 * XXX Eventually this functionality will be hidden inside the PRM/CM
227 * device drivers. Until then, this should avoid huge blocks of cpu_is_*()
228 * conditionals in this code.
230 struct omap_hwmod_soc_ops {
231 void (*enable_module)(struct omap_hwmod *oh);
232 int (*disable_module)(struct omap_hwmod *oh);
233 int (*wait_target_ready)(struct omap_hwmod *oh);
234 int (*assert_hardreset)(struct omap_hwmod *oh,
235 struct omap_hwmod_rst_info *ohri);
236 int (*deassert_hardreset)(struct omap_hwmod *oh,
237 struct omap_hwmod_rst_info *ohri);
238 int (*is_hardreset_asserted)(struct omap_hwmod *oh,
239 struct omap_hwmod_rst_info *ohri);
240 int (*init_clkdm)(struct omap_hwmod *oh);
241 void (*update_context_lost)(struct omap_hwmod *oh);
242 int (*get_context_lost)(struct omap_hwmod *oh);
243 int (*disable_direct_prcm)(struct omap_hwmod *oh);
244 u32 (*xlate_clkctrl)(struct omap_hwmod *oh);
247 /* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
248 static struct omap_hwmod_soc_ops soc_ops;
250 /* omap_hwmod_list contains all registered struct omap_hwmods */
251 static LIST_HEAD(omap_hwmod_list);
252 static DEFINE_MUTEX(list_lock);
254 /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
255 static struct omap_hwmod *mpu_oh;
257 /* inited: set to true once the hwmod code is initialized */
260 /* Private functions */
263 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
264 * @oh: struct omap_hwmod *
266 * Load the current value of the hwmod OCP_SYSCONFIG register into the
267 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
268 * OCP_SYSCONFIG register or 0 upon success.
270 static int _update_sysc_cache(struct omap_hwmod *oh)
272 if (!oh->class->sysc) {
273 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
277 /* XXX ensure module interface clock is up */
279 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
281 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
282 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
288 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
289 * @v: OCP_SYSCONFIG value to write
290 * @oh: struct omap_hwmod *
292 * Write @v into the module class' OCP_SYSCONFIG register, if it has
293 * one. No return value.
295 static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
297 if (!oh->class->sysc) {
298 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
302 /* XXX ensure module interface clock is up */
304 /* Module might have lost context, always update cache and register */
308 * Some IP blocks (such as RTC) require unlocking of IP before
309 * accessing its registers. If a function pointer is present
310 * to unlock, then call it before accessing sysconfig and
311 * call lock after writing sysconfig.
313 if (oh->class->unlock)
314 oh->class->unlock(oh);
316 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
323 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
324 * @oh: struct omap_hwmod *
325 * @standbymode: MIDLEMODE field bits
326 * @v: pointer to register contents to modify
328 * Update the master standby mode bits in @v to be @standbymode for
329 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
330 * upon error or 0 upon success.
332 static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
338 if (!oh->class->sysc ||
339 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
342 if (!oh->class->sysc->sysc_fields) {
343 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
347 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
348 mstandby_mask = (0x3 << mstandby_shift);
350 *v &= ~mstandby_mask;
351 *v |= __ffs(standbymode) << mstandby_shift;
357 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
358 * @oh: struct omap_hwmod *
359 * @idlemode: SIDLEMODE field bits
360 * @v: pointer to register contents to modify
362 * Update the slave idle mode bits in @v to be @idlemode for the @oh
363 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
366 static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
371 if (!oh->class->sysc ||
372 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
375 if (!oh->class->sysc->sysc_fields) {
376 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
380 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
381 sidle_mask = (0x3 << sidle_shift);
384 *v |= __ffs(idlemode) << sidle_shift;
390 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
391 * @oh: struct omap_hwmod *
392 * @clockact: CLOCKACTIVITY field bits
393 * @v: pointer to register contents to modify
395 * Update the clockactivity mode bits in @v to be @clockact for the
396 * @oh hwmod. Used for additional powersaving on some modules. Does
397 * not write to the hardware. Returns -EINVAL upon error or 0 upon
400 static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
405 if (!oh->class->sysc ||
406 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
409 if (!oh->class->sysc->sysc_fields) {
410 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
414 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
415 clkact_mask = (0x3 << clkact_shift);
418 *v |= clockact << clkact_shift;
424 * _set_softreset: set OCP_SYSCONFIG.SOFTRESET bit in @v
425 * @oh: struct omap_hwmod *
426 * @v: pointer to register contents to modify
428 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
429 * error or 0 upon success.
431 static int _set_softreset(struct omap_hwmod *oh, u32 *v)
435 if (!oh->class->sysc ||
436 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
439 if (!oh->class->sysc->sysc_fields) {
440 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
444 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
452 * _clear_softreset: clear OCP_SYSCONFIG.SOFTRESET bit in @v
453 * @oh: struct omap_hwmod *
454 * @v: pointer to register contents to modify
456 * Clear the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
457 * error or 0 upon success.
459 static int _clear_softreset(struct omap_hwmod *oh, u32 *v)
463 if (!oh->class->sysc ||
464 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
467 if (!oh->class->sysc->sysc_fields) {
469 "omap_hwmod: %s: sysc_fields absent for sysconfig class\n",
474 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
482 * _wait_softreset_complete - wait for an OCP softreset to complete
483 * @oh: struct omap_hwmod * to wait on
485 * Wait until the IP block represented by @oh reports that its OCP
486 * softreset is complete. This can be triggered by software (see
487 * _ocp_softreset()) or by hardware upon returning from off-mode (one
488 * example is HSMMC). Waits for up to MAX_MODULE_SOFTRESET_WAIT
489 * microseconds. Returns the number of microseconds waited.
491 static int _wait_softreset_complete(struct omap_hwmod *oh)
493 struct omap_hwmod_class_sysconfig *sysc;
497 sysc = oh->class->sysc;
499 if (sysc->sysc_flags & SYSS_HAS_RESET_STATUS && sysc->syss_offs > 0)
500 omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs)
501 & SYSS_RESETDONE_MASK),
502 MAX_MODULE_SOFTRESET_WAIT, c);
503 else if (sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
504 softrst_mask = (0x1 << sysc->sysc_fields->srst_shift);
505 omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs)
507 MAX_MODULE_SOFTRESET_WAIT, c);
514 * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
515 * @oh: struct omap_hwmod *
517 * The DMADISABLE bit is a semi-automatic bit present in sysconfig register
518 * of some modules. When the DMA must perform read/write accesses, the
519 * DMADISABLE bit is cleared by the hardware. But when the DMA must stop
520 * for power management, software must set the DMADISABLE bit back to 1.
522 * Set the DMADISABLE bit in @v for hwmod @oh. Returns -EINVAL upon
523 * error or 0 upon success.
525 static int _set_dmadisable(struct omap_hwmod *oh)
530 if (!oh->class->sysc ||
531 !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE))
534 if (!oh->class->sysc->sysc_fields) {
535 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
539 /* clocks must be on for this operation */
540 if (oh->_state != _HWMOD_STATE_ENABLED) {
541 pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name);
545 pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name);
549 (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift);
550 v |= dmadisable_mask;
551 _write_sysconfig(v, oh);
557 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
558 * @oh: struct omap_hwmod *
559 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
560 * @v: pointer to register contents to modify
562 * Update the module autoidle bit in @v to be @autoidle for the @oh
563 * hwmod. The autoidle bit controls whether the module can gate
564 * internal clocks automatically when it isn't doing anything; the
565 * exact function of this bit varies on a per-module basis. This
566 * function does not write to the hardware. Returns -EINVAL upon
567 * error or 0 upon success.
569 static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
575 if (!oh->class->sysc ||
576 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
579 if (!oh->class->sysc->sysc_fields) {
580 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
584 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
585 autoidle_mask = (0x1 << autoidle_shift);
587 *v &= ~autoidle_mask;
588 *v |= autoidle << autoidle_shift;
594 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
595 * @oh: struct omap_hwmod *
597 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
598 * upon error or 0 upon success.
600 static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
602 if (!oh->class->sysc ||
603 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
604 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
605 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
608 if (!oh->class->sysc->sysc_fields) {
609 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
613 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
614 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
616 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
617 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
618 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
619 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
621 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
626 static struct clockdomain *_get_clkdm(struct omap_hwmod *oh)
628 struct clk_hw_omap *clk;
635 } else if (oh->_clk) {
636 if (!omap2_clk_is_hw_omap(__clk_get_hw(oh->_clk)))
638 clk = to_clk_hw_omap(__clk_get_hw(oh->_clk));
645 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
646 * @oh: struct omap_hwmod *
648 * Prevent the hardware module @oh from entering idle while the
649 * hardare module initiator @init_oh is active. Useful when a module
650 * will be accessed by a particular initiator (e.g., if a module will
651 * be accessed by the IVA, there should be a sleepdep between the IVA
652 * initiator and the module). Only applies to modules in smart-idle
653 * mode. If the clockdomain is marked as not needing autodeps, return
654 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
655 * passes along clkdm_add_sleepdep() value upon success.
657 static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
659 struct clockdomain *clkdm, *init_clkdm;
661 clkdm = _get_clkdm(oh);
662 init_clkdm = _get_clkdm(init_oh);
664 if (!clkdm || !init_clkdm)
667 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
670 return clkdm_add_sleepdep(clkdm, init_clkdm);
674 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
675 * @oh: struct omap_hwmod *
677 * Allow the hardware module @oh to enter idle while the hardare
678 * module initiator @init_oh is active. Useful when a module will not
679 * be accessed by a particular initiator (e.g., if a module will not
680 * be accessed by the IVA, there should be no sleepdep between the IVA
681 * initiator and the module). Only applies to modules in smart-idle
682 * mode. If the clockdomain is marked as not needing autodeps, return
683 * 0 without doing anything. Returns -EINVAL upon error or passes
684 * along clkdm_del_sleepdep() value upon success.
686 static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
688 struct clockdomain *clkdm, *init_clkdm;
690 clkdm = _get_clkdm(oh);
691 init_clkdm = _get_clkdm(init_oh);
693 if (!clkdm || !init_clkdm)
696 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
699 return clkdm_del_sleepdep(clkdm, init_clkdm);
702 static const struct of_device_id ti_clkctrl_match_table[] __initconst = {
703 { .compatible = "ti,clkctrl" },
707 static int __init _setup_clkctrl_provider(struct device_node *np)
710 struct clkctrl_provider *provider;
714 provider = memblock_alloc(sizeof(*provider), SMP_CACHE_BYTES);
720 provider->num_addrs =
721 of_property_count_elems_of_size(np, "reg", sizeof(u32)) / 2;
724 memblock_alloc(sizeof(void *) * provider->num_addrs,
730 memblock_alloc(sizeof(u32) * provider->num_addrs,
735 for (i = 0; i < provider->num_addrs; i++) {
736 addrp = of_get_address(np, i, &size, NULL);
737 provider->addr[i] = (u32)of_translate_address(np, addrp);
738 provider->size[i] = size;
739 pr_debug("%s: %pOF: %x...%x\n", __func__, np, provider->addr[i],
740 provider->addr[i] + provider->size[i]);
743 list_add(&provider->link, &clkctrl_providers);
748 static int __init _init_clkctrl_providers(void)
750 struct device_node *np;
753 for_each_matching_node(np, ti_clkctrl_match_table) {
754 ret = _setup_clkctrl_provider(np);
764 static u32 _omap4_xlate_clkctrl(struct omap_hwmod *oh)
766 if (!oh->prcm.omap4.modulemode)
769 return omap_cm_xlate_clkctrl(oh->clkdm->prcm_partition,
771 oh->prcm.omap4.clkctrl_offs);
774 static struct clk *_lookup_clkctrl_clk(struct omap_hwmod *oh)
776 struct clkctrl_provider *provider;
780 if (!soc_ops.xlate_clkctrl)
783 addr = soc_ops.xlate_clkctrl(oh);
787 pr_debug("%s: %s: addr=%x\n", __func__, oh->name, addr);
789 list_for_each_entry(provider, &clkctrl_providers, link) {
792 for (i = 0; i < provider->num_addrs; i++) {
793 if (provider->addr[i] <= addr &&
794 provider->addr[i] + provider->size[i] > addr) {
795 struct of_phandle_args clkspec;
797 clkspec.np = provider->node;
798 clkspec.args_count = 2;
799 clkspec.args[0] = addr - provider->addr[0];
802 clk = of_clk_get_from_provider(&clkspec);
804 pr_debug("%s: %s got %p (offset=%x, provider=%pOF)\n",
805 __func__, oh->name, clk,
806 clkspec.args[0], provider->node);
817 * _init_main_clk - get a struct clk * for the hwmod's main functional clk
818 * @oh: struct omap_hwmod *
820 * Called from _init_clocks(). Populates the @oh _clk (main
821 * functional clock pointer) if a clock matching the hwmod name is found,
822 * or a main_clk is present. Returns 0 on success or -EINVAL on error.
824 static int _init_main_clk(struct omap_hwmod *oh)
827 struct clk *clk = NULL;
829 clk = _lookup_clkctrl_clk(oh);
831 if (!IS_ERR_OR_NULL(clk)) {
832 pr_debug("%s: mapped main_clk %s for %s\n", __func__,
833 __clk_get_name(clk), oh->name);
834 oh->main_clk = __clk_get_name(clk);
836 soc_ops.disable_direct_prcm(oh);
841 oh->_clk = clk_get(NULL, oh->main_clk);
844 if (IS_ERR(oh->_clk)) {
845 pr_warn("omap_hwmod: %s: cannot clk_get main_clk %s\n",
846 oh->name, oh->main_clk);
850 * HACK: This needs a re-visit once clk_prepare() is implemented
851 * to do something meaningful. Today its just a no-op.
852 * If clk_prepare() is used at some point to do things like
853 * voltage scaling etc, then this would have to be moved to
854 * some point where subsystems like i2c and pmic become
857 clk_prepare(oh->_clk);
860 pr_debug("omap_hwmod: %s: missing clockdomain for %s.\n",
861 oh->name, oh->main_clk);
867 * _init_interface_clks - get a struct clk * for the hwmod's interface clks
868 * @oh: struct omap_hwmod *
870 * Called from _init_clocks(). Populates the @oh OCP slave interface
871 * clock pointers. Returns 0 on success or -EINVAL on error.
873 static int _init_interface_clks(struct omap_hwmod *oh)
875 struct omap_hwmod_ocp_if *os;
879 list_for_each_entry(os, &oh->slave_ports, node) {
883 c = clk_get(NULL, os->clk);
885 pr_warn("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
892 * HACK: This needs a re-visit once clk_prepare() is implemented
893 * to do something meaningful. Today its just a no-op.
894 * If clk_prepare() is used at some point to do things like
895 * voltage scaling etc, then this would have to be moved to
896 * some point where subsystems like i2c and pmic become
899 clk_prepare(os->_clk);
906 * _init_opt_clk - get a struct clk * for the hwmod's optional clocks
907 * @oh: struct omap_hwmod *
909 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
910 * clock pointers. Returns 0 on success or -EINVAL on error.
912 static int _init_opt_clks(struct omap_hwmod *oh)
914 struct omap_hwmod_opt_clk *oc;
919 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
920 c = clk_get(NULL, oc->clk);
922 pr_warn("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
929 * HACK: This needs a re-visit once clk_prepare() is implemented
930 * to do something meaningful. Today its just a no-op.
931 * If clk_prepare() is used at some point to do things like
932 * voltage scaling etc, then this would have to be moved to
933 * some point where subsystems like i2c and pmic become
936 clk_prepare(oc->_clk);
942 static void _enable_optional_clocks(struct omap_hwmod *oh)
944 struct omap_hwmod_opt_clk *oc;
947 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
949 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
951 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
952 __clk_get_name(oc->_clk));
953 clk_enable(oc->_clk);
957 static void _disable_optional_clocks(struct omap_hwmod *oh)
959 struct omap_hwmod_opt_clk *oc;
962 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
964 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
966 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
967 __clk_get_name(oc->_clk));
968 clk_disable(oc->_clk);
973 * _enable_clocks - enable hwmod main clock and interface clocks
974 * @oh: struct omap_hwmod *
976 * Enables all clocks necessary for register reads and writes to succeed
977 * on the hwmod @oh. Returns 0.
979 static int _enable_clocks(struct omap_hwmod *oh)
981 struct omap_hwmod_ocp_if *os;
983 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
985 if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
986 _enable_optional_clocks(oh);
989 clk_enable(oh->_clk);
991 list_for_each_entry(os, &oh->slave_ports, node) {
992 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE)) {
993 omap2_clk_deny_idle(os->_clk);
994 clk_enable(os->_clk);
998 /* The opt clocks are controlled by the device driver. */
1004 * _omap4_clkctrl_managed_by_clkfwk - true if clkctrl managed by clock framework
1005 * @oh: struct omap_hwmod *
1007 static bool _omap4_clkctrl_managed_by_clkfwk(struct omap_hwmod *oh)
1009 if (oh->prcm.omap4.flags & HWMOD_OMAP4_CLKFWK_CLKCTR_CLOCK)
1016 * _omap4_has_clkctrl_clock - returns true if a module has clkctrl clock
1017 * @oh: struct omap_hwmod *
1019 static bool _omap4_has_clkctrl_clock(struct omap_hwmod *oh)
1021 if (oh->prcm.omap4.clkctrl_offs)
1024 if (!oh->prcm.omap4.clkctrl_offs &&
1025 oh->prcm.omap4.flags & HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET)
1032 * _disable_clocks - disable hwmod main clock and interface clocks
1033 * @oh: struct omap_hwmod *
1035 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
1037 static int _disable_clocks(struct omap_hwmod *oh)
1039 struct omap_hwmod_ocp_if *os;
1041 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
1044 clk_disable(oh->_clk);
1046 list_for_each_entry(os, &oh->slave_ports, node) {
1047 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE)) {
1048 clk_disable(os->_clk);
1049 omap2_clk_allow_idle(os->_clk);
1053 if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
1054 _disable_optional_clocks(oh);
1056 /* The opt clocks are controlled by the device driver. */
1062 * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
1063 * @oh: struct omap_hwmod *
1065 * Enables the PRCM module mode related to the hwmod @oh.
1068 static void _omap4_enable_module(struct omap_hwmod *oh)
1070 if (!oh->clkdm || !oh->prcm.omap4.modulemode ||
1071 _omap4_clkctrl_managed_by_clkfwk(oh))
1074 pr_debug("omap_hwmod: %s: %s: %d\n",
1075 oh->name, __func__, oh->prcm.omap4.modulemode);
1077 omap_cm_module_enable(oh->prcm.omap4.modulemode,
1078 oh->clkdm->prcm_partition,
1079 oh->clkdm->cm_inst, oh->prcm.omap4.clkctrl_offs);
1083 * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
1084 * @oh: struct omap_hwmod *
1086 * Wait for a module @oh to enter slave idle. Returns 0 if the module
1087 * does not have an IDLEST bit or if the module successfully enters
1088 * slave idle; otherwise, pass along the return value of the
1089 * appropriate *_cm*_wait_module_idle() function.
1091 static int _omap4_wait_target_disable(struct omap_hwmod *oh)
1096 if (oh->_int_flags & _HWMOD_NO_MPU_PORT || !oh->clkdm)
1099 if (oh->flags & HWMOD_NO_IDLEST)
1102 if (_omap4_clkctrl_managed_by_clkfwk(oh))
1105 if (!_omap4_has_clkctrl_clock(oh))
1108 return omap_cm_wait_module_idle(oh->clkdm->prcm_partition,
1110 oh->prcm.omap4.clkctrl_offs, 0);
1114 * _save_mpu_port_index - find and save the index to @oh's MPU port
1115 * @oh: struct omap_hwmod *
1117 * Determines the array index of the OCP slave port that the MPU uses
1118 * to address the device, and saves it into the struct omap_hwmod.
1119 * Intended to be called during hwmod registration only. No return
1122 static void __init _save_mpu_port_index(struct omap_hwmod *oh)
1124 struct omap_hwmod_ocp_if *os = NULL;
1129 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
1131 list_for_each_entry(os, &oh->slave_ports, node) {
1132 if (os->user & OCP_USER_MPU) {
1134 oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
1143 * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
1144 * @oh: struct omap_hwmod *
1146 * Given a pointer to a struct omap_hwmod record @oh, return a pointer
1147 * to the struct omap_hwmod_ocp_if record that is used by the MPU to
1148 * communicate with the IP block. This interface need not be directly
1149 * connected to the MPU (and almost certainly is not), but is directly
1150 * connected to the IP block represented by @oh. Returns a pointer
1151 * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
1152 * error or if there does not appear to be a path from the MPU to this
1155 static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
1157 if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
1160 return oh->_mpu_port;
1164 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
1165 * @oh: struct omap_hwmod *
1167 * Ensure that the OCP_SYSCONFIG register for the IP block represented
1168 * by @oh is set to indicate to the PRCM that the IP block is active.
1169 * Usually this means placing the module into smart-idle mode and
1170 * smart-standby, but if there is a bug in the automatic idle handling
1171 * for the IP block, it may need to be placed into the force-idle or
1172 * no-idle variants of these modes. No return value.
1174 static void _enable_sysc(struct omap_hwmod *oh)
1179 struct clockdomain *clkdm;
1181 if (!oh->class->sysc)
1185 * Wait until reset has completed, this is needed as the IP
1186 * block is reset automatically by hardware in some cases
1187 * (off-mode for example), and the drivers require the
1188 * IP to be ready when they access it
1190 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1191 _enable_optional_clocks(oh);
1192 _wait_softreset_complete(oh);
1193 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1194 _disable_optional_clocks(oh);
1196 v = oh->_sysc_cache;
1197 sf = oh->class->sysc->sysc_flags;
1199 clkdm = _get_clkdm(oh);
1200 if (sf & SYSC_HAS_SIDLEMODE) {
1201 if (oh->flags & HWMOD_SWSUP_SIDLE ||
1202 oh->flags & HWMOD_SWSUP_SIDLE_ACT) {
1203 idlemode = HWMOD_IDLEMODE_NO;
1205 if (sf & SYSC_HAS_ENAWAKEUP)
1206 _enable_wakeup(oh, &v);
1207 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
1208 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1210 idlemode = HWMOD_IDLEMODE_SMART;
1214 * This is special handling for some IPs like
1215 * 32k sync timer. Force them to idle!
1217 clkdm_act = (clkdm && clkdm->flags & CLKDM_ACTIVE_WITH_MPU);
1218 if (clkdm_act && !(oh->class->sysc->idlemodes &
1219 (SIDLE_SMART | SIDLE_SMART_WKUP)))
1220 idlemode = HWMOD_IDLEMODE_FORCE;
1222 _set_slave_idlemode(oh, idlemode, &v);
1225 if (sf & SYSC_HAS_MIDLEMODE) {
1226 if (oh->flags & HWMOD_FORCE_MSTANDBY) {
1227 idlemode = HWMOD_IDLEMODE_FORCE;
1228 } else if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1229 idlemode = HWMOD_IDLEMODE_NO;
1231 if (sf & SYSC_HAS_ENAWAKEUP)
1232 _enable_wakeup(oh, &v);
1233 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1234 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1236 idlemode = HWMOD_IDLEMODE_SMART;
1238 _set_master_standbymode(oh, idlemode, &v);
1242 * XXX The clock framework should handle this, by
1243 * calling into this code. But this must wait until the
1244 * clock structures are tagged with omap_hwmod entries
1246 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
1247 (sf & SYSC_HAS_CLOCKACTIVITY))
1248 _set_clockactivity(oh, CLOCKACT_TEST_ICLK, &v);
1250 _write_sysconfig(v, oh);
1253 * Set the autoidle bit only after setting the smartidle bit
1254 * Setting this will not have any impact on the other modules.
1256 if (sf & SYSC_HAS_AUTOIDLE) {
1257 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
1259 _set_module_autoidle(oh, idlemode, &v);
1260 _write_sysconfig(v, oh);
1265 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
1266 * @oh: struct omap_hwmod *
1268 * If module is marked as SWSUP_SIDLE, force the module into slave
1269 * idle; otherwise, configure it for smart-idle. If module is marked
1270 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
1271 * configure it for smart-standby. No return value.
1273 static void _idle_sysc(struct omap_hwmod *oh)
1278 if (!oh->class->sysc)
1281 v = oh->_sysc_cache;
1282 sf = oh->class->sysc->sysc_flags;
1284 if (sf & SYSC_HAS_SIDLEMODE) {
1285 if (oh->flags & HWMOD_SWSUP_SIDLE) {
1286 idlemode = HWMOD_IDLEMODE_FORCE;
1288 if (sf & SYSC_HAS_ENAWAKEUP)
1289 _enable_wakeup(oh, &v);
1290 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
1291 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1293 idlemode = HWMOD_IDLEMODE_SMART;
1295 _set_slave_idlemode(oh, idlemode, &v);
1298 if (sf & SYSC_HAS_MIDLEMODE) {
1299 if ((oh->flags & HWMOD_SWSUP_MSTANDBY) ||
1300 (oh->flags & HWMOD_FORCE_MSTANDBY)) {
1301 idlemode = HWMOD_IDLEMODE_FORCE;
1303 if (sf & SYSC_HAS_ENAWAKEUP)
1304 _enable_wakeup(oh, &v);
1305 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1306 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1308 idlemode = HWMOD_IDLEMODE_SMART;
1310 _set_master_standbymode(oh, idlemode, &v);
1313 /* If the cached value is the same as the new value, skip the write */
1314 if (oh->_sysc_cache != v)
1315 _write_sysconfig(v, oh);
1319 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
1320 * @oh: struct omap_hwmod *
1322 * Force the module into slave idle and master suspend. No return
1325 static void _shutdown_sysc(struct omap_hwmod *oh)
1330 if (!oh->class->sysc)
1333 v = oh->_sysc_cache;
1334 sf = oh->class->sysc->sysc_flags;
1336 if (sf & SYSC_HAS_SIDLEMODE)
1337 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
1339 if (sf & SYSC_HAS_MIDLEMODE)
1340 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
1342 if (sf & SYSC_HAS_AUTOIDLE)
1343 _set_module_autoidle(oh, 1, &v);
1345 _write_sysconfig(v, oh);
1349 * _lookup - find an omap_hwmod by name
1350 * @name: find an omap_hwmod by name
1352 * Return a pointer to an omap_hwmod by name, or NULL if not found.
1354 static struct omap_hwmod *_lookup(const char *name)
1356 struct omap_hwmod *oh, *temp_oh;
1360 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1361 if (!strcmp(name, temp_oh->name)) {
1371 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
1372 * @oh: struct omap_hwmod *
1374 * Convert a clockdomain name stored in a struct omap_hwmod into a
1375 * clockdomain pointer, and save it into the struct omap_hwmod.
1376 * Return -EINVAL if the clkdm_name lookup failed.
1378 static int _init_clkdm(struct omap_hwmod *oh)
1380 if (!oh->clkdm_name) {
1381 pr_debug("omap_hwmod: %s: missing clockdomain\n", oh->name);
1385 oh->clkdm = clkdm_lookup(oh->clkdm_name);
1387 pr_warn("omap_hwmod: %s: could not associate to clkdm %s\n",
1388 oh->name, oh->clkdm_name);
1392 pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
1393 oh->name, oh->clkdm_name);
1399 * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
1400 * well the clockdomain.
1401 * @oh: struct omap_hwmod *
1402 * @np: device_node mapped to this hwmod
1404 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
1405 * Resolves all clock names embedded in the hwmod. Returns 0 on
1406 * success, or a negative error code on failure.
1408 static int _init_clocks(struct omap_hwmod *oh, struct device_node *np)
1412 if (oh->_state != _HWMOD_STATE_REGISTERED)
1415 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
1417 if (soc_ops.init_clkdm)
1418 ret |= soc_ops.init_clkdm(oh);
1420 ret |= _init_main_clk(oh);
1421 ret |= _init_interface_clks(oh);
1422 ret |= _init_opt_clks(oh);
1425 oh->_state = _HWMOD_STATE_CLKS_INITED;
1427 pr_warn("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
1433 * _lookup_hardreset - fill register bit info for this hwmod/reset line
1434 * @oh: struct omap_hwmod *
1435 * @name: name of the reset line in the context of this hwmod
1436 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
1438 * Return the bit position of the reset line that match the
1439 * input name. Return -ENOENT if not found.
1441 static int _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1442 struct omap_hwmod_rst_info *ohri)
1446 for (i = 0; i < oh->rst_lines_cnt; i++) {
1447 const char *rst_line = oh->rst_lines[i].name;
1448 if (!strcmp(rst_line, name)) {
1449 ohri->rst_shift = oh->rst_lines[i].rst_shift;
1450 ohri->st_shift = oh->rst_lines[i].st_shift;
1451 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1452 oh->name, __func__, rst_line, ohri->rst_shift,
1463 * _assert_hardreset - assert the HW reset line of submodules
1464 * contained in the hwmod module.
1465 * @oh: struct omap_hwmod *
1466 * @name: name of the reset line to lookup and assert
1468 * Some IP like dsp, ipu or iva contain processor that require an HW
1469 * reset line to be assert / deassert in order to enable fully the IP.
1470 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1471 * asserting the hardreset line on the currently-booted SoC, or passes
1472 * along the return value from _lookup_hardreset() or the SoC's
1473 * assert_hardreset code.
1475 static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1477 struct omap_hwmod_rst_info ohri;
1483 if (!soc_ops.assert_hardreset)
1486 ret = _lookup_hardreset(oh, name, &ohri);
1490 ret = soc_ops.assert_hardreset(oh, &ohri);
1496 * _deassert_hardreset - deassert the HW reset line of submodules contained
1497 * in the hwmod module.
1498 * @oh: struct omap_hwmod *
1499 * @name: name of the reset line to look up and deassert
1501 * Some IP like dsp, ipu or iva contain processor that require an HW
1502 * reset line to be assert / deassert in order to enable fully the IP.
1503 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1504 * deasserting the hardreset line on the currently-booted SoC, or passes
1505 * along the return value from _lookup_hardreset() or the SoC's
1506 * deassert_hardreset code.
1508 static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1510 struct omap_hwmod_rst_info ohri;
1516 if (!soc_ops.deassert_hardreset)
1519 ret = _lookup_hardreset(oh, name, &ohri);
1525 * A clockdomain must be in SW_SUP otherwise reset
1526 * might not be completed. The clockdomain can be set
1527 * in HW_AUTO only when the module become ready.
1529 clkdm_deny_idle(oh->clkdm);
1530 ret = clkdm_hwmod_enable(oh->clkdm, oh);
1532 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1533 oh->name, oh->clkdm->name, ret);
1539 if (soc_ops.enable_module)
1540 soc_ops.enable_module(oh);
1542 ret = soc_ops.deassert_hardreset(oh, &ohri);
1544 if (soc_ops.disable_module)
1545 soc_ops.disable_module(oh);
1546 _disable_clocks(oh);
1549 pr_warn("omap_hwmod: %s: failed to hardreset\n", oh->name);
1553 * Set the clockdomain to HW_AUTO, assuming that the
1554 * previous state was HW_AUTO.
1556 clkdm_allow_idle(oh->clkdm);
1558 clkdm_hwmod_disable(oh->clkdm, oh);
1565 * _read_hardreset - read the HW reset line state of submodules
1566 * contained in the hwmod module
1567 * @oh: struct omap_hwmod *
1568 * @name: name of the reset line to look up and read
1570 * Return the state of the reset line. Returns -EINVAL if @oh is
1571 * null, -ENOSYS if we have no way of reading the hardreset line
1572 * status on the currently-booted SoC, or passes along the return
1573 * value from _lookup_hardreset() or the SoC's is_hardreset_asserted
1576 static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1578 struct omap_hwmod_rst_info ohri;
1584 if (!soc_ops.is_hardreset_asserted)
1587 ret = _lookup_hardreset(oh, name, &ohri);
1591 return soc_ops.is_hardreset_asserted(oh, &ohri);
1595 * _are_all_hardreset_lines_asserted - return true if the @oh is hard-reset
1596 * @oh: struct omap_hwmod *
1598 * If all hardreset lines associated with @oh are asserted, then return true.
1599 * Otherwise, if part of @oh is out hardreset or if no hardreset lines
1600 * associated with @oh are asserted, then return false.
1601 * This function is used to avoid executing some parts of the IP block
1602 * enable/disable sequence if its hardreset line is set.
1604 static bool _are_all_hardreset_lines_asserted(struct omap_hwmod *oh)
1608 if (oh->rst_lines_cnt == 0)
1611 for (i = 0; i < oh->rst_lines_cnt; i++)
1612 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1615 if (oh->rst_lines_cnt == rst_cnt)
1622 * _are_any_hardreset_lines_asserted - return true if any part of @oh is
1624 * @oh: struct omap_hwmod *
1626 * If any hardreset lines associated with @oh are asserted, then
1627 * return true. Otherwise, if no hardreset lines associated with @oh
1628 * are asserted, or if @oh has no hardreset lines, then return false.
1629 * This function is used to avoid executing some parts of the IP block
1630 * enable/disable sequence if any hardreset line is set.
1632 static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
1637 for (i = 0; i < oh->rst_lines_cnt && rst_cnt == 0; i++)
1638 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1641 return (rst_cnt) ? true : false;
1645 * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
1646 * @oh: struct omap_hwmod *
1648 * Disable the PRCM module mode related to the hwmod @oh.
1649 * Return EINVAL if the modulemode is not supported and 0 in case of success.
1651 static int _omap4_disable_module(struct omap_hwmod *oh)
1655 if (!oh->clkdm || !oh->prcm.omap4.modulemode ||
1656 _omap4_clkctrl_managed_by_clkfwk(oh))
1660 * Since integration code might still be doing something, only
1661 * disable if all lines are under hardreset.
1663 if (_are_any_hardreset_lines_asserted(oh))
1666 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1668 omap_cm_module_disable(oh->clkdm->prcm_partition, oh->clkdm->cm_inst,
1669 oh->prcm.omap4.clkctrl_offs);
1671 v = _omap4_wait_target_disable(oh);
1673 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1680 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
1681 * @oh: struct omap_hwmod *
1683 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
1684 * enabled for this to work. Returns -ENOENT if the hwmod cannot be
1685 * reset this way, -EINVAL if the hwmod is in the wrong state,
1686 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1688 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
1689 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
1690 * use the SYSCONFIG softreset bit to provide the status.
1692 * Note that some IP like McBSP do have reset control but don't have
1695 static int _ocp_softreset(struct omap_hwmod *oh)
1701 if (!oh->class->sysc ||
1702 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
1705 /* clocks must be on for this operation */
1706 if (oh->_state != _HWMOD_STATE_ENABLED) {
1707 pr_warn("omap_hwmod: %s: reset can only be entered from enabled state\n",
1712 /* For some modules, all optionnal clocks need to be enabled as well */
1713 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1714 _enable_optional_clocks(oh);
1716 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
1718 v = oh->_sysc_cache;
1719 ret = _set_softreset(oh, &v);
1723 _write_sysconfig(v, oh);
1725 if (oh->class->sysc->srst_udelay)
1726 udelay(oh->class->sysc->srst_udelay);
1728 c = _wait_softreset_complete(oh);
1729 if (c == MAX_MODULE_SOFTRESET_WAIT) {
1730 pr_warn("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1731 oh->name, MAX_MODULE_SOFTRESET_WAIT);
1735 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
1738 ret = _clear_softreset(oh, &v);
1742 _write_sysconfig(v, oh);
1745 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1746 * _wait_target_ready() or _reset()
1750 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1751 _disable_optional_clocks(oh);
1757 * _reset - reset an omap_hwmod
1758 * @oh: struct omap_hwmod *
1760 * Resets an omap_hwmod @oh. If the module has a custom reset
1761 * function pointer defined, then call it to reset the IP block, and
1762 * pass along its return value to the caller. Otherwise, if the IP
1763 * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
1764 * associated with it, call a function to reset the IP block via that
1765 * method, and pass along the return value to the caller. Finally, if
1766 * the IP block has some hardreset lines associated with it, assert
1767 * all of those, but do _not_ deassert them. (This is because driver
1768 * authors have expressed an apparent requirement to control the
1769 * deassertion of the hardreset lines themselves.)
1771 * The default software reset mechanism for most OMAP IP blocks is
1772 * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
1773 * hwmods cannot be reset via this method. Some are not targets and
1774 * therefore have no OCP header registers to access. Others (like the
1775 * IVA) have idiosyncratic reset sequences. So for these relatively
1776 * rare cases, custom reset code can be supplied in the struct
1777 * omap_hwmod_class .reset function pointer.
1779 * _set_dmadisable() is called to set the DMADISABLE bit so that it
1780 * does not prevent idling of the system. This is necessary for cases
1781 * where ROMCODE/BOOTLOADER uses dma and transfers control to the
1782 * kernel without disabling dma.
1784 * Passes along the return value from either _ocp_softreset() or the
1785 * custom reset function - these must return -EINVAL if the hwmod
1786 * cannot be reset this way or if the hwmod is in the wrong state,
1787 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1789 static int _reset(struct omap_hwmod *oh)
1793 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1795 if (oh->class->reset) {
1796 r = oh->class->reset(oh);
1798 if (oh->rst_lines_cnt > 0) {
1799 for (i = 0; i < oh->rst_lines_cnt; i++)
1800 _assert_hardreset(oh, oh->rst_lines[i].name);
1803 r = _ocp_softreset(oh);
1809 _set_dmadisable(oh);
1812 * OCP_SYSCONFIG bits need to be reprogrammed after a
1813 * softreset. The _enable() function should be split to avoid
1814 * the rewrite of the OCP_SYSCONFIG register.
1816 if (oh->class->sysc) {
1817 _update_sysc_cache(oh);
1825 * _omap4_update_context_lost - increment hwmod context loss counter if
1826 * hwmod context was lost, and clear hardware context loss reg
1827 * @oh: hwmod to check for context loss
1829 * If the PRCM indicates that the hwmod @oh lost context, increment
1830 * our in-memory context loss counter, and clear the RM_*_CONTEXT
1831 * bits. No return value.
1833 static void _omap4_update_context_lost(struct omap_hwmod *oh)
1835 if (oh->prcm.omap4.flags & HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT)
1838 if (!prm_was_any_context_lost_old(oh->clkdm->pwrdm.ptr->prcm_partition,
1839 oh->clkdm->pwrdm.ptr->prcm_offs,
1840 oh->prcm.omap4.context_offs))
1843 oh->prcm.omap4.context_lost_counter++;
1844 prm_clear_context_loss_flags_old(oh->clkdm->pwrdm.ptr->prcm_partition,
1845 oh->clkdm->pwrdm.ptr->prcm_offs,
1846 oh->prcm.omap4.context_offs);
1850 * _omap4_get_context_lost - get context loss counter for a hwmod
1851 * @oh: hwmod to get context loss counter for
1853 * Returns the in-memory context loss counter for a hwmod.
1855 static int _omap4_get_context_lost(struct omap_hwmod *oh)
1857 return oh->prcm.omap4.context_lost_counter;
1861 * _enable - enable an omap_hwmod
1862 * @oh: struct omap_hwmod *
1864 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
1865 * register target. Returns -EINVAL if the hwmod is in the wrong
1866 * state or passes along the return value of _wait_target_ready().
1868 static int _enable(struct omap_hwmod *oh)
1872 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
1875 * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
1878 if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
1879 oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
1883 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1884 oh->_state != _HWMOD_STATE_IDLE &&
1885 oh->_state != _HWMOD_STATE_DISABLED) {
1886 WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
1892 * If an IP block contains HW reset lines and all of them are
1893 * asserted, we let integration code associated with that
1894 * block handle the enable. We've received very little
1895 * information on what those driver authors need, and until
1896 * detailed information is provided and the driver code is
1897 * posted to the public lists, this is probably the best we
1900 if (_are_all_hardreset_lines_asserted(oh))
1903 _add_initiator_dep(oh, mpu_oh);
1907 * A clockdomain must be in SW_SUP before enabling
1908 * completely the module. The clockdomain can be set
1909 * in HW_AUTO only when the module become ready.
1911 clkdm_deny_idle(oh->clkdm);
1912 r = clkdm_hwmod_enable(oh->clkdm, oh);
1914 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1915 oh->name, oh->clkdm->name, r);
1921 if (soc_ops.enable_module)
1922 soc_ops.enable_module(oh);
1923 if (oh->flags & HWMOD_BLOCK_WFI)
1924 cpu_idle_poll_ctrl(true);
1926 if (soc_ops.update_context_lost)
1927 soc_ops.update_context_lost(oh);
1929 r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) :
1931 if (oh->clkdm && !(oh->flags & HWMOD_CLKDM_NOAUTO))
1932 clkdm_allow_idle(oh->clkdm);
1935 oh->_state = _HWMOD_STATE_ENABLED;
1937 /* Access the sysconfig only if the target is ready */
1938 if (oh->class->sysc) {
1939 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
1940 _update_sysc_cache(oh);
1944 if (soc_ops.disable_module)
1945 soc_ops.disable_module(oh);
1946 _disable_clocks(oh);
1947 pr_err("omap_hwmod: %s: _wait_target_ready failed: %d\n",
1951 clkdm_hwmod_disable(oh->clkdm, oh);
1958 * _idle - idle an omap_hwmod
1959 * @oh: struct omap_hwmod *
1961 * Idles an omap_hwmod @oh. This should be called once the hwmod has
1962 * no further work. Returns -EINVAL if the hwmod is in the wrong
1963 * state or returns 0.
1965 static int _idle(struct omap_hwmod *oh)
1967 if (oh->flags & HWMOD_NO_IDLE) {
1968 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
1972 pr_debug("omap_hwmod: %s: idling\n", oh->name);
1974 if (_are_all_hardreset_lines_asserted(oh))
1977 if (oh->_state != _HWMOD_STATE_ENABLED) {
1978 WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
1983 if (oh->class->sysc)
1985 _del_initiator_dep(oh, mpu_oh);
1988 * If HWMOD_CLKDM_NOAUTO is set then we don't
1989 * deny idle the clkdm again since idle was already denied
1992 if (oh->clkdm && !(oh->flags & HWMOD_CLKDM_NOAUTO))
1993 clkdm_deny_idle(oh->clkdm);
1995 if (oh->flags & HWMOD_BLOCK_WFI)
1996 cpu_idle_poll_ctrl(false);
1997 if (soc_ops.disable_module)
1998 soc_ops.disable_module(oh);
2001 * The module must be in idle mode before disabling any parents
2002 * clocks. Otherwise, the parent clock might be disabled before
2003 * the module transition is done, and thus will prevent the
2004 * transition to complete properly.
2006 _disable_clocks(oh);
2008 clkdm_allow_idle(oh->clkdm);
2009 clkdm_hwmod_disable(oh->clkdm, oh);
2012 oh->_state = _HWMOD_STATE_IDLE;
2018 * _shutdown - shutdown an omap_hwmod
2019 * @oh: struct omap_hwmod *
2021 * Shut down an omap_hwmod @oh. This should be called when the driver
2022 * used for the hwmod is removed or unloaded or if the driver is not
2023 * used by the system. Returns -EINVAL if the hwmod is in the wrong
2024 * state or returns 0.
2026 static int _shutdown(struct omap_hwmod *oh)
2031 if (_are_all_hardreset_lines_asserted(oh))
2034 if (oh->_state != _HWMOD_STATE_IDLE &&
2035 oh->_state != _HWMOD_STATE_ENABLED) {
2036 WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
2041 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
2043 if (oh->class->pre_shutdown) {
2044 prev_state = oh->_state;
2045 if (oh->_state == _HWMOD_STATE_IDLE)
2047 ret = oh->class->pre_shutdown(oh);
2049 if (prev_state == _HWMOD_STATE_IDLE)
2055 if (oh->class->sysc) {
2056 if (oh->_state == _HWMOD_STATE_IDLE)
2061 /* clocks and deps are already disabled in idle */
2062 if (oh->_state == _HWMOD_STATE_ENABLED) {
2063 _del_initiator_dep(oh, mpu_oh);
2064 /* XXX what about the other system initiators here? dma, dsp */
2065 if (oh->flags & HWMOD_BLOCK_WFI)
2066 cpu_idle_poll_ctrl(false);
2067 if (soc_ops.disable_module)
2068 soc_ops.disable_module(oh);
2069 _disable_clocks(oh);
2071 clkdm_hwmod_disable(oh->clkdm, oh);
2073 /* XXX Should this code also force-disable the optional clocks? */
2075 for (i = 0; i < oh->rst_lines_cnt; i++)
2076 _assert_hardreset(oh, oh->rst_lines[i].name);
2078 oh->_state = _HWMOD_STATE_DISABLED;
2083 static int of_dev_find_hwmod(struct device_node *np,
2084 struct omap_hwmod *oh)
2089 count = of_property_count_strings(np, "ti,hwmods");
2093 for (i = 0; i < count; i++) {
2094 res = of_property_read_string_index(np, "ti,hwmods",
2098 if (!strcmp(p, oh->name)) {
2099 pr_debug("omap_hwmod: dt %pOFn[%i] uses hwmod %s\n",
2109 * of_dev_hwmod_lookup - look up needed hwmod from dt blob
2110 * @np: struct device_node *
2111 * @oh: struct omap_hwmod *
2112 * @index: index of the entry found
2113 * @found: struct device_node * found or NULL
2115 * Parse the dt blob and find out needed hwmod. Recursive function is
2116 * implemented to take care hierarchical dt blob parsing.
2117 * Return: Returns 0 on success, -ENODEV when not found.
2119 static int of_dev_hwmod_lookup(struct device_node *np,
2120 struct omap_hwmod *oh,
2122 struct device_node **found)
2124 struct device_node *np0 = NULL;
2127 res = of_dev_find_hwmod(np, oh);
2134 for_each_child_of_node(np, np0) {
2135 struct device_node *fc;
2138 res = of_dev_hwmod_lookup(np0, oh, &i, &fc);
2154 * omap_hwmod_fix_mpu_rt_idx - fix up mpu_rt_idx register offsets
2156 * @oh: struct omap_hwmod *
2157 * @np: struct device_node *
2159 * Fix up module register offsets for modules with mpu_rt_idx.
2160 * Only needed for cpsw with interconnect target module defined
2161 * in device tree while still using legacy hwmod platform data
2162 * for rev, sysc and syss registers.
2164 * Can be removed when all cpsw hwmod platform data has been
2167 static void omap_hwmod_fix_mpu_rt_idx(struct omap_hwmod *oh,
2168 struct device_node *np,
2169 struct resource *res)
2171 struct device_node *child = NULL;
2174 child = of_get_next_child(np, child);
2178 error = of_address_to_resource(child, oh->mpu_rt_idx, res);
2180 pr_err("%s: error mapping mpu_rt_idx: %i\n",
2185 * omap_hwmod_parse_module_range - map module IO range from device tree
2186 * @oh: struct omap_hwmod *
2187 * @np: struct device_node *
2189 * Parse the device tree range an interconnect target module provides
2190 * for it's child device IP blocks. This way we can support the old
2191 * "ti,hwmods" property with just dts data without a need for platform
2192 * data for IO resources. And we don't need all the child IP device
2193 * nodes available in the dts.
2195 int omap_hwmod_parse_module_range(struct omap_hwmod *oh,
2196 struct device_node *np,
2197 struct resource *res)
2199 struct property *prop;
2200 const __be32 *ranges;
2202 u32 nr_addr, nr_size;
2209 ranges = of_get_property(np, "ranges", &len);
2213 len /= sizeof(*ranges);
2218 of_property_for_each_string(np, "compatible", prop, name)
2219 if (!strncmp("ti,sysc-", name, 8))
2225 error = of_property_read_u32(np, "#address-cells", &nr_addr);
2229 error = of_property_read_u32(np, "#size-cells", &nr_size);
2233 if (nr_addr != 1 || nr_size != 1) {
2234 pr_err("%s: invalid range for %s->%pOFn\n", __func__,
2240 base = of_translate_address(np, ranges++);
2241 size = be32_to_cpup(ranges);
2243 pr_debug("omap_hwmod: %s %pOFn at 0x%llx size 0x%llx\n",
2244 oh->name, np, base, size);
2246 if (oh && oh->mpu_rt_idx) {
2247 omap_hwmod_fix_mpu_rt_idx(oh, np, res);
2253 res->end = base + size - 1;
2254 res->flags = IORESOURCE_MEM;
2260 * _init_mpu_rt_base - populate the virtual address for a hwmod
2261 * @oh: struct omap_hwmod * to locate the virtual address
2262 * @data: (unused, caller should pass NULL)
2263 * @index: index of the reg entry iospace in device tree
2264 * @np: struct device_node * of the IP block's device node in the DT data
2266 * Cache the virtual address used by the MPU to access this IP block's
2267 * registers. This address is needed early so the OCP registers that
2268 * are part of the device's address space can be ioremapped properly.
2270 * If SYSC access is not needed, the registers will not be remapped
2271 * and non-availability of MPU access is not treated as an error.
2273 * Returns 0 on success, -EINVAL if an invalid hwmod is passed, and
2274 * -ENXIO on absent or invalid register target address space.
2276 static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data,
2277 int index, struct device_node *np)
2279 void __iomem *va_start = NULL;
2280 struct resource res;
2286 _save_mpu_port_index(oh);
2288 /* if we don't need sysc access we don't need to ioremap */
2289 if (!oh->class->sysc)
2292 /* we can't continue without MPU PORT if we need sysc access */
2293 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2297 pr_err("omap_hwmod: %s: no dt node\n", oh->name);
2301 /* Do we have a dts range for the interconnect target module? */
2302 error = omap_hwmod_parse_module_range(oh, np, &res);
2304 va_start = ioremap(res.start, resource_size(&res));
2306 /* No ranges, rely on device reg entry */
2308 va_start = of_iomap(np, index + oh->mpu_rt_idx);
2310 pr_err("omap_hwmod: %s: Missing dt reg%i for %pOF\n",
2311 oh->name, index, np);
2315 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
2316 oh->name, va_start);
2318 oh->_mpu_rt_va = va_start;
2322 static void __init parse_module_flags(struct omap_hwmod *oh,
2323 struct device_node *np)
2325 if (of_find_property(np, "ti,no-reset-on-init", NULL))
2326 oh->flags |= HWMOD_INIT_NO_RESET;
2327 if (of_find_property(np, "ti,no-idle-on-init", NULL))
2328 oh->flags |= HWMOD_INIT_NO_IDLE;
2329 if (of_find_property(np, "ti,no-idle", NULL))
2330 oh->flags |= HWMOD_NO_IDLE;
2334 * _init - initialize internal data for the hwmod @oh
2335 * @oh: struct omap_hwmod *
2338 * Look up the clocks and the address space used by the MPU to access
2339 * registers belonging to the hwmod @oh. @oh must already be
2340 * registered at this point. This is the first of two phases for
2341 * hwmod initialization. Code called here does not touch any hardware
2342 * registers, it simply prepares internal data structures. Returns 0
2343 * upon success or if the hwmod isn't registered or if the hwmod's
2344 * address space is not defined, or -EINVAL upon failure.
2346 static int __init _init(struct omap_hwmod *oh, void *data)
2349 struct device_node *np = NULL;
2350 struct device_node *bus;
2352 if (oh->_state != _HWMOD_STATE_REGISTERED)
2355 bus = of_find_node_by_name(NULL, "ocp");
2359 r = of_dev_hwmod_lookup(bus, oh, &index, &np);
2361 pr_debug("omap_hwmod: %s missing dt data\n", oh->name);
2362 else if (np && index)
2363 pr_warn("omap_hwmod: %s using broken dt data from %pOFn\n",
2366 r = _init_mpu_rt_base(oh, NULL, index, np);
2368 WARN(1, "omap_hwmod: %s: doesn't have mpu register target base\n",
2373 r = _init_clocks(oh, np);
2375 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
2380 struct device_node *child;
2382 parse_module_flags(oh, np);
2383 child = of_get_next_child(np, NULL);
2385 parse_module_flags(oh, child);
2388 oh->_state = _HWMOD_STATE_INITIALIZED;
2394 * _setup_iclk_autoidle - configure an IP block's interface clocks
2395 * @oh: struct omap_hwmod *
2397 * Set up the module's interface clocks. XXX This function is still mostly
2398 * a stub; implementing this properly requires iclk autoidle usecounting in
2399 * the clock code. No return value.
2401 static void _setup_iclk_autoidle(struct omap_hwmod *oh)
2403 struct omap_hwmod_ocp_if *os;
2405 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2408 list_for_each_entry(os, &oh->slave_ports, node) {
2412 if (os->flags & OCPIF_SWSUP_IDLE) {
2414 * we might have multiple users of one iclk with
2415 * different requirements, disable autoidle when
2416 * the module is enabled, e.g. dss iclk
2419 /* we are enabling autoidle afterwards anyways */
2420 clk_enable(os->_clk);
2428 * _setup_reset - reset an IP block during the setup process
2429 * @oh: struct omap_hwmod *
2431 * Reset the IP block corresponding to the hwmod @oh during the setup
2432 * process. The IP block is first enabled so it can be successfully
2433 * reset. Returns 0 upon success or a negative error code upon
2436 static int _setup_reset(struct omap_hwmod *oh)
2440 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2443 if (oh->flags & HWMOD_EXT_OPT_MAIN_CLK)
2446 if (oh->rst_lines_cnt == 0) {
2449 pr_warn("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
2450 oh->name, oh->_state);
2455 if (!(oh->flags & HWMOD_INIT_NO_RESET))
2462 * _setup_postsetup - transition to the appropriate state after _setup
2463 * @oh: struct omap_hwmod *
2465 * Place an IP block represented by @oh into a "post-setup" state --
2466 * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
2467 * this function is called at the end of _setup().) The postsetup
2468 * state for an IP block can be changed by calling
2469 * omap_hwmod_enter_postsetup_state() early in the boot process,
2470 * before one of the omap_hwmod_setup*() functions are called for the
2473 * The IP block stays in this state until a PM runtime-based driver is
2474 * loaded for that IP block. A post-setup state of IDLE is
2475 * appropriate for almost all IP blocks with runtime PM-enabled
2476 * drivers, since those drivers are able to enable the IP block. A
2477 * post-setup state of ENABLED is appropriate for kernels with PM
2478 * runtime disabled. The DISABLED state is appropriate for unusual IP
2479 * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
2480 * included, since the WDTIMER starts running on reset and will reset
2481 * the MPU if left active.
2483 * This post-setup mechanism is deprecated. Once all of the OMAP
2484 * drivers have been converted to use PM runtime, and all of the IP
2485 * block data and interconnect data is available to the hwmod code, it
2486 * should be possible to replace this mechanism with a "lazy reset"
2487 * arrangement. In a "lazy reset" setup, each IP block is enabled
2488 * when the driver first probes, then all remaining IP blocks without
2489 * drivers are either shut down or enabled after the drivers have
2490 * loaded. However, this cannot take place until the above
2491 * preconditions have been met, since otherwise the late reset code
2492 * has no way of knowing which IP blocks are in use by drivers, and
2493 * which ones are unused.
2497 static void _setup_postsetup(struct omap_hwmod *oh)
2501 if (oh->rst_lines_cnt > 0)
2504 postsetup_state = oh->_postsetup_state;
2505 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
2506 postsetup_state = _HWMOD_STATE_ENABLED;
2509 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
2510 * it should be set by the core code as a runtime flag during startup
2512 if ((oh->flags & (HWMOD_INIT_NO_IDLE | HWMOD_NO_IDLE)) &&
2513 (postsetup_state == _HWMOD_STATE_IDLE)) {
2514 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
2515 postsetup_state = _HWMOD_STATE_ENABLED;
2518 if (postsetup_state == _HWMOD_STATE_IDLE)
2520 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2522 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2523 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2524 oh->name, postsetup_state);
2530 * _setup - prepare IP block hardware for use
2531 * @oh: struct omap_hwmod *
2532 * @n: (unused, pass NULL)
2534 * Configure the IP block represented by @oh. This may include
2535 * enabling the IP block, resetting it, and placing it into a
2536 * post-setup state, depending on the type of IP block and applicable
2537 * flags. IP blocks are reset to prevent any previous configuration
2538 * by the bootloader or previous operating system from interfering
2539 * with power management or other parts of the system. The reset can
2540 * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
2541 * two phases for hwmod initialization. Code called here generally
2542 * affects the IP block hardware, or system integration hardware
2543 * associated with the IP block. Returns 0.
2545 static int _setup(struct omap_hwmod *oh, void *data)
2547 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2550 if (oh->parent_hwmod) {
2553 r = _enable(oh->parent_hwmod);
2554 WARN(r, "hwmod: %s: setup: failed to enable parent hwmod %s\n",
2555 oh->name, oh->parent_hwmod->name);
2558 _setup_iclk_autoidle(oh);
2560 if (!_setup_reset(oh))
2561 _setup_postsetup(oh);
2563 if (oh->parent_hwmod) {
2566 postsetup_state = oh->parent_hwmod->_postsetup_state;
2568 if (postsetup_state == _HWMOD_STATE_IDLE)
2569 _idle(oh->parent_hwmod);
2570 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2571 _shutdown(oh->parent_hwmod);
2572 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2573 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2574 oh->parent_hwmod->name, postsetup_state);
2581 * _register - register a struct omap_hwmod
2582 * @oh: struct omap_hwmod *
2584 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
2585 * already has been registered by the same name; -EINVAL if the
2586 * omap_hwmod is in the wrong state, if @oh is NULL, if the
2587 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
2588 * name, or if the omap_hwmod's class is missing a name; or 0 upon
2591 * XXX The data should be copied into bootmem, so the original data
2592 * should be marked __initdata and freed after init. This would allow
2593 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
2594 * that the copy process would be relatively complex due to the large number
2597 static int _register(struct omap_hwmod *oh)
2599 if (!oh || !oh->name || !oh->class || !oh->class->name ||
2600 (oh->_state != _HWMOD_STATE_UNKNOWN))
2603 pr_debug("omap_hwmod: %s: registering\n", oh->name);
2605 if (_lookup(oh->name))
2608 list_add_tail(&oh->node, &omap_hwmod_list);
2610 INIT_LIST_HEAD(&oh->slave_ports);
2611 spin_lock_init(&oh->_lock);
2612 lockdep_set_class(&oh->_lock, &oh->hwmod_key);
2614 oh->_state = _HWMOD_STATE_REGISTERED;
2617 * XXX Rather than doing a strcmp(), this should test a flag
2618 * set in the hwmod data, inserted by the autogenerator code.
2620 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
2627 * _add_link - add an interconnect between two IP blocks
2628 * @oi: pointer to a struct omap_hwmod_ocp_if record
2630 * Add struct omap_hwmod_link records connecting the slave IP block
2631 * specified in @oi->slave to @oi. This code is assumed to run before
2632 * preemption or SMP has been enabled, thus avoiding the need for
2633 * locking in this code. Changes to this assumption will require
2634 * additional locking. Returns 0.
2636 static int _add_link(struct omap_hwmod_ocp_if *oi)
2638 pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name,
2641 list_add(&oi->node, &oi->slave->slave_ports);
2642 oi->slave->slaves_cnt++;
2648 * _register_link - register a struct omap_hwmod_ocp_if
2649 * @oi: struct omap_hwmod_ocp_if *
2651 * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it
2652 * has already been registered; -EINVAL if @oi is NULL or if the
2653 * record pointed to by @oi is missing required fields; or 0 upon
2656 * XXX The data should be copied into bootmem, so the original data
2657 * should be marked __initdata and freed after init. This would allow
2658 * unneeded omap_hwmods to be freed on multi-OMAP configurations.
2660 static int __init _register_link(struct omap_hwmod_ocp_if *oi)
2662 if (!oi || !oi->master || !oi->slave || !oi->user)
2665 if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED)
2668 pr_debug("omap_hwmod: registering link from %s to %s\n",
2669 oi->master->name, oi->slave->name);
2672 * Register the connected hwmods, if they haven't been
2673 * registered already
2675 if (oi->master->_state != _HWMOD_STATE_REGISTERED)
2676 _register(oi->master);
2678 if (oi->slave->_state != _HWMOD_STATE_REGISTERED)
2679 _register(oi->slave);
2683 oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED;
2688 /* Static functions intended only for use in soc_ops field function pointers */
2691 * _omap2xxx_3xxx_wait_target_ready - wait for a module to leave slave idle
2692 * @oh: struct omap_hwmod *
2694 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2695 * does not have an IDLEST bit or if the module successfully leaves
2696 * slave idle; otherwise, pass along the return value of the
2697 * appropriate *_cm*_wait_module_ready() function.
2699 static int _omap2xxx_3xxx_wait_target_ready(struct omap_hwmod *oh)
2704 if (oh->flags & HWMOD_NO_IDLEST)
2707 if (!_find_mpu_rt_port(oh))
2710 /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
2712 return omap_cm_wait_module_ready(0, oh->prcm.omap2.module_offs,
2713 oh->prcm.omap2.idlest_reg_id,
2714 oh->prcm.omap2.idlest_idle_bit);
2718 * _omap4_wait_target_ready - wait for a module to leave slave idle
2719 * @oh: struct omap_hwmod *
2721 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2722 * does not have an IDLEST bit or if the module successfully leaves
2723 * slave idle; otherwise, pass along the return value of the
2724 * appropriate *_cm*_wait_module_ready() function.
2726 static int _omap4_wait_target_ready(struct omap_hwmod *oh)
2731 if (oh->flags & HWMOD_NO_IDLEST || !oh->clkdm)
2734 if (!_find_mpu_rt_port(oh))
2737 if (_omap4_clkctrl_managed_by_clkfwk(oh))
2740 if (!_omap4_has_clkctrl_clock(oh))
2743 /* XXX check module SIDLEMODE, hardreset status */
2745 return omap_cm_wait_module_ready(oh->clkdm->prcm_partition,
2747 oh->prcm.omap4.clkctrl_offs, 0);
2751 * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2752 * @oh: struct omap_hwmod * to assert hardreset
2753 * @ohri: hardreset line data
2755 * Call omap2_prm_assert_hardreset() with parameters extracted from
2756 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2757 * use as an soc_ops function pointer. Passes along the return value
2758 * from omap2_prm_assert_hardreset(). XXX This function is scheduled
2759 * for removal when the PRM code is moved into drivers/.
2761 static int _omap2_assert_hardreset(struct omap_hwmod *oh,
2762 struct omap_hwmod_rst_info *ohri)
2764 return omap_prm_assert_hardreset(ohri->rst_shift, 0,
2765 oh->prcm.omap2.module_offs, 0);
2769 * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2770 * @oh: struct omap_hwmod * to deassert hardreset
2771 * @ohri: hardreset line data
2773 * Call omap2_prm_deassert_hardreset() with parameters extracted from
2774 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2775 * use as an soc_ops function pointer. Passes along the return value
2776 * from omap2_prm_deassert_hardreset(). XXX This function is
2777 * scheduled for removal when the PRM code is moved into drivers/.
2779 static int _omap2_deassert_hardreset(struct omap_hwmod *oh,
2780 struct omap_hwmod_rst_info *ohri)
2782 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift, 0,
2783 oh->prcm.omap2.module_offs, 0, 0);
2787 * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args
2788 * @oh: struct omap_hwmod * to test hardreset
2789 * @ohri: hardreset line data
2791 * Call omap2_prm_is_hardreset_asserted() with parameters extracted
2792 * from the hwmod @oh and the hardreset line data @ohri. Only
2793 * intended for use as an soc_ops function pointer. Passes along the
2794 * return value from omap2_prm_is_hardreset_asserted(). XXX This
2795 * function is scheduled for removal when the PRM code is moved into
2798 static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh,
2799 struct omap_hwmod_rst_info *ohri)
2801 return omap_prm_is_hardreset_asserted(ohri->st_shift, 0,
2802 oh->prcm.omap2.module_offs, 0);
2806 * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2807 * @oh: struct omap_hwmod * to assert hardreset
2808 * @ohri: hardreset line data
2810 * Call omap4_prminst_assert_hardreset() with parameters extracted
2811 * from the hwmod @oh and the hardreset line data @ohri. Only
2812 * intended for use as an soc_ops function pointer. Passes along the
2813 * return value from omap4_prminst_assert_hardreset(). XXX This
2814 * function is scheduled for removal when the PRM code is moved into
2817 static int _omap4_assert_hardreset(struct omap_hwmod *oh,
2818 struct omap_hwmod_rst_info *ohri)
2823 return omap_prm_assert_hardreset(ohri->rst_shift,
2824 oh->clkdm->pwrdm.ptr->prcm_partition,
2825 oh->clkdm->pwrdm.ptr->prcm_offs,
2826 oh->prcm.omap4.rstctrl_offs);
2830 * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2831 * @oh: struct omap_hwmod * to deassert hardreset
2832 * @ohri: hardreset line data
2834 * Call omap4_prminst_deassert_hardreset() with parameters extracted
2835 * from the hwmod @oh and the hardreset line data @ohri. Only
2836 * intended for use as an soc_ops function pointer. Passes along the
2837 * return value from omap4_prminst_deassert_hardreset(). XXX This
2838 * function is scheduled for removal when the PRM code is moved into
2841 static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
2842 struct omap_hwmod_rst_info *ohri)
2848 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
2849 oh->name, ohri->name);
2850 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->rst_shift,
2851 oh->clkdm->pwrdm.ptr->prcm_partition,
2852 oh->clkdm->pwrdm.ptr->prcm_offs,
2853 oh->prcm.omap4.rstctrl_offs,
2854 oh->prcm.omap4.rstctrl_offs +
2855 OMAP4_RST_CTRL_ST_OFFSET);
2859 * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args
2860 * @oh: struct omap_hwmod * to test hardreset
2861 * @ohri: hardreset line data
2863 * Call omap4_prminst_is_hardreset_asserted() with parameters
2864 * extracted from the hwmod @oh and the hardreset line data @ohri.
2865 * Only intended for use as an soc_ops function pointer. Passes along
2866 * the return value from omap4_prminst_is_hardreset_asserted(). XXX
2867 * This function is scheduled for removal when the PRM code is moved
2870 static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
2871 struct omap_hwmod_rst_info *ohri)
2876 return omap_prm_is_hardreset_asserted(ohri->rst_shift,
2877 oh->clkdm->pwrdm.ptr->
2879 oh->clkdm->pwrdm.ptr->prcm_offs,
2880 oh->prcm.omap4.rstctrl_offs);
2884 * _omap4_disable_direct_prcm - disable direct PRCM control for hwmod
2885 * @oh: struct omap_hwmod * to disable control for
2887 * Disables direct PRCM clkctrl done by hwmod core. Instead, the hwmod
2888 * will be using its main_clk to enable/disable the module. Returns
2891 static int _omap4_disable_direct_prcm(struct omap_hwmod *oh)
2896 oh->prcm.omap4.flags |= HWMOD_OMAP4_CLKFWK_CLKCTR_CLOCK;
2902 * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args
2903 * @oh: struct omap_hwmod * to deassert hardreset
2904 * @ohri: hardreset line data
2906 * Call am33xx_prminst_deassert_hardreset() with parameters extracted
2907 * from the hwmod @oh and the hardreset line data @ohri. Only
2908 * intended for use as an soc_ops function pointer. Passes along the
2909 * return value from am33xx_prminst_deassert_hardreset(). XXX This
2910 * function is scheduled for removal when the PRM code is moved into
2913 static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
2914 struct omap_hwmod_rst_info *ohri)
2916 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift,
2917 oh->clkdm->pwrdm.ptr->prcm_partition,
2918 oh->clkdm->pwrdm.ptr->prcm_offs,
2919 oh->prcm.omap4.rstctrl_offs,
2920 oh->prcm.omap4.rstst_offs);
2923 /* Public functions */
2925 u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
2927 if (oh->flags & HWMOD_16BIT_REG)
2928 return readw_relaxed(oh->_mpu_rt_va + reg_offs);
2930 return readl_relaxed(oh->_mpu_rt_va + reg_offs);
2933 void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
2935 if (oh->flags & HWMOD_16BIT_REG)
2936 writew_relaxed(v, oh->_mpu_rt_va + reg_offs);
2938 writel_relaxed(v, oh->_mpu_rt_va + reg_offs);
2942 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
2943 * @oh: struct omap_hwmod *
2945 * This is a public function exposed to drivers. Some drivers may need to do
2946 * some settings before and after resetting the device. Those drivers after
2947 * doing the necessary settings could use this function to start a reset by
2948 * setting the SYSCONFIG.SOFTRESET bit.
2950 int omap_hwmod_softreset(struct omap_hwmod *oh)
2955 if (!oh || !(oh->_sysc_cache))
2958 v = oh->_sysc_cache;
2959 ret = _set_softreset(oh, &v);
2962 _write_sysconfig(v, oh);
2964 ret = _clear_softreset(oh, &v);
2967 _write_sysconfig(v, oh);
2974 * omap_hwmod_lookup - look up a registered omap_hwmod by name
2975 * @name: name of the omap_hwmod to look up
2977 * Given a @name of an omap_hwmod, return a pointer to the registered
2978 * struct omap_hwmod *, or NULL upon error.
2980 struct omap_hwmod *omap_hwmod_lookup(const char *name)
2982 struct omap_hwmod *oh;
2993 * omap_hwmod_for_each - call function for each registered omap_hwmod
2994 * @fn: pointer to a callback function
2995 * @data: void * data to pass to callback function
2997 * Call @fn for each registered omap_hwmod, passing @data to each
2998 * function. @fn must return 0 for success or any other value for
2999 * failure. If @fn returns non-zero, the iteration across omap_hwmods
3000 * will stop and the non-zero return value will be passed to the
3001 * caller of omap_hwmod_for_each(). @fn is called with
3002 * omap_hwmod_for_each() held.
3004 int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
3007 struct omap_hwmod *temp_oh;
3013 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3014 ret = (*fn)(temp_oh, data);
3023 * omap_hwmod_register_links - register an array of hwmod links
3024 * @ois: pointer to an array of omap_hwmod_ocp_if to register
3026 * Intended to be called early in boot before the clock framework is
3027 * initialized. If @ois is not null, will register all omap_hwmods
3028 * listed in @ois that are valid for this chip. Returns -EINVAL if
3029 * omap_hwmod_init() hasn't been called before calling this function,
3030 * -ENOMEM if the link memory area can't be allocated, or 0 upon
3033 int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
3043 if (ois[0] == NULL) /* Empty list */
3048 r = _register_link(ois[i]);
3049 WARN(r && r != -EEXIST,
3050 "omap_hwmod: _register_link(%s -> %s) returned %d\n",
3051 ois[i]->master->name, ois[i]->slave->name, r);
3058 * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
3059 * @oh: pointer to the hwmod currently being set up (usually not the MPU)
3061 * If the hwmod data corresponding to the MPU subsystem IP block
3062 * hasn't been initialized and set up yet, do so now. This must be
3063 * done first since sleep dependencies may be added from other hwmods
3064 * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
3067 static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
3069 if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
3070 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
3071 __func__, MPU_INITIATOR_NAME);
3072 else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
3073 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
3077 * omap_hwmod_setup_one - set up a single hwmod
3078 * @oh_name: const char * name of the already-registered hwmod to set up
3080 * Initialize and set up a single hwmod. Intended to be used for a
3081 * small number of early devices, such as the timer IP blocks used for
3082 * the scheduler clock. Must be called after omap2_clk_init().
3083 * Resolves the struct clk names to struct clk pointers for each
3084 * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
3085 * -EINVAL upon error or 0 upon success.
3087 int __init omap_hwmod_setup_one(const char *oh_name)
3089 struct omap_hwmod *oh;
3091 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
3093 oh = _lookup(oh_name);
3095 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
3099 _ensure_mpu_hwmod_is_setup(oh);
3107 static void omap_hwmod_check_one(struct device *dev,
3108 const char *name, s8 v1, u8 v2)
3114 dev_warn(dev, "%s %d != %d\n", name, v1, v2);
3118 * omap_hwmod_check_sysc - check sysc against platform sysc
3119 * @dev: struct device
3120 * @data: module data
3121 * @sysc_fields: new sysc configuration
3123 static int omap_hwmod_check_sysc(struct device *dev,
3124 const struct ti_sysc_module_data *data,
3125 struct sysc_regbits *sysc_fields)
3127 const struct sysc_regbits *regbits = data->cap->regbits;
3129 omap_hwmod_check_one(dev, "dmadisable_shift",
3130 regbits->dmadisable_shift,
3131 sysc_fields->dmadisable_shift);
3132 omap_hwmod_check_one(dev, "midle_shift",
3133 regbits->midle_shift,
3134 sysc_fields->midle_shift);
3135 omap_hwmod_check_one(dev, "sidle_shift",
3136 regbits->sidle_shift,
3137 sysc_fields->sidle_shift);
3138 omap_hwmod_check_one(dev, "clkact_shift",
3139 regbits->clkact_shift,
3140 sysc_fields->clkact_shift);
3141 omap_hwmod_check_one(dev, "enwkup_shift",
3142 regbits->enwkup_shift,
3143 sysc_fields->enwkup_shift);
3144 omap_hwmod_check_one(dev, "srst_shift",
3145 regbits->srst_shift,
3146 sysc_fields->srst_shift);
3147 omap_hwmod_check_one(dev, "autoidle_shift",
3148 regbits->autoidle_shift,
3149 sysc_fields->autoidle_shift);
3155 * omap_hwmod_init_regbits - init sysconfig specific register bits
3156 * @dev: struct device
3158 * @data: module data
3159 * @sysc_fields: new sysc configuration
3161 static int omap_hwmod_init_regbits(struct device *dev, struct omap_hwmod *oh,
3162 const struct ti_sysc_module_data *data,
3163 struct sysc_regbits **sysc_fields)
3165 switch (data->cap->type) {
3167 case TI_SYSC_OMAP2_TIMER:
3168 *sysc_fields = &omap_hwmod_sysc_type1;
3170 case TI_SYSC_OMAP3_SHAM:
3171 *sysc_fields = &omap3_sham_sysc_fields;
3173 case TI_SYSC_OMAP3_AES:
3174 *sysc_fields = &omap3xxx_aes_sysc_fields;
3177 case TI_SYSC_OMAP4_TIMER:
3178 *sysc_fields = &omap_hwmod_sysc_type2;
3180 case TI_SYSC_OMAP4_SIMPLE:
3181 *sysc_fields = &omap_hwmod_sysc_type3;
3183 case TI_SYSC_OMAP34XX_SR:
3184 *sysc_fields = &omap34xx_sr_sysc_fields;
3186 case TI_SYSC_OMAP36XX_SR:
3187 *sysc_fields = &omap36xx_sr_sysc_fields;
3189 case TI_SYSC_OMAP4_SR:
3190 *sysc_fields = &omap36xx_sr_sysc_fields;
3192 case TI_SYSC_OMAP4_MCASP:
3193 *sysc_fields = &omap_hwmod_sysc_type_mcasp;
3195 case TI_SYSC_OMAP4_USB_HOST_FS:
3196 *sysc_fields = &omap_hwmod_sysc_type_usb_host_fs;
3199 *sysc_fields = NULL;
3200 if (!oh->class->sysc->sysc_fields)
3203 dev_err(dev, "sysc_fields not found\n");
3208 return omap_hwmod_check_sysc(dev, data, *sysc_fields);
3212 * omap_hwmod_init_reg_offs - initialize sysconfig register offsets
3213 * @dev: struct device
3214 * @data: module data
3215 * @rev_offs: revision register offset
3216 * @sysc_offs: sysc register offset
3217 * @syss_offs: syss register offset
3219 static int omap_hwmod_init_reg_offs(struct device *dev,
3220 const struct ti_sysc_module_data *data,
3221 s32 *rev_offs, s32 *sysc_offs,
3224 *rev_offs = -ENODEV;
3228 if (data->offsets[SYSC_REVISION] >= 0)
3229 *rev_offs = data->offsets[SYSC_REVISION];
3231 if (data->offsets[SYSC_SYSCONFIG] >= 0)
3232 *sysc_offs = data->offsets[SYSC_SYSCONFIG];
3234 if (data->offsets[SYSC_SYSSTATUS] >= 0)
3235 *syss_offs = data->offsets[SYSC_SYSSTATUS];
3241 * omap_hwmod_init_sysc_flags - initialize sysconfig features
3242 * @dev: struct device
3243 * @data: module data
3244 * @sysc_flags: module configuration
3246 static int omap_hwmod_init_sysc_flags(struct device *dev,
3247 const struct ti_sysc_module_data *data,
3252 switch (data->cap->type) {
3254 case TI_SYSC_OMAP2_TIMER:
3255 /* See SYSC_OMAP2_* in include/dt-bindings/bus/ti-sysc.h */
3256 if (data->cfg->sysc_val & SYSC_OMAP2_CLOCKACTIVITY)
3257 *sysc_flags |= SYSC_HAS_CLOCKACTIVITY;
3258 if (data->cfg->sysc_val & SYSC_OMAP2_EMUFREE)
3259 *sysc_flags |= SYSC_HAS_EMUFREE;
3260 if (data->cfg->sysc_val & SYSC_OMAP2_ENAWAKEUP)
3261 *sysc_flags |= SYSC_HAS_ENAWAKEUP;
3262 if (data->cfg->sysc_val & SYSC_OMAP2_SOFTRESET)
3263 *sysc_flags |= SYSC_HAS_SOFTRESET;
3264 if (data->cfg->sysc_val & SYSC_OMAP2_AUTOIDLE)
3265 *sysc_flags |= SYSC_HAS_AUTOIDLE;
3268 case TI_SYSC_OMAP4_TIMER:
3269 /* See SYSC_OMAP4_* in include/dt-bindings/bus/ti-sysc.h */
3270 if (data->cfg->sysc_val & SYSC_OMAP4_DMADISABLE)
3271 *sysc_flags |= SYSC_HAS_DMADISABLE;
3272 if (data->cfg->sysc_val & SYSC_OMAP4_FREEEMU)
3273 *sysc_flags |= SYSC_HAS_EMUFREE;
3274 if (data->cfg->sysc_val & SYSC_OMAP4_SOFTRESET)
3275 *sysc_flags |= SYSC_HAS_SOFTRESET;
3277 case TI_SYSC_OMAP34XX_SR:
3278 case TI_SYSC_OMAP36XX_SR:
3279 /* See SYSC_OMAP3_SR_* in include/dt-bindings/bus/ti-sysc.h */
3280 if (data->cfg->sysc_val & SYSC_OMAP3_SR_ENAWAKEUP)
3281 *sysc_flags |= SYSC_HAS_ENAWAKEUP;
3284 if (data->cap->regbits->emufree_shift >= 0)
3285 *sysc_flags |= SYSC_HAS_EMUFREE;
3286 if (data->cap->regbits->enwkup_shift >= 0)
3287 *sysc_flags |= SYSC_HAS_ENAWAKEUP;
3288 if (data->cap->regbits->srst_shift >= 0)
3289 *sysc_flags |= SYSC_HAS_SOFTRESET;
3290 if (data->cap->regbits->autoidle_shift >= 0)
3291 *sysc_flags |= SYSC_HAS_AUTOIDLE;
3295 if (data->cap->regbits->midle_shift >= 0 &&
3296 data->cfg->midlemodes)
3297 *sysc_flags |= SYSC_HAS_MIDLEMODE;
3299 if (data->cap->regbits->sidle_shift >= 0 &&
3300 data->cfg->sidlemodes)
3301 *sysc_flags |= SYSC_HAS_SIDLEMODE;
3303 if (data->cfg->quirks & SYSC_QUIRK_UNCACHED)
3304 *sysc_flags |= SYSC_NO_CACHE;
3305 if (data->cfg->quirks & SYSC_QUIRK_RESET_STATUS)
3306 *sysc_flags |= SYSC_HAS_RESET_STATUS;
3308 if (data->cfg->syss_mask & 1)
3309 *sysc_flags |= SYSS_HAS_RESET_STATUS;
3315 * omap_hwmod_init_idlemodes - initialize module idle modes
3316 * @dev: struct device
3317 * @data: module data
3318 * @idlemodes: module supported idle modes
3320 static int omap_hwmod_init_idlemodes(struct device *dev,
3321 const struct ti_sysc_module_data *data,
3326 if (data->cfg->midlemodes & BIT(SYSC_IDLE_FORCE))
3327 *idlemodes |= MSTANDBY_FORCE;
3328 if (data->cfg->midlemodes & BIT(SYSC_IDLE_NO))
3329 *idlemodes |= MSTANDBY_NO;
3330 if (data->cfg->midlemodes & BIT(SYSC_IDLE_SMART))
3331 *idlemodes |= MSTANDBY_SMART;
3332 if (data->cfg->midlemodes & BIT(SYSC_IDLE_SMART_WKUP))
3333 *idlemodes |= MSTANDBY_SMART_WKUP;
3335 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_FORCE))
3336 *idlemodes |= SIDLE_FORCE;
3337 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_NO))
3338 *idlemodes |= SIDLE_NO;
3339 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_SMART))
3340 *idlemodes |= SIDLE_SMART;
3341 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_SMART_WKUP))
3342 *idlemodes |= SIDLE_SMART_WKUP;
3348 * omap_hwmod_check_module - check new module against platform data
3349 * @dev: struct device
3351 * @data: new module data
3352 * @sysc_fields: sysc register bits
3353 * @rev_offs: revision register offset
3354 * @sysc_offs: sysconfig register offset
3355 * @syss_offs: sysstatus register offset
3356 * @sysc_flags: sysc specific flags
3357 * @idlemodes: sysc supported idlemodes
3359 static int omap_hwmod_check_module(struct device *dev,
3360 struct omap_hwmod *oh,
3361 const struct ti_sysc_module_data *data,
3362 struct sysc_regbits *sysc_fields,
3363 s32 rev_offs, s32 sysc_offs,
3364 s32 syss_offs, u32 sysc_flags,
3367 if (!oh->class->sysc)
3370 if (oh->class->sysc->sysc_fields &&
3371 sysc_fields != oh->class->sysc->sysc_fields)
3372 dev_warn(dev, "sysc_fields mismatch\n");
3374 if (rev_offs != oh->class->sysc->rev_offs)
3375 dev_warn(dev, "rev_offs %08x != %08x\n", rev_offs,
3376 oh->class->sysc->rev_offs);
3377 if (sysc_offs != oh->class->sysc->sysc_offs)
3378 dev_warn(dev, "sysc_offs %08x != %08x\n", sysc_offs,
3379 oh->class->sysc->sysc_offs);
3380 if (syss_offs != oh->class->sysc->syss_offs)
3381 dev_warn(dev, "syss_offs %08x != %08x\n", syss_offs,
3382 oh->class->sysc->syss_offs);
3384 if (sysc_flags != oh->class->sysc->sysc_flags)
3385 dev_warn(dev, "sysc_flags %08x != %08x\n", sysc_flags,
3386 oh->class->sysc->sysc_flags);
3388 if (idlemodes != oh->class->sysc->idlemodes)
3389 dev_warn(dev, "idlemodes %08x != %08x\n", idlemodes,
3390 oh->class->sysc->idlemodes);
3392 if (data->cfg->srst_udelay != oh->class->sysc->srst_udelay)
3393 dev_warn(dev, "srst_udelay %i != %i\n",
3394 data->cfg->srst_udelay,
3395 oh->class->sysc->srst_udelay);
3401 * omap_hwmod_allocate_module - allocate new module
3402 * @dev: struct device
3404 * @sysc_fields: sysc register bits
3405 * @clockdomain: clockdomain
3406 * @rev_offs: revision register offset
3407 * @sysc_offs: sysconfig register offset
3408 * @syss_offs: sysstatus register offset
3409 * @sysc_flags: sysc specific flags
3410 * @idlemodes: sysc supported idlemodes
3412 * Note that the allocations here cannot use devm as ti-sysc can rebind.
3414 static int omap_hwmod_allocate_module(struct device *dev, struct omap_hwmod *oh,
3415 const struct ti_sysc_module_data *data,
3416 struct sysc_regbits *sysc_fields,
3417 struct clockdomain *clkdm,
3418 s32 rev_offs, s32 sysc_offs,
3419 s32 syss_offs, u32 sysc_flags,
3422 struct omap_hwmod_class_sysconfig *sysc;
3423 struct omap_hwmod_class *class = NULL;
3424 struct omap_hwmod_ocp_if *oi = NULL;
3425 void __iomem *regs = NULL;
3426 unsigned long flags;
3428 sysc = kzalloc(sizeof(*sysc), GFP_KERNEL);
3432 sysc->sysc_fields = sysc_fields;
3433 sysc->rev_offs = rev_offs;
3434 sysc->sysc_offs = sysc_offs;
3435 sysc->syss_offs = syss_offs;
3436 sysc->sysc_flags = sysc_flags;
3437 sysc->idlemodes = idlemodes;
3438 sysc->srst_udelay = data->cfg->srst_udelay;
3440 if (!oh->_mpu_rt_va) {
3441 regs = ioremap(data->module_pa,
3448 * We may need a new oh->class as the other devices in the same class
3449 * may not yet have ioremapped their registers.
3451 if (oh->class->name && strcmp(oh->class->name, data->name)) {
3452 class = kmemdup(oh->class, sizeof(*oh->class), GFP_KERNEL);
3457 if (list_empty(&oh->slave_ports)) {
3458 oi = kcalloc(1, sizeof(*oi), GFP_KERNEL);
3460 goto out_free_class;
3463 * Note that we assume interconnect interface clocks will be
3464 * managed by the interconnect driver for OCPIF_SWSUP_IDLE case
3465 * on omap24xx and omap3.
3468 oi->user = OCP_USER_MPU | OCP_USER_SDMA;
3471 spin_lock_irqsave(&oh->_lock, flags);
3473 oh->_mpu_rt_va = regs;
3476 oh->class->sysc = sysc;
3481 oh->_state = _HWMOD_STATE_INITIALIZED;
3482 oh->_postsetup_state = _HWMOD_STATE_DEFAULT;
3484 spin_unlock_irqrestore(&oh->_lock, flags);
3497 static const struct omap_hwmod_reset omap24xx_reset_quirks[] = {
3498 { .match = "msdi", .len = 4, .reset = omap_msdi_reset, },
3501 static const struct omap_hwmod_reset omap_reset_quirks[] = {
3502 { .match = "dss_core", .len = 8, .reset = omap_dss_reset, },
3503 { .match = "hdq1w", .len = 5, .reset = omap_hdq1w_reset, },
3504 { .match = "i2c", .len = 3, .reset = omap_i2c_reset, },
3505 { .match = "wd_timer", .len = 8, .reset = omap2_wd_timer_reset, },
3509 omap_hwmod_init_reset_quirk(struct device *dev, struct omap_hwmod *oh,
3510 const struct ti_sysc_module_data *data,
3511 const struct omap_hwmod_reset *quirks,
3514 const struct omap_hwmod_reset *quirk;
3517 for (i = 0; i < quirks_sz; i++) {
3519 if (!strncmp(data->name, quirk->match, quirk->len)) {
3520 oh->class->reset = quirk->reset;
3528 omap_hwmod_init_reset_quirks(struct device *dev, struct omap_hwmod *oh,
3529 const struct ti_sysc_module_data *data)
3531 if (soc_is_omap24xx())
3532 omap_hwmod_init_reset_quirk(dev, oh, data,
3533 omap24xx_reset_quirks,
3534 ARRAY_SIZE(omap24xx_reset_quirks));
3536 omap_hwmod_init_reset_quirk(dev, oh, data, omap_reset_quirks,
3537 ARRAY_SIZE(omap_reset_quirks));
3541 * omap_hwmod_init_module - initialize new module
3542 * @dev: struct device
3543 * @data: module data
3544 * @cookie: cookie for the caller to use for later calls
3546 int omap_hwmod_init_module(struct device *dev,
3547 const struct ti_sysc_module_data *data,
3548 struct ti_sysc_cookie *cookie)
3550 struct omap_hwmod *oh;
3551 struct sysc_regbits *sysc_fields;
3552 s32 rev_offs, sysc_offs, syss_offs;
3553 u32 sysc_flags, idlemodes;
3556 if (!dev || !data || !data->name || !cookie)
3559 oh = _lookup(data->name);
3561 oh = kzalloc(sizeof(*oh), GFP_KERNEL);
3565 oh->name = data->name;
3566 oh->_state = _HWMOD_STATE_UNKNOWN;
3567 lockdep_register_key(&oh->hwmod_key);
3569 /* Unused, can be handled by PRM driver handling resets */
3570 oh->prcm.omap4.flags = HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT;
3572 oh->class = kzalloc(sizeof(*oh->class), GFP_KERNEL);
3578 omap_hwmod_init_reset_quirks(dev, oh, data);
3580 oh->class->name = data->name;
3581 mutex_lock(&list_lock);
3582 error = _register(oh);
3583 mutex_unlock(&list_lock);
3588 error = omap_hwmod_init_regbits(dev, oh, data, &sysc_fields);
3592 error = omap_hwmod_init_reg_offs(dev, data, &rev_offs,
3593 &sysc_offs, &syss_offs);
3597 error = omap_hwmod_init_sysc_flags(dev, data, &sysc_flags);
3601 error = omap_hwmod_init_idlemodes(dev, data, &idlemodes);
3605 if (data->cfg->quirks & SYSC_QUIRK_NO_IDLE)
3606 oh->flags |= HWMOD_NO_IDLE;
3607 if (data->cfg->quirks & SYSC_QUIRK_NO_IDLE_ON_INIT)
3608 oh->flags |= HWMOD_INIT_NO_IDLE;
3609 if (data->cfg->quirks & SYSC_QUIRK_NO_RESET_ON_INIT)
3610 oh->flags |= HWMOD_INIT_NO_RESET;
3611 if (data->cfg->quirks & SYSC_QUIRK_USE_CLOCKACT)
3612 oh->flags |= HWMOD_SET_DEFAULT_CLOCKACT;
3613 if (data->cfg->quirks & SYSC_QUIRK_SWSUP_SIDLE)
3614 oh->flags |= HWMOD_SWSUP_SIDLE;
3615 if (data->cfg->quirks & SYSC_QUIRK_SWSUP_SIDLE_ACT)
3616 oh->flags |= HWMOD_SWSUP_SIDLE_ACT;
3617 if (data->cfg->quirks & SYSC_QUIRK_SWSUP_MSTANDBY)
3618 oh->flags |= HWMOD_SWSUP_MSTANDBY;
3619 if (data->cfg->quirks & SYSC_QUIRK_CLKDM_NOAUTO)
3620 oh->flags |= HWMOD_CLKDM_NOAUTO;
3622 error = omap_hwmod_check_module(dev, oh, data, sysc_fields,
3623 rev_offs, sysc_offs, syss_offs,
3624 sysc_flags, idlemodes);
3628 return omap_hwmod_allocate_module(dev, oh, data, sysc_fields,
3629 cookie->clkdm, rev_offs,
3630 sysc_offs, syss_offs,
3631 sysc_flags, idlemodes);
3635 * omap_hwmod_setup_earlycon_flags - set up flags for early console
3637 * Enable DEBUG_OMAPUART_FLAGS for uart hwmod that is being used as
3638 * early concole so that hwmod core doesn't reset and keep it in idle
3639 * that specific uart.
3641 #ifdef CONFIG_SERIAL_EARLYCON
3642 static void __init omap_hwmod_setup_earlycon_flags(void)
3644 struct device_node *np;
3645 struct omap_hwmod *oh;
3648 np = of_find_node_by_path("/chosen");
3650 uart = of_get_property(np, "stdout-path", NULL);
3652 np = of_find_node_by_path(uart);
3654 uart = of_get_property(np, "ti,hwmods", NULL);
3655 oh = omap_hwmod_lookup(uart);
3657 uart = of_get_property(np->parent,
3660 oh = omap_hwmod_lookup(uart);
3663 oh->flags |= DEBUG_OMAPUART_FLAGS;
3671 * omap_hwmod_setup_all - set up all registered IP blocks
3673 * Initialize and set up all IP blocks registered with the hwmod code.
3674 * Must be called after omap2_clk_init(). Resolves the struct clk
3675 * names to struct clk pointers for each registered omap_hwmod. Also
3676 * calls _setup() on each hwmod. Returns 0 upon success.
3678 static int __init omap_hwmod_setup_all(void)
3683 _ensure_mpu_hwmod_is_setup(NULL);
3685 omap_hwmod_for_each(_init, NULL);
3686 #ifdef CONFIG_SERIAL_EARLYCON
3687 omap_hwmod_setup_earlycon_flags();
3689 omap_hwmod_for_each(_setup, NULL);
3693 omap_postcore_initcall(omap_hwmod_setup_all);
3696 * omap_hwmod_enable - enable an omap_hwmod
3697 * @oh: struct omap_hwmod *
3699 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
3700 * Returns -EINVAL on error or passes along the return value from _enable().
3702 int omap_hwmod_enable(struct omap_hwmod *oh)
3705 unsigned long flags;
3710 spin_lock_irqsave(&oh->_lock, flags);
3712 spin_unlock_irqrestore(&oh->_lock, flags);
3718 * omap_hwmod_idle - idle an omap_hwmod
3719 * @oh: struct omap_hwmod *
3721 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
3722 * Returns -EINVAL on error or passes along the return value from _idle().
3724 int omap_hwmod_idle(struct omap_hwmod *oh)
3727 unsigned long flags;
3732 spin_lock_irqsave(&oh->_lock, flags);
3734 spin_unlock_irqrestore(&oh->_lock, flags);
3740 * omap_hwmod_shutdown - shutdown an omap_hwmod
3741 * @oh: struct omap_hwmod *
3743 * Shutdown an omap_hwmod @oh. Intended to be called by
3744 * omap_device_shutdown(). Returns -EINVAL on error or passes along
3745 * the return value from _shutdown().
3747 int omap_hwmod_shutdown(struct omap_hwmod *oh)
3750 unsigned long flags;
3755 spin_lock_irqsave(&oh->_lock, flags);
3757 spin_unlock_irqrestore(&oh->_lock, flags);
3763 * IP block data retrieval functions
3767 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
3768 * @oh: struct omap_hwmod *
3770 * Return the powerdomain pointer associated with the OMAP module
3771 * @oh's main clock. If @oh does not have a main clk, return the
3772 * powerdomain associated with the interface clock associated with the
3773 * module's MPU port. (XXX Perhaps this should use the SDMA port
3774 * instead?) Returns NULL on error, or a struct powerdomain * on
3777 struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
3780 struct omap_hwmod_ocp_if *oi;
3781 struct clockdomain *clkdm;
3782 struct clk_hw_omap *clk;
3789 return oh->clkdm->pwrdm.ptr;
3794 oi = _find_mpu_rt_port(oh);
3800 hw = __clk_get_hw(c);
3804 clk = to_clk_hw_omap(hw);
3812 return clkdm->pwrdm.ptr;
3816 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
3817 * @oh: struct omap_hwmod *
3819 * Returns the virtual address corresponding to the beginning of the
3820 * module's register target, in the address range that is intended to
3821 * be used by the MPU. Returns the virtual address upon success or NULL
3824 void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
3829 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
3832 if (oh->_state == _HWMOD_STATE_UNKNOWN)
3835 return oh->_mpu_rt_va;
3839 * XXX what about functions for drivers to save/restore ocp_sysconfig
3840 * for context save/restore operations?
3844 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
3845 * contained in the hwmod module.
3846 * @oh: struct omap_hwmod *
3847 * @name: name of the reset line to lookup and assert
3849 * Some IP like dsp, ipu or iva contain processor that require
3850 * an HW reset line to be assert / deassert in order to enable fully
3851 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3852 * yet supported on this OMAP; otherwise, passes along the return value
3853 * from _assert_hardreset().
3855 int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
3858 unsigned long flags;
3863 spin_lock_irqsave(&oh->_lock, flags);
3864 ret = _assert_hardreset(oh, name);
3865 spin_unlock_irqrestore(&oh->_lock, flags);
3871 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
3872 * contained in the hwmod module.
3873 * @oh: struct omap_hwmod *
3874 * @name: name of the reset line to look up and deassert
3876 * Some IP like dsp, ipu or iva contain processor that require
3877 * an HW reset line to be assert / deassert in order to enable fully
3878 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3879 * yet supported on this OMAP; otherwise, passes along the return value
3880 * from _deassert_hardreset().
3882 int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
3885 unsigned long flags;
3890 spin_lock_irqsave(&oh->_lock, flags);
3891 ret = _deassert_hardreset(oh, name);
3892 spin_unlock_irqrestore(&oh->_lock, flags);
3898 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
3899 * @classname: struct omap_hwmod_class name to search for
3900 * @fn: callback function pointer to call for each hwmod in class @classname
3901 * @user: arbitrary context data to pass to the callback function
3903 * For each omap_hwmod of class @classname, call @fn.
3904 * If the callback function returns something other than
3905 * zero, the iterator is terminated, and the callback function's return
3906 * value is passed back to the caller. Returns 0 upon success, -EINVAL
3907 * if @classname or @fn are NULL, or passes back the error code from @fn.
3909 int omap_hwmod_for_each_by_class(const char *classname,
3910 int (*fn)(struct omap_hwmod *oh,
3914 struct omap_hwmod *temp_oh;
3917 if (!classname || !fn)
3920 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
3921 __func__, classname);
3923 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3924 if (!strcmp(temp_oh->class->name, classname)) {
3925 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
3926 __func__, temp_oh->name);
3927 ret = (*fn)(temp_oh, user);
3934 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
3941 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
3942 * @oh: struct omap_hwmod *
3943 * @state: state that _setup() should leave the hwmod in
3945 * Sets the hwmod state that @oh will enter at the end of _setup()
3946 * (called by omap_hwmod_setup_*()). See also the documentation
3947 * for _setup_postsetup(), above. Returns 0 upon success or
3948 * -EINVAL if there is a problem with the arguments or if the hwmod is
3949 * in the wrong state.
3951 int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
3954 unsigned long flags;
3959 if (state != _HWMOD_STATE_DISABLED &&
3960 state != _HWMOD_STATE_ENABLED &&
3961 state != _HWMOD_STATE_IDLE)
3964 spin_lock_irqsave(&oh->_lock, flags);
3966 if (oh->_state != _HWMOD_STATE_REGISTERED) {
3971 oh->_postsetup_state = state;
3975 spin_unlock_irqrestore(&oh->_lock, flags);
3981 * omap_hwmod_get_context_loss_count - get lost context count
3982 * @oh: struct omap_hwmod *
3984 * Returns the context loss count of associated @oh
3985 * upon success, or zero if no context loss data is available.
3987 * On OMAP4, this queries the per-hwmod context loss register,
3988 * assuming one exists. If not, or on OMAP2/3, this queries the
3989 * enclosing powerdomain context loss count.
3991 int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
3993 struct powerdomain *pwrdm;
3996 if (soc_ops.get_context_lost)
3997 return soc_ops.get_context_lost(oh);
3999 pwrdm = omap_hwmod_get_pwrdm(oh);
4001 ret = pwrdm_get_context_loss_count(pwrdm);
4007 * omap_hwmod_init - initialize the hwmod code
4009 * Sets up some function pointers needed by the hwmod code to operate on the
4010 * currently-booted SoC. Intended to be called once during kernel init
4011 * before any hwmods are registered. No return value.
4013 void __init omap_hwmod_init(void)
4015 if (cpu_is_omap24xx()) {
4016 soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready;
4017 soc_ops.assert_hardreset = _omap2_assert_hardreset;
4018 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
4019 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
4020 } else if (cpu_is_omap34xx()) {
4021 soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready;
4022 soc_ops.assert_hardreset = _omap2_assert_hardreset;
4023 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
4024 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
4025 soc_ops.init_clkdm = _init_clkdm;
4026 } else if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx()) {
4027 soc_ops.enable_module = _omap4_enable_module;
4028 soc_ops.disable_module = _omap4_disable_module;
4029 soc_ops.wait_target_ready = _omap4_wait_target_ready;
4030 soc_ops.assert_hardreset = _omap4_assert_hardreset;
4031 soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
4032 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
4033 soc_ops.init_clkdm = _init_clkdm;
4034 soc_ops.update_context_lost = _omap4_update_context_lost;
4035 soc_ops.get_context_lost = _omap4_get_context_lost;
4036 soc_ops.disable_direct_prcm = _omap4_disable_direct_prcm;
4037 soc_ops.xlate_clkctrl = _omap4_xlate_clkctrl;
4038 } else if (cpu_is_ti814x() || cpu_is_ti816x() || soc_is_am33xx() ||
4040 soc_ops.enable_module = _omap4_enable_module;
4041 soc_ops.disable_module = _omap4_disable_module;
4042 soc_ops.wait_target_ready = _omap4_wait_target_ready;
4043 soc_ops.assert_hardreset = _omap4_assert_hardreset;
4044 soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
4045 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
4046 soc_ops.init_clkdm = _init_clkdm;
4047 soc_ops.disable_direct_prcm = _omap4_disable_direct_prcm;
4048 soc_ops.xlate_clkctrl = _omap4_xlate_clkctrl;
4050 WARN(1, "omap_hwmod: unknown SoC type\n");
4053 _init_clkctrl_providers();
4059 * omap_hwmod_get_main_clk - get pointer to main clock name
4060 * @oh: struct omap_hwmod *
4062 * Returns the main clock name assocated with @oh upon success,
4063 * or NULL if @oh is NULL.
4065 const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh)
4070 return oh->main_clk;