1 // SPDX-License-Identifier: GPL-2.0-only
3 * omap_hwmod implementation for OMAP2/3/4
5 * Copyright (C) 2009-2011 Nokia Corporation
6 * Copyright (C) 2011-2012 Texas Instruments, Inc.
8 * Paul Walmsley, BenoƮt Cousson, Kevin Hilman
10 * Created in collaboration with (alphabetical order): Thara Gopinath,
11 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
12 * Sawant, Santosh Shilimkar, Richard Woodruff
16 * One way to view an OMAP SoC is as a collection of largely unrelated
17 * IP blocks connected by interconnects. The IP blocks include
18 * devices such as ARM processors, audio serial interfaces, UARTs,
19 * etc. Some of these devices, like the DSP, are created by TI;
20 * others, like the SGX, largely originate from external vendors. In
21 * TI's documentation, on-chip devices are referred to as "OMAP
22 * modules." Some of these IP blocks are identical across several
23 * OMAP versions. Others are revised frequently.
25 * These OMAP modules are tied together by various interconnects.
26 * Most of the address and data flow between modules is via OCP-based
27 * interconnects such as the L3 and L4 buses; but there are other
28 * interconnects that distribute the hardware clock tree, handle idle
29 * and reset signaling, supply power, and connect the modules to
30 * various pads or balls on the OMAP package.
32 * OMAP hwmod provides a consistent way to describe the on-chip
33 * hardware blocks and their integration into the rest of the chip.
34 * This description can be automatically generated from the TI
35 * hardware database. OMAP hwmod provides a standard, consistent API
36 * to reset, enable, idle, and disable these hardware blocks. And
37 * hwmod provides a way for other core code, such as the Linux device
38 * code or the OMAP power management and address space mapping code,
39 * to query the hardware database.
43 * Drivers won't call hwmod functions directly. That is done by the
44 * omap_device code, and in rare occasions, by custom integration code
45 * in arch/arm/ *omap*. The omap_device code includes functions to
46 * build a struct platform_device using omap_hwmod data, and that is
47 * currently how hwmod data is communicated to drivers and to the
48 * Linux driver model. Most drivers will call omap_hwmod functions only
49 * indirectly, via pm_runtime*() functions.
51 * From a layering perspective, here is where the OMAP hwmod code
52 * fits into the kernel software stack:
54 * +-------------------------------+
55 * | Device driver code |
56 * | (e.g., drivers/) |
57 * +-------------------------------+
58 * | Linux driver model |
59 * | (platform_device / |
60 * | platform_driver data/code) |
61 * +-------------------------------+
62 * | OMAP core-driver integration |
63 * |(arch/arm/mach-omap2/devices.c)|
64 * +-------------------------------+
65 * | omap_device code |
66 * | (../plat-omap/omap_device.c) |
67 * +-------------------------------+
68 * ----> | omap_hwmod code/data | <-----
69 * | (../mach-omap2/omap_hwmod*) |
70 * +-------------------------------+
71 * | OMAP clock/PRCM/register fns |
72 * | ({read,write}l_relaxed, clk*) |
73 * +-------------------------------+
75 * Device drivers should not contain any OMAP-specific code or data in
76 * them. They should only contain code to operate the IP block that
77 * the driver is responsible for. This is because these IP blocks can
78 * also appear in other SoCs, either from TI (such as DaVinci) or from
79 * other manufacturers; and drivers should be reusable across other
82 * The OMAP hwmod code also will attempt to reset and idle all on-chip
83 * devices upon boot. The goal here is for the kernel to be
84 * completely self-reliant and independent from bootloaders. This is
85 * to ensure a repeatable configuration, both to ensure consistent
86 * runtime behavior, and to make it easier for others to reproduce
89 * OMAP module activity states
90 * ---------------------------
91 * The hwmod code considers modules to be in one of several activity
92 * states. IP blocks start out in an UNKNOWN state, then once they
93 * are registered via the hwmod code, proceed to the REGISTERED state.
94 * Once their clock names are resolved to clock pointers, the module
95 * enters the CLKS_INITED state; and finally, once the module has been
96 * reset and the integration registers programmed, the INITIALIZED state
97 * is entered. The hwmod code will then place the module into either
98 * the IDLE state to save power, or in the case of a critical system
99 * module, the ENABLED state.
101 * OMAP core integration code can then call omap_hwmod*() functions
102 * directly to move the module between the IDLE, ENABLED, and DISABLED
103 * states, as needed. This is done during both the PM idle loop, and
104 * in the OMAP core integration code's implementation of the PM runtime
109 * This is a partial list.
110 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
111 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
112 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
113 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
114 * - Open Core Protocol Specification 2.2
117 * - handle IO mapping
118 * - bus throughput & module latency measurement code
120 * XXX add tests at the beginning of each function to ensure the hwmod is
121 * in the appropriate state
122 * XXX error return values should be checked to ensure that they are
127 #include <linux/kernel.h>
128 #include <linux/errno.h>
129 #include <linux/io.h>
130 #include <linux/clk.h>
131 #include <linux/clk-provider.h>
132 #include <linux/delay.h>
133 #include <linux/err.h>
134 #include <linux/list.h>
135 #include <linux/mutex.h>
136 #include <linux/spinlock.h>
137 #include <linux/slab.h>
138 #include <linux/cpu.h>
139 #include <linux/of.h>
140 #include <linux/of_address.h>
141 #include <linux/memblock.h>
143 #include <linux/platform_data/ti-sysc.h>
145 #include <dt-bindings/bus/ti-sysc.h>
147 #include <asm/system_misc.h>
150 #include "omap_hwmod.h"
154 #include "clockdomain.h"
157 #include "powerdomain.h"
165 #include "prminst44xx.h"
167 #include "wd_timer.h"
169 /* Name of the OMAP hwmod for the MPU */
170 #define MPU_INITIATOR_NAME "mpu"
173 * Number of struct omap_hwmod_link records per struct
174 * omap_hwmod_ocp_if record (master->slave and slave->master)
176 #define LINKS_PER_OCP_IF 2
179 * Address offset (in bytes) between the reset control and the reset
180 * status registers: 4 bytes on OMAP4
182 #define OMAP4_RST_CTRL_ST_OFFSET 4
185 * Maximum length for module clock handle names
187 #define MOD_CLK_MAX_NAME_LEN 32
190 * struct clkctrl_provider - clkctrl provider mapping data
191 * @num_addrs: number of base address ranges for the provider
192 * @addr: base address(es) for the provider
193 * @size: size(s) of the provider address space(s)
194 * @node: device node associated with the provider
197 struct clkctrl_provider {
201 struct device_node *node;
202 struct list_head link;
205 static LIST_HEAD(clkctrl_providers);
208 * struct omap_hwmod_reset - IP specific reset functions
209 * @match: string to match against the module name
210 * @len: number of characters to match
211 * @reset: IP specific reset function
213 * Used only in cases where struct omap_hwmod is dynamically allocated.
215 struct omap_hwmod_reset {
218 int (*reset)(struct omap_hwmod *oh);
222 * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
223 * @enable_module: function to enable a module (via MODULEMODE)
224 * @disable_module: function to disable a module (via MODULEMODE)
226 * XXX Eventually this functionality will be hidden inside the PRM/CM
227 * device drivers. Until then, this should avoid huge blocks of cpu_is_*()
228 * conditionals in this code.
230 struct omap_hwmod_soc_ops {
231 void (*enable_module)(struct omap_hwmod *oh);
232 int (*disable_module)(struct omap_hwmod *oh);
233 int (*wait_target_ready)(struct omap_hwmod *oh);
234 int (*assert_hardreset)(struct omap_hwmod *oh,
235 struct omap_hwmod_rst_info *ohri);
236 int (*deassert_hardreset)(struct omap_hwmod *oh,
237 struct omap_hwmod_rst_info *ohri);
238 int (*is_hardreset_asserted)(struct omap_hwmod *oh,
239 struct omap_hwmod_rst_info *ohri);
240 int (*init_clkdm)(struct omap_hwmod *oh);
241 void (*update_context_lost)(struct omap_hwmod *oh);
242 int (*get_context_lost)(struct omap_hwmod *oh);
243 int (*disable_direct_prcm)(struct omap_hwmod *oh);
244 u32 (*xlate_clkctrl)(struct omap_hwmod *oh);
247 /* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
248 static struct omap_hwmod_soc_ops soc_ops;
250 /* omap_hwmod_list contains all registered struct omap_hwmods */
251 static LIST_HEAD(omap_hwmod_list);
252 static DEFINE_MUTEX(list_lock);
254 /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
255 static struct omap_hwmod *mpu_oh;
257 /* inited: set to true once the hwmod code is initialized */
260 /* Private functions */
263 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
264 * @oh: struct omap_hwmod *
266 * Load the current value of the hwmod OCP_SYSCONFIG register into the
267 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
268 * OCP_SYSCONFIG register or 0 upon success.
270 static int _update_sysc_cache(struct omap_hwmod *oh)
272 if (!oh->class->sysc) {
273 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
277 /* XXX ensure module interface clock is up */
279 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
281 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
282 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
288 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
289 * @v: OCP_SYSCONFIG value to write
290 * @oh: struct omap_hwmod *
292 * Write @v into the module class' OCP_SYSCONFIG register, if it has
293 * one. No return value.
295 static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
297 if (!oh->class->sysc) {
298 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
302 /* XXX ensure module interface clock is up */
304 /* Module might have lost context, always update cache and register */
308 * Some IP blocks (such as RTC) require unlocking of IP before
309 * accessing its registers. If a function pointer is present
310 * to unlock, then call it before accessing sysconfig and
311 * call lock after writing sysconfig.
313 if (oh->class->unlock)
314 oh->class->unlock(oh);
316 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
323 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
324 * @oh: struct omap_hwmod *
325 * @standbymode: MIDLEMODE field bits
326 * @v: pointer to register contents to modify
328 * Update the master standby mode bits in @v to be @standbymode for
329 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
330 * upon error or 0 upon success.
332 static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
338 if (!oh->class->sysc ||
339 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
342 if (!oh->class->sysc->sysc_fields) {
343 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
347 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
348 mstandby_mask = (0x3 << mstandby_shift);
350 *v &= ~mstandby_mask;
351 *v |= __ffs(standbymode) << mstandby_shift;
357 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
358 * @oh: struct omap_hwmod *
359 * @idlemode: SIDLEMODE field bits
360 * @v: pointer to register contents to modify
362 * Update the slave idle mode bits in @v to be @idlemode for the @oh
363 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
366 static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
371 if (!oh->class->sysc ||
372 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
375 if (!oh->class->sysc->sysc_fields) {
376 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
380 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
381 sidle_mask = (0x3 << sidle_shift);
384 *v |= __ffs(idlemode) << sidle_shift;
390 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
391 * @oh: struct omap_hwmod *
392 * @clockact: CLOCKACTIVITY field bits
393 * @v: pointer to register contents to modify
395 * Update the clockactivity mode bits in @v to be @clockact for the
396 * @oh hwmod. Used for additional powersaving on some modules. Does
397 * not write to the hardware. Returns -EINVAL upon error or 0 upon
400 static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
405 if (!oh->class->sysc ||
406 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
409 if (!oh->class->sysc->sysc_fields) {
410 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
414 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
415 clkact_mask = (0x3 << clkact_shift);
418 *v |= clockact << clkact_shift;
424 * _set_softreset: set OCP_SYSCONFIG.SOFTRESET bit in @v
425 * @oh: struct omap_hwmod *
426 * @v: pointer to register contents to modify
428 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
429 * error or 0 upon success.
431 static int _set_softreset(struct omap_hwmod *oh, u32 *v)
435 if (!oh->class->sysc ||
436 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
439 if (!oh->class->sysc->sysc_fields) {
440 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
444 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
452 * _clear_softreset: clear OCP_SYSCONFIG.SOFTRESET bit in @v
453 * @oh: struct omap_hwmod *
454 * @v: pointer to register contents to modify
456 * Clear the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
457 * error or 0 upon success.
459 static int _clear_softreset(struct omap_hwmod *oh, u32 *v)
463 if (!oh->class->sysc ||
464 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
467 if (!oh->class->sysc->sysc_fields) {
469 "omap_hwmod: %s: sysc_fields absent for sysconfig class\n",
474 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
482 * _wait_softreset_complete - wait for an OCP softreset to complete
483 * @oh: struct omap_hwmod * to wait on
485 * Wait until the IP block represented by @oh reports that its OCP
486 * softreset is complete. This can be triggered by software (see
487 * _ocp_softreset()) or by hardware upon returning from off-mode (one
488 * example is HSMMC). Waits for up to MAX_MODULE_SOFTRESET_WAIT
489 * microseconds. Returns the number of microseconds waited.
491 static int _wait_softreset_complete(struct omap_hwmod *oh)
493 struct omap_hwmod_class_sysconfig *sysc;
497 sysc = oh->class->sysc;
499 if (sysc->sysc_flags & SYSS_HAS_RESET_STATUS && sysc->syss_offs > 0)
500 omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs)
501 & SYSS_RESETDONE_MASK),
502 MAX_MODULE_SOFTRESET_WAIT, c);
503 else if (sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
504 softrst_mask = (0x1 << sysc->sysc_fields->srst_shift);
505 omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs)
507 MAX_MODULE_SOFTRESET_WAIT, c);
514 * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
515 * @oh: struct omap_hwmod *
517 * The DMADISABLE bit is a semi-automatic bit present in sysconfig register
518 * of some modules. When the DMA must perform read/write accesses, the
519 * DMADISABLE bit is cleared by the hardware. But when the DMA must stop
520 * for power management, software must set the DMADISABLE bit back to 1.
522 * Set the DMADISABLE bit in @v for hwmod @oh. Returns -EINVAL upon
523 * error or 0 upon success.
525 static int _set_dmadisable(struct omap_hwmod *oh)
530 if (!oh->class->sysc ||
531 !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE))
534 if (!oh->class->sysc->sysc_fields) {
535 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
539 /* clocks must be on for this operation */
540 if (oh->_state != _HWMOD_STATE_ENABLED) {
541 pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name);
545 pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name);
549 (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift);
550 v |= dmadisable_mask;
551 _write_sysconfig(v, oh);
557 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
558 * @oh: struct omap_hwmod *
559 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
560 * @v: pointer to register contents to modify
562 * Update the module autoidle bit in @v to be @autoidle for the @oh
563 * hwmod. The autoidle bit controls whether the module can gate
564 * internal clocks automatically when it isn't doing anything; the
565 * exact function of this bit varies on a per-module basis. This
566 * function does not write to the hardware. Returns -EINVAL upon
567 * error or 0 upon success.
569 static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
575 if (!oh->class->sysc ||
576 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
579 if (!oh->class->sysc->sysc_fields) {
580 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
584 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
585 autoidle_mask = (0x1 << autoidle_shift);
587 *v &= ~autoidle_mask;
588 *v |= autoidle << autoidle_shift;
594 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
595 * @oh: struct omap_hwmod *
597 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
598 * upon error or 0 upon success.
600 static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
602 if (!oh->class->sysc ||
603 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
604 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
605 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
608 if (!oh->class->sysc->sysc_fields) {
609 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
613 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
614 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
616 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
617 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
618 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
619 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
621 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
626 static struct clockdomain *_get_clkdm(struct omap_hwmod *oh)
628 struct clk_hw_omap *clk;
632 } else if (oh->_clk) {
633 if (!omap2_clk_is_hw_omap(__clk_get_hw(oh->_clk)))
635 clk = to_clk_hw_omap(__clk_get_hw(oh->_clk));
642 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
643 * @oh: struct omap_hwmod *
645 * Prevent the hardware module @oh from entering idle while the
646 * hardare module initiator @init_oh is active. Useful when a module
647 * will be accessed by a particular initiator (e.g., if a module will
648 * be accessed by the IVA, there should be a sleepdep between the IVA
649 * initiator and the module). Only applies to modules in smart-idle
650 * mode. If the clockdomain is marked as not needing autodeps, return
651 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
652 * passes along clkdm_add_sleepdep() value upon success.
654 static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
656 struct clockdomain *clkdm, *init_clkdm;
658 clkdm = _get_clkdm(oh);
659 init_clkdm = _get_clkdm(init_oh);
661 if (!clkdm || !init_clkdm)
664 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
667 return clkdm_add_sleepdep(clkdm, init_clkdm);
671 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
672 * @oh: struct omap_hwmod *
674 * Allow the hardware module @oh to enter idle while the hardare
675 * module initiator @init_oh is active. Useful when a module will not
676 * be accessed by a particular initiator (e.g., if a module will not
677 * be accessed by the IVA, there should be no sleepdep between the IVA
678 * initiator and the module). Only applies to modules in smart-idle
679 * mode. If the clockdomain is marked as not needing autodeps, return
680 * 0 without doing anything. Returns -EINVAL upon error or passes
681 * along clkdm_del_sleepdep() value upon success.
683 static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
685 struct clockdomain *clkdm, *init_clkdm;
687 clkdm = _get_clkdm(oh);
688 init_clkdm = _get_clkdm(init_oh);
690 if (!clkdm || !init_clkdm)
693 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
696 return clkdm_del_sleepdep(clkdm, init_clkdm);
699 static const struct of_device_id ti_clkctrl_match_table[] __initconst = {
700 { .compatible = "ti,clkctrl" },
704 static int __init _setup_clkctrl_provider(struct device_node *np)
707 struct clkctrl_provider *provider;
711 provider = memblock_alloc(sizeof(*provider), SMP_CACHE_BYTES);
717 provider->num_addrs =
718 of_property_count_elems_of_size(np, "reg", sizeof(u32)) / 2;
721 memblock_alloc(sizeof(void *) * provider->num_addrs,
727 memblock_alloc(sizeof(u32) * provider->num_addrs,
732 for (i = 0; i < provider->num_addrs; i++) {
733 addrp = of_get_address(np, i, &size, NULL);
734 provider->addr[i] = (u32)of_translate_address(np, addrp);
735 provider->size[i] = size;
736 pr_debug("%s: %pOF: %x...%x\n", __func__, np, provider->addr[i],
737 provider->addr[i] + provider->size[i]);
740 list_add(&provider->link, &clkctrl_providers);
745 static int __init _init_clkctrl_providers(void)
747 struct device_node *np;
750 for_each_matching_node(np, ti_clkctrl_match_table) {
751 ret = _setup_clkctrl_provider(np);
761 static u32 _omap4_xlate_clkctrl(struct omap_hwmod *oh)
763 if (!oh->prcm.omap4.modulemode)
766 return omap_cm_xlate_clkctrl(oh->clkdm->prcm_partition,
768 oh->prcm.omap4.clkctrl_offs);
771 static struct clk *_lookup_clkctrl_clk(struct omap_hwmod *oh)
773 struct clkctrl_provider *provider;
777 if (!soc_ops.xlate_clkctrl)
780 addr = soc_ops.xlate_clkctrl(oh);
784 pr_debug("%s: %s: addr=%x\n", __func__, oh->name, addr);
786 list_for_each_entry(provider, &clkctrl_providers, link) {
789 for (i = 0; i < provider->num_addrs; i++) {
790 if (provider->addr[i] <= addr &&
791 provider->addr[i] + provider->size[i] > addr) {
792 struct of_phandle_args clkspec;
794 clkspec.np = provider->node;
795 clkspec.args_count = 2;
796 clkspec.args[0] = addr - provider->addr[0];
799 clk = of_clk_get_from_provider(&clkspec);
801 pr_debug("%s: %s got %p (offset=%x, provider=%pOF)\n",
802 __func__, oh->name, clk,
803 clkspec.args[0], provider->node);
814 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
815 * @oh: struct omap_hwmod *
817 * Called from _init_clocks(). Populates the @oh _clk (main
818 * functional clock pointer) if a clock matching the hwmod name is found,
819 * or a main_clk is present. Returns 0 on success or -EINVAL on error.
821 static int _init_main_clk(struct omap_hwmod *oh)
824 struct clk *clk = NULL;
826 clk = _lookup_clkctrl_clk(oh);
828 if (!IS_ERR_OR_NULL(clk)) {
829 pr_debug("%s: mapped main_clk %s for %s\n", __func__,
830 __clk_get_name(clk), oh->name);
831 oh->main_clk = __clk_get_name(clk);
833 soc_ops.disable_direct_prcm(oh);
838 oh->_clk = clk_get(NULL, oh->main_clk);
841 if (IS_ERR(oh->_clk)) {
842 pr_warn("omap_hwmod: %s: cannot clk_get main_clk %s\n",
843 oh->name, oh->main_clk);
847 * HACK: This needs a re-visit once clk_prepare() is implemented
848 * to do something meaningful. Today its just a no-op.
849 * If clk_prepare() is used at some point to do things like
850 * voltage scaling etc, then this would have to be moved to
851 * some point where subsystems like i2c and pmic become
854 clk_prepare(oh->_clk);
857 pr_debug("omap_hwmod: %s: missing clockdomain for %s.\n",
858 oh->name, oh->main_clk);
864 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
865 * @oh: struct omap_hwmod *
867 * Called from _init_clocks(). Populates the @oh OCP slave interface
868 * clock pointers. Returns 0 on success or -EINVAL on error.
870 static int _init_interface_clks(struct omap_hwmod *oh)
872 struct omap_hwmod_ocp_if *os;
876 list_for_each_entry(os, &oh->slave_ports, node) {
880 c = clk_get(NULL, os->clk);
882 pr_warn("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
889 * HACK: This needs a re-visit once clk_prepare() is implemented
890 * to do something meaningful. Today its just a no-op.
891 * If clk_prepare() is used at some point to do things like
892 * voltage scaling etc, then this would have to be moved to
893 * some point where subsystems like i2c and pmic become
896 clk_prepare(os->_clk);
903 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
904 * @oh: struct omap_hwmod *
906 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
907 * clock pointers. Returns 0 on success or -EINVAL on error.
909 static int _init_opt_clks(struct omap_hwmod *oh)
911 struct omap_hwmod_opt_clk *oc;
916 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
917 c = clk_get(NULL, oc->clk);
919 pr_warn("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
926 * HACK: This needs a re-visit once clk_prepare() is implemented
927 * to do something meaningful. Today its just a no-op.
928 * If clk_prepare() is used at some point to do things like
929 * voltage scaling etc, then this would have to be moved to
930 * some point where subsystems like i2c and pmic become
933 clk_prepare(oc->_clk);
939 static void _enable_optional_clocks(struct omap_hwmod *oh)
941 struct omap_hwmod_opt_clk *oc;
944 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
946 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
948 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
949 __clk_get_name(oc->_clk));
950 clk_enable(oc->_clk);
954 static void _disable_optional_clocks(struct omap_hwmod *oh)
956 struct omap_hwmod_opt_clk *oc;
959 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
961 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
963 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
964 __clk_get_name(oc->_clk));
965 clk_disable(oc->_clk);
970 * _enable_clocks - enable hwmod main clock and interface clocks
971 * @oh: struct omap_hwmod *
973 * Enables all clocks necessary for register reads and writes to succeed
974 * on the hwmod @oh. Returns 0.
976 static int _enable_clocks(struct omap_hwmod *oh)
978 struct omap_hwmod_ocp_if *os;
980 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
982 if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
983 _enable_optional_clocks(oh);
986 clk_enable(oh->_clk);
988 list_for_each_entry(os, &oh->slave_ports, node) {
989 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE)) {
990 omap2_clk_deny_idle(os->_clk);
991 clk_enable(os->_clk);
995 /* The opt clocks are controlled by the device driver. */
1001 * _omap4_clkctrl_managed_by_clkfwk - true if clkctrl managed by clock framework
1002 * @oh: struct omap_hwmod *
1004 static bool _omap4_clkctrl_managed_by_clkfwk(struct omap_hwmod *oh)
1006 if (oh->prcm.omap4.flags & HWMOD_OMAP4_CLKFWK_CLKCTR_CLOCK)
1013 * _omap4_has_clkctrl_clock - returns true if a module has clkctrl clock
1014 * @oh: struct omap_hwmod *
1016 static bool _omap4_has_clkctrl_clock(struct omap_hwmod *oh)
1018 if (oh->prcm.omap4.clkctrl_offs)
1021 if (!oh->prcm.omap4.clkctrl_offs &&
1022 oh->prcm.omap4.flags & HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET)
1029 * _disable_clocks - disable hwmod main clock and interface clocks
1030 * @oh: struct omap_hwmod *
1032 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
1034 static int _disable_clocks(struct omap_hwmod *oh)
1036 struct omap_hwmod_ocp_if *os;
1038 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
1041 clk_disable(oh->_clk);
1043 list_for_each_entry(os, &oh->slave_ports, node) {
1044 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE)) {
1045 clk_disable(os->_clk);
1046 omap2_clk_allow_idle(os->_clk);
1050 if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
1051 _disable_optional_clocks(oh);
1053 /* The opt clocks are controlled by the device driver. */
1059 * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
1060 * @oh: struct omap_hwmod *
1062 * Enables the PRCM module mode related to the hwmod @oh.
1065 static void _omap4_enable_module(struct omap_hwmod *oh)
1067 if (!oh->clkdm || !oh->prcm.omap4.modulemode ||
1068 _omap4_clkctrl_managed_by_clkfwk(oh))
1071 pr_debug("omap_hwmod: %s: %s: %d\n",
1072 oh->name, __func__, oh->prcm.omap4.modulemode);
1074 omap_cm_module_enable(oh->prcm.omap4.modulemode,
1075 oh->clkdm->prcm_partition,
1076 oh->clkdm->cm_inst, oh->prcm.omap4.clkctrl_offs);
1080 * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
1081 * @oh: struct omap_hwmod *
1083 * Wait for a module @oh to enter slave idle. Returns 0 if the module
1084 * does not have an IDLEST bit or if the module successfully enters
1085 * slave idle; otherwise, pass along the return value of the
1086 * appropriate *_cm*_wait_module_idle() function.
1088 static int _omap4_wait_target_disable(struct omap_hwmod *oh)
1093 if (oh->_int_flags & _HWMOD_NO_MPU_PORT || !oh->clkdm)
1096 if (oh->flags & HWMOD_NO_IDLEST)
1099 if (_omap4_clkctrl_managed_by_clkfwk(oh))
1102 if (!_omap4_has_clkctrl_clock(oh))
1105 return omap_cm_wait_module_idle(oh->clkdm->prcm_partition,
1107 oh->prcm.omap4.clkctrl_offs, 0);
1111 * _save_mpu_port_index - find and save the index to @oh's MPU port
1112 * @oh: struct omap_hwmod *
1114 * Determines the array index of the OCP slave port that the MPU uses
1115 * to address the device, and saves it into the struct omap_hwmod.
1116 * Intended to be called during hwmod registration only. No return
1119 static void __init _save_mpu_port_index(struct omap_hwmod *oh)
1121 struct omap_hwmod_ocp_if *os = NULL;
1126 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
1128 list_for_each_entry(os, &oh->slave_ports, node) {
1129 if (os->user & OCP_USER_MPU) {
1131 oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
1140 * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
1141 * @oh: struct omap_hwmod *
1143 * Given a pointer to a struct omap_hwmod record @oh, return a pointer
1144 * to the struct omap_hwmod_ocp_if record that is used by the MPU to
1145 * communicate with the IP block. This interface need not be directly
1146 * connected to the MPU (and almost certainly is not), but is directly
1147 * connected to the IP block represented by @oh. Returns a pointer
1148 * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
1149 * error or if there does not appear to be a path from the MPU to this
1152 static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
1154 if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
1157 return oh->_mpu_port;
1161 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
1162 * @oh: struct omap_hwmod *
1164 * Ensure that the OCP_SYSCONFIG register for the IP block represented
1165 * by @oh is set to indicate to the PRCM that the IP block is active.
1166 * Usually this means placing the module into smart-idle mode and
1167 * smart-standby, but if there is a bug in the automatic idle handling
1168 * for the IP block, it may need to be placed into the force-idle or
1169 * no-idle variants of these modes. No return value.
1171 static void _enable_sysc(struct omap_hwmod *oh)
1176 struct clockdomain *clkdm;
1178 if (!oh->class->sysc)
1182 * Wait until reset has completed, this is needed as the IP
1183 * block is reset automatically by hardware in some cases
1184 * (off-mode for example), and the drivers require the
1185 * IP to be ready when they access it
1187 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1188 _enable_optional_clocks(oh);
1189 _wait_softreset_complete(oh);
1190 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1191 _disable_optional_clocks(oh);
1193 v = oh->_sysc_cache;
1194 sf = oh->class->sysc->sysc_flags;
1196 clkdm = _get_clkdm(oh);
1197 if (sf & SYSC_HAS_SIDLEMODE) {
1198 if (oh->flags & HWMOD_SWSUP_SIDLE ||
1199 oh->flags & HWMOD_SWSUP_SIDLE_ACT) {
1200 idlemode = HWMOD_IDLEMODE_NO;
1202 if (sf & SYSC_HAS_ENAWAKEUP)
1203 _enable_wakeup(oh, &v);
1204 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
1205 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1207 idlemode = HWMOD_IDLEMODE_SMART;
1211 * This is special handling for some IPs like
1212 * 32k sync timer. Force them to idle!
1214 clkdm_act = (clkdm && clkdm->flags & CLKDM_ACTIVE_WITH_MPU);
1215 if (clkdm_act && !(oh->class->sysc->idlemodes &
1216 (SIDLE_SMART | SIDLE_SMART_WKUP)))
1217 idlemode = HWMOD_IDLEMODE_FORCE;
1219 _set_slave_idlemode(oh, idlemode, &v);
1222 if (sf & SYSC_HAS_MIDLEMODE) {
1223 if (oh->flags & HWMOD_FORCE_MSTANDBY) {
1224 idlemode = HWMOD_IDLEMODE_FORCE;
1225 } else if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1226 idlemode = HWMOD_IDLEMODE_NO;
1228 if (sf & SYSC_HAS_ENAWAKEUP)
1229 _enable_wakeup(oh, &v);
1230 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1231 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1233 idlemode = HWMOD_IDLEMODE_SMART;
1235 _set_master_standbymode(oh, idlemode, &v);
1239 * XXX The clock framework should handle this, by
1240 * calling into this code. But this must wait until the
1241 * clock structures are tagged with omap_hwmod entries
1243 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
1244 (sf & SYSC_HAS_CLOCKACTIVITY))
1245 _set_clockactivity(oh, CLOCKACT_TEST_ICLK, &v);
1247 _write_sysconfig(v, oh);
1250 * Set the autoidle bit only after setting the smartidle bit
1251 * Setting this will not have any impact on the other modules.
1253 if (sf & SYSC_HAS_AUTOIDLE) {
1254 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
1256 _set_module_autoidle(oh, idlemode, &v);
1257 _write_sysconfig(v, oh);
1262 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
1263 * @oh: struct omap_hwmod *
1265 * If module is marked as SWSUP_SIDLE, force the module into slave
1266 * idle; otherwise, configure it for smart-idle. If module is marked
1267 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
1268 * configure it for smart-standby. No return value.
1270 static void _idle_sysc(struct omap_hwmod *oh)
1275 if (!oh->class->sysc)
1278 v = oh->_sysc_cache;
1279 sf = oh->class->sysc->sysc_flags;
1281 if (sf & SYSC_HAS_SIDLEMODE) {
1282 if (oh->flags & HWMOD_SWSUP_SIDLE) {
1283 idlemode = HWMOD_IDLEMODE_FORCE;
1285 if (sf & SYSC_HAS_ENAWAKEUP)
1286 _enable_wakeup(oh, &v);
1287 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
1288 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1290 idlemode = HWMOD_IDLEMODE_SMART;
1292 _set_slave_idlemode(oh, idlemode, &v);
1295 if (sf & SYSC_HAS_MIDLEMODE) {
1296 if ((oh->flags & HWMOD_SWSUP_MSTANDBY) ||
1297 (oh->flags & HWMOD_FORCE_MSTANDBY)) {
1298 idlemode = HWMOD_IDLEMODE_FORCE;
1300 if (sf & SYSC_HAS_ENAWAKEUP)
1301 _enable_wakeup(oh, &v);
1302 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1303 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1305 idlemode = HWMOD_IDLEMODE_SMART;
1307 _set_master_standbymode(oh, idlemode, &v);
1310 /* If the cached value is the same as the new value, skip the write */
1311 if (oh->_sysc_cache != v)
1312 _write_sysconfig(v, oh);
1316 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
1317 * @oh: struct omap_hwmod *
1319 * Force the module into slave idle and master suspend. No return
1322 static void _shutdown_sysc(struct omap_hwmod *oh)
1327 if (!oh->class->sysc)
1330 v = oh->_sysc_cache;
1331 sf = oh->class->sysc->sysc_flags;
1333 if (sf & SYSC_HAS_SIDLEMODE)
1334 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
1336 if (sf & SYSC_HAS_MIDLEMODE)
1337 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
1339 if (sf & SYSC_HAS_AUTOIDLE)
1340 _set_module_autoidle(oh, 1, &v);
1342 _write_sysconfig(v, oh);
1346 * _lookup - find an omap_hwmod by name
1347 * @name: find an omap_hwmod by name
1349 * Return a pointer to an omap_hwmod by name, or NULL if not found.
1351 static struct omap_hwmod *_lookup(const char *name)
1353 struct omap_hwmod *oh, *temp_oh;
1357 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1358 if (!strcmp(name, temp_oh->name)) {
1368 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
1369 * @oh: struct omap_hwmod *
1371 * Convert a clockdomain name stored in a struct omap_hwmod into a
1372 * clockdomain pointer, and save it into the struct omap_hwmod.
1373 * Return -EINVAL if the clkdm_name lookup failed.
1375 static int _init_clkdm(struct omap_hwmod *oh)
1377 if (!oh->clkdm_name) {
1378 pr_debug("omap_hwmod: %s: missing clockdomain\n", oh->name);
1382 oh->clkdm = clkdm_lookup(oh->clkdm_name);
1384 pr_warn("omap_hwmod: %s: could not associate to clkdm %s\n",
1385 oh->name, oh->clkdm_name);
1389 pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
1390 oh->name, oh->clkdm_name);
1396 * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
1397 * well the clockdomain.
1398 * @oh: struct omap_hwmod *
1399 * @np: device_node mapped to this hwmod
1401 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
1402 * Resolves all clock names embedded in the hwmod. Returns 0 on
1403 * success, or a negative error code on failure.
1405 static int _init_clocks(struct omap_hwmod *oh, struct device_node *np)
1409 if (oh->_state != _HWMOD_STATE_REGISTERED)
1412 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
1414 if (soc_ops.init_clkdm)
1415 ret |= soc_ops.init_clkdm(oh);
1417 ret |= _init_main_clk(oh);
1418 ret |= _init_interface_clks(oh);
1419 ret |= _init_opt_clks(oh);
1422 oh->_state = _HWMOD_STATE_CLKS_INITED;
1424 pr_warn("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
1430 * _lookup_hardreset - fill register bit info for this hwmod/reset line
1431 * @oh: struct omap_hwmod *
1432 * @name: name of the reset line in the context of this hwmod
1433 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
1435 * Return the bit position of the reset line that match the
1436 * input name. Return -ENOENT if not found.
1438 static int _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1439 struct omap_hwmod_rst_info *ohri)
1443 for (i = 0; i < oh->rst_lines_cnt; i++) {
1444 const char *rst_line = oh->rst_lines[i].name;
1445 if (!strcmp(rst_line, name)) {
1446 ohri->rst_shift = oh->rst_lines[i].rst_shift;
1447 ohri->st_shift = oh->rst_lines[i].st_shift;
1448 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1449 oh->name, __func__, rst_line, ohri->rst_shift,
1460 * _assert_hardreset - assert the HW reset line of submodules
1461 * contained in the hwmod module.
1462 * @oh: struct omap_hwmod *
1463 * @name: name of the reset line to lookup and assert
1465 * Some IP like dsp, ipu or iva contain processor that require an HW
1466 * reset line to be assert / deassert in order to enable fully the IP.
1467 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1468 * asserting the hardreset line on the currently-booted SoC, or passes
1469 * along the return value from _lookup_hardreset() or the SoC's
1470 * assert_hardreset code.
1472 static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1474 struct omap_hwmod_rst_info ohri;
1480 if (!soc_ops.assert_hardreset)
1483 ret = _lookup_hardreset(oh, name, &ohri);
1487 ret = soc_ops.assert_hardreset(oh, &ohri);
1493 * _deassert_hardreset - deassert the HW reset line of submodules contained
1494 * in the hwmod module.
1495 * @oh: struct omap_hwmod *
1496 * @name: name of the reset line to look up and deassert
1498 * Some IP like dsp, ipu or iva contain processor that require an HW
1499 * reset line to be assert / deassert in order to enable fully the IP.
1500 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1501 * deasserting the hardreset line on the currently-booted SoC, or passes
1502 * along the return value from _lookup_hardreset() or the SoC's
1503 * deassert_hardreset code.
1505 static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1507 struct omap_hwmod_rst_info ohri;
1513 if (!soc_ops.deassert_hardreset)
1516 ret = _lookup_hardreset(oh, name, &ohri);
1522 * A clockdomain must be in SW_SUP otherwise reset
1523 * might not be completed. The clockdomain can be set
1524 * in HW_AUTO only when the module become ready.
1526 clkdm_deny_idle(oh->clkdm);
1527 ret = clkdm_hwmod_enable(oh->clkdm, oh);
1529 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1530 oh->name, oh->clkdm->name, ret);
1536 if (soc_ops.enable_module)
1537 soc_ops.enable_module(oh);
1539 ret = soc_ops.deassert_hardreset(oh, &ohri);
1541 if (soc_ops.disable_module)
1542 soc_ops.disable_module(oh);
1543 _disable_clocks(oh);
1546 pr_warn("omap_hwmod: %s: failed to hardreset\n", oh->name);
1550 * Set the clockdomain to HW_AUTO, assuming that the
1551 * previous state was HW_AUTO.
1553 clkdm_allow_idle(oh->clkdm);
1555 clkdm_hwmod_disable(oh->clkdm, oh);
1562 * _read_hardreset - read the HW reset line state of submodules
1563 * contained in the hwmod module
1564 * @oh: struct omap_hwmod *
1565 * @name: name of the reset line to look up and read
1567 * Return the state of the reset line. Returns -EINVAL if @oh is
1568 * null, -ENOSYS if we have no way of reading the hardreset line
1569 * status on the currently-booted SoC, or passes along the return
1570 * value from _lookup_hardreset() or the SoC's is_hardreset_asserted
1573 static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1575 struct omap_hwmod_rst_info ohri;
1581 if (!soc_ops.is_hardreset_asserted)
1584 ret = _lookup_hardreset(oh, name, &ohri);
1588 return soc_ops.is_hardreset_asserted(oh, &ohri);
1592 * _are_all_hardreset_lines_asserted - return true if the @oh is hard-reset
1593 * @oh: struct omap_hwmod *
1595 * If all hardreset lines associated with @oh are asserted, then return true.
1596 * Otherwise, if part of @oh is out hardreset or if no hardreset lines
1597 * associated with @oh are asserted, then return false.
1598 * This function is used to avoid executing some parts of the IP block
1599 * enable/disable sequence if its hardreset line is set.
1601 static bool _are_all_hardreset_lines_asserted(struct omap_hwmod *oh)
1605 if (oh->rst_lines_cnt == 0)
1608 for (i = 0; i < oh->rst_lines_cnt; i++)
1609 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1612 if (oh->rst_lines_cnt == rst_cnt)
1619 * _are_any_hardreset_lines_asserted - return true if any part of @oh is
1621 * @oh: struct omap_hwmod *
1623 * If any hardreset lines associated with @oh are asserted, then
1624 * return true. Otherwise, if no hardreset lines associated with @oh
1625 * are asserted, or if @oh has no hardreset lines, then return false.
1626 * This function is used to avoid executing some parts of the IP block
1627 * enable/disable sequence if any hardreset line is set.
1629 static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
1634 for (i = 0; i < oh->rst_lines_cnt && rst_cnt == 0; i++)
1635 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1638 return (rst_cnt) ? true : false;
1642 * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
1643 * @oh: struct omap_hwmod *
1645 * Disable the PRCM module mode related to the hwmod @oh.
1646 * Return EINVAL if the modulemode is not supported and 0 in case of success.
1648 static int _omap4_disable_module(struct omap_hwmod *oh)
1652 if (!oh->clkdm || !oh->prcm.omap4.modulemode ||
1653 _omap4_clkctrl_managed_by_clkfwk(oh))
1657 * Since integration code might still be doing something, only
1658 * disable if all lines are under hardreset.
1660 if (_are_any_hardreset_lines_asserted(oh))
1663 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1665 omap_cm_module_disable(oh->clkdm->prcm_partition, oh->clkdm->cm_inst,
1666 oh->prcm.omap4.clkctrl_offs);
1668 v = _omap4_wait_target_disable(oh);
1670 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1677 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
1678 * @oh: struct omap_hwmod *
1680 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
1681 * enabled for this to work. Returns -ENOENT if the hwmod cannot be
1682 * reset this way, -EINVAL if the hwmod is in the wrong state,
1683 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1685 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
1686 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
1687 * use the SYSCONFIG softreset bit to provide the status.
1689 * Note that some IP like McBSP do have reset control but don't have
1692 static int _ocp_softreset(struct omap_hwmod *oh)
1698 if (!oh->class->sysc ||
1699 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
1702 /* clocks must be on for this operation */
1703 if (oh->_state != _HWMOD_STATE_ENABLED) {
1704 pr_warn("omap_hwmod: %s: reset can only be entered from enabled state\n",
1709 /* For some modules, all optionnal clocks need to be enabled as well */
1710 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1711 _enable_optional_clocks(oh);
1713 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
1715 v = oh->_sysc_cache;
1716 ret = _set_softreset(oh, &v);
1720 _write_sysconfig(v, oh);
1722 if (oh->class->sysc->srst_udelay)
1723 udelay(oh->class->sysc->srst_udelay);
1725 c = _wait_softreset_complete(oh);
1726 if (c == MAX_MODULE_SOFTRESET_WAIT) {
1727 pr_warn("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1728 oh->name, MAX_MODULE_SOFTRESET_WAIT);
1732 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
1735 ret = _clear_softreset(oh, &v);
1739 _write_sysconfig(v, oh);
1742 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1743 * _wait_target_ready() or _reset()
1747 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1748 _disable_optional_clocks(oh);
1754 * _reset - reset an omap_hwmod
1755 * @oh: struct omap_hwmod *
1757 * Resets an omap_hwmod @oh. If the module has a custom reset
1758 * function pointer defined, then call it to reset the IP block, and
1759 * pass along its return value to the caller. Otherwise, if the IP
1760 * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
1761 * associated with it, call a function to reset the IP block via that
1762 * method, and pass along the return value to the caller. Finally, if
1763 * the IP block has some hardreset lines associated with it, assert
1764 * all of those, but do _not_ deassert them. (This is because driver
1765 * authors have expressed an apparent requirement to control the
1766 * deassertion of the hardreset lines themselves.)
1768 * The default software reset mechanism for most OMAP IP blocks is
1769 * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
1770 * hwmods cannot be reset via this method. Some are not targets and
1771 * therefore have no OCP header registers to access. Others (like the
1772 * IVA) have idiosyncratic reset sequences. So for these relatively
1773 * rare cases, custom reset code can be supplied in the struct
1774 * omap_hwmod_class .reset function pointer.
1776 * _set_dmadisable() is called to set the DMADISABLE bit so that it
1777 * does not prevent idling of the system. This is necessary for cases
1778 * where ROMCODE/BOOTLOADER uses dma and transfers control to the
1779 * kernel without disabling dma.
1781 * Passes along the return value from either _ocp_softreset() or the
1782 * custom reset function - these must return -EINVAL if the hwmod
1783 * cannot be reset this way or if the hwmod is in the wrong state,
1784 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1786 static int _reset(struct omap_hwmod *oh)
1790 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1792 if (oh->class->reset) {
1793 r = oh->class->reset(oh);
1795 if (oh->rst_lines_cnt > 0) {
1796 for (i = 0; i < oh->rst_lines_cnt; i++)
1797 _assert_hardreset(oh, oh->rst_lines[i].name);
1800 r = _ocp_softreset(oh);
1806 _set_dmadisable(oh);
1809 * OCP_SYSCONFIG bits need to be reprogrammed after a
1810 * softreset. The _enable() function should be split to avoid
1811 * the rewrite of the OCP_SYSCONFIG register.
1813 if (oh->class->sysc) {
1814 _update_sysc_cache(oh);
1822 * _omap4_update_context_lost - increment hwmod context loss counter if
1823 * hwmod context was lost, and clear hardware context loss reg
1824 * @oh: hwmod to check for context loss
1826 * If the PRCM indicates that the hwmod @oh lost context, increment
1827 * our in-memory context loss counter, and clear the RM_*_CONTEXT
1828 * bits. No return value.
1830 static void _omap4_update_context_lost(struct omap_hwmod *oh)
1832 if (oh->prcm.omap4.flags & HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT)
1835 if (!prm_was_any_context_lost_old(oh->clkdm->pwrdm.ptr->prcm_partition,
1836 oh->clkdm->pwrdm.ptr->prcm_offs,
1837 oh->prcm.omap4.context_offs))
1840 oh->prcm.omap4.context_lost_counter++;
1841 prm_clear_context_loss_flags_old(oh->clkdm->pwrdm.ptr->prcm_partition,
1842 oh->clkdm->pwrdm.ptr->prcm_offs,
1843 oh->prcm.omap4.context_offs);
1847 * _omap4_get_context_lost - get context loss counter for a hwmod
1848 * @oh: hwmod to get context loss counter for
1850 * Returns the in-memory context loss counter for a hwmod.
1852 static int _omap4_get_context_lost(struct omap_hwmod *oh)
1854 return oh->prcm.omap4.context_lost_counter;
1858 * _enable - enable an omap_hwmod
1859 * @oh: struct omap_hwmod *
1861 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
1862 * register target. Returns -EINVAL if the hwmod is in the wrong
1863 * state or passes along the return value of _wait_target_ready().
1865 static int _enable(struct omap_hwmod *oh)
1869 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
1872 * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
1875 if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
1876 oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
1880 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1881 oh->_state != _HWMOD_STATE_IDLE &&
1882 oh->_state != _HWMOD_STATE_DISABLED) {
1883 WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
1889 * If an IP block contains HW reset lines and all of them are
1890 * asserted, we let integration code associated with that
1891 * block handle the enable. We've received very little
1892 * information on what those driver authors need, and until
1893 * detailed information is provided and the driver code is
1894 * posted to the public lists, this is probably the best we
1897 if (_are_all_hardreset_lines_asserted(oh))
1900 _add_initiator_dep(oh, mpu_oh);
1904 * A clockdomain must be in SW_SUP before enabling
1905 * completely the module. The clockdomain can be set
1906 * in HW_AUTO only when the module become ready.
1908 clkdm_deny_idle(oh->clkdm);
1909 r = clkdm_hwmod_enable(oh->clkdm, oh);
1911 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1912 oh->name, oh->clkdm->name, r);
1918 if (soc_ops.enable_module)
1919 soc_ops.enable_module(oh);
1920 if (oh->flags & HWMOD_BLOCK_WFI)
1921 cpu_idle_poll_ctrl(true);
1923 if (soc_ops.update_context_lost)
1924 soc_ops.update_context_lost(oh);
1926 r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) :
1928 if (oh->clkdm && !(oh->flags & HWMOD_CLKDM_NOAUTO))
1929 clkdm_allow_idle(oh->clkdm);
1932 oh->_state = _HWMOD_STATE_ENABLED;
1934 /* Access the sysconfig only if the target is ready */
1935 if (oh->class->sysc) {
1936 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
1937 _update_sysc_cache(oh);
1941 if (soc_ops.disable_module)
1942 soc_ops.disable_module(oh);
1943 _disable_clocks(oh);
1944 pr_err("omap_hwmod: %s: _wait_target_ready failed: %d\n",
1948 clkdm_hwmod_disable(oh->clkdm, oh);
1955 * _idle - idle an omap_hwmod
1956 * @oh: struct omap_hwmod *
1958 * Idles an omap_hwmod @oh. This should be called once the hwmod has
1959 * no further work. Returns -EINVAL if the hwmod is in the wrong
1960 * state or returns 0.
1962 static int _idle(struct omap_hwmod *oh)
1964 if (oh->flags & HWMOD_NO_IDLE) {
1965 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
1969 pr_debug("omap_hwmod: %s: idling\n", oh->name);
1971 if (_are_all_hardreset_lines_asserted(oh))
1974 if (oh->_state != _HWMOD_STATE_ENABLED) {
1975 WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
1980 if (oh->class->sysc)
1982 _del_initiator_dep(oh, mpu_oh);
1985 * If HWMOD_CLKDM_NOAUTO is set then we don't
1986 * deny idle the clkdm again since idle was already denied
1989 if (oh->clkdm && !(oh->flags & HWMOD_CLKDM_NOAUTO))
1990 clkdm_deny_idle(oh->clkdm);
1992 if (oh->flags & HWMOD_BLOCK_WFI)
1993 cpu_idle_poll_ctrl(false);
1994 if (soc_ops.disable_module)
1995 soc_ops.disable_module(oh);
1998 * The module must be in idle mode before disabling any parents
1999 * clocks. Otherwise, the parent clock might be disabled before
2000 * the module transition is done, and thus will prevent the
2001 * transition to complete properly.
2003 _disable_clocks(oh);
2005 clkdm_allow_idle(oh->clkdm);
2006 clkdm_hwmod_disable(oh->clkdm, oh);
2009 oh->_state = _HWMOD_STATE_IDLE;
2015 * _shutdown - shutdown an omap_hwmod
2016 * @oh: struct omap_hwmod *
2018 * Shut down an omap_hwmod @oh. This should be called when the driver
2019 * used for the hwmod is removed or unloaded or if the driver is not
2020 * used by the system. Returns -EINVAL if the hwmod is in the wrong
2021 * state or returns 0.
2023 static int _shutdown(struct omap_hwmod *oh)
2028 if (_are_all_hardreset_lines_asserted(oh))
2031 if (oh->_state != _HWMOD_STATE_IDLE &&
2032 oh->_state != _HWMOD_STATE_ENABLED) {
2033 WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
2038 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
2040 if (oh->class->pre_shutdown) {
2041 prev_state = oh->_state;
2042 if (oh->_state == _HWMOD_STATE_IDLE)
2044 ret = oh->class->pre_shutdown(oh);
2046 if (prev_state == _HWMOD_STATE_IDLE)
2052 if (oh->class->sysc) {
2053 if (oh->_state == _HWMOD_STATE_IDLE)
2058 /* clocks and deps are already disabled in idle */
2059 if (oh->_state == _HWMOD_STATE_ENABLED) {
2060 _del_initiator_dep(oh, mpu_oh);
2061 /* XXX what about the other system initiators here? dma, dsp */
2062 if (oh->flags & HWMOD_BLOCK_WFI)
2063 cpu_idle_poll_ctrl(false);
2064 if (soc_ops.disable_module)
2065 soc_ops.disable_module(oh);
2066 _disable_clocks(oh);
2068 clkdm_hwmod_disable(oh->clkdm, oh);
2070 /* XXX Should this code also force-disable the optional clocks? */
2072 for (i = 0; i < oh->rst_lines_cnt; i++)
2073 _assert_hardreset(oh, oh->rst_lines[i].name);
2075 oh->_state = _HWMOD_STATE_DISABLED;
2080 static int of_dev_find_hwmod(struct device_node *np,
2081 struct omap_hwmod *oh)
2086 count = of_property_count_strings(np, "ti,hwmods");
2090 for (i = 0; i < count; i++) {
2091 res = of_property_read_string_index(np, "ti,hwmods",
2095 if (!strcmp(p, oh->name)) {
2096 pr_debug("omap_hwmod: dt %pOFn[%i] uses hwmod %s\n",
2106 * of_dev_hwmod_lookup - look up needed hwmod from dt blob
2107 * @np: struct device_node *
2108 * @oh: struct omap_hwmod *
2109 * @index: index of the entry found
2110 * @found: struct device_node * found or NULL
2112 * Parse the dt blob and find out needed hwmod. Recursive function is
2113 * implemented to take care hierarchical dt blob parsing.
2114 * Return: Returns 0 on success, -ENODEV when not found.
2116 static int of_dev_hwmod_lookup(struct device_node *np,
2117 struct omap_hwmod *oh,
2119 struct device_node **found)
2121 struct device_node *np0 = NULL;
2124 res = of_dev_find_hwmod(np, oh);
2131 for_each_child_of_node(np, np0) {
2132 struct device_node *fc;
2135 res = of_dev_hwmod_lookup(np0, oh, &i, &fc);
2150 * omap_hwmod_fix_mpu_rt_idx - fix up mpu_rt_idx register offsets
2152 * @oh: struct omap_hwmod *
2153 * @np: struct device_node *
2155 * Fix up module register offsets for modules with mpu_rt_idx.
2156 * Only needed for cpsw with interconnect target module defined
2157 * in device tree while still using legacy hwmod platform data
2158 * for rev, sysc and syss registers.
2160 * Can be removed when all cpsw hwmod platform data has been
2163 static void omap_hwmod_fix_mpu_rt_idx(struct omap_hwmod *oh,
2164 struct device_node *np,
2165 struct resource *res)
2167 struct device_node *child = NULL;
2170 child = of_get_next_child(np, child);
2174 error = of_address_to_resource(child, oh->mpu_rt_idx, res);
2176 pr_err("%s: error mapping mpu_rt_idx: %i\n",
2181 * omap_hwmod_parse_module_range - map module IO range from device tree
2182 * @oh: struct omap_hwmod *
2183 * @np: struct device_node *
2185 * Parse the device tree range an interconnect target module provides
2186 * for it's child device IP blocks. This way we can support the old
2187 * "ti,hwmods" property with just dts data without a need for platform
2188 * data for IO resources. And we don't need all the child IP device
2189 * nodes available in the dts.
2191 int omap_hwmod_parse_module_range(struct omap_hwmod *oh,
2192 struct device_node *np,
2193 struct resource *res)
2195 struct property *prop;
2196 const __be32 *ranges;
2198 u32 nr_addr, nr_size;
2205 ranges = of_get_property(np, "ranges", &len);
2209 len /= sizeof(*ranges);
2214 of_property_for_each_string(np, "compatible", prop, name)
2215 if (!strncmp("ti,sysc-", name, 8))
2221 error = of_property_read_u32(np, "#address-cells", &nr_addr);
2225 error = of_property_read_u32(np, "#size-cells", &nr_size);
2229 if (nr_addr != 1 || nr_size != 1) {
2230 pr_err("%s: invalid range for %s->%pOFn\n", __func__,
2236 base = of_translate_address(np, ranges++);
2237 size = be32_to_cpup(ranges);
2239 pr_debug("omap_hwmod: %s %pOFn at 0x%llx size 0x%llx\n",
2240 oh->name, np, base, size);
2242 if (oh && oh->mpu_rt_idx) {
2243 omap_hwmod_fix_mpu_rt_idx(oh, np, res);
2249 res->end = base + size - 1;
2250 res->flags = IORESOURCE_MEM;
2256 * _init_mpu_rt_base - populate the virtual address for a hwmod
2257 * @oh: struct omap_hwmod * to locate the virtual address
2258 * @data: (unused, caller should pass NULL)
2259 * @index: index of the reg entry iospace in device tree
2260 * @np: struct device_node * of the IP block's device node in the DT data
2262 * Cache the virtual address used by the MPU to access this IP block's
2263 * registers. This address is needed early so the OCP registers that
2264 * are part of the device's address space can be ioremapped properly.
2266 * If SYSC access is not needed, the registers will not be remapped
2267 * and non-availability of MPU access is not treated as an error.
2269 * Returns 0 on success, -EINVAL if an invalid hwmod is passed, and
2270 * -ENXIO on absent or invalid register target address space.
2272 static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data,
2273 int index, struct device_node *np)
2275 void __iomem *va_start = NULL;
2276 struct resource res;
2282 _save_mpu_port_index(oh);
2284 /* if we don't need sysc access we don't need to ioremap */
2285 if (!oh->class->sysc)
2288 /* we can't continue without MPU PORT if we need sysc access */
2289 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2293 pr_err("omap_hwmod: %s: no dt node\n", oh->name);
2297 /* Do we have a dts range for the interconnect target module? */
2298 error = omap_hwmod_parse_module_range(oh, np, &res);
2300 va_start = ioremap(res.start, resource_size(&res));
2302 /* No ranges, rely on device reg entry */
2304 va_start = of_iomap(np, index + oh->mpu_rt_idx);
2306 pr_err("omap_hwmod: %s: Missing dt reg%i for %pOF\n",
2307 oh->name, index, np);
2311 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
2312 oh->name, va_start);
2314 oh->_mpu_rt_va = va_start;
2318 static void __init parse_module_flags(struct omap_hwmod *oh,
2319 struct device_node *np)
2321 if (of_find_property(np, "ti,no-reset-on-init", NULL))
2322 oh->flags |= HWMOD_INIT_NO_RESET;
2323 if (of_find_property(np, "ti,no-idle-on-init", NULL))
2324 oh->flags |= HWMOD_INIT_NO_IDLE;
2325 if (of_find_property(np, "ti,no-idle", NULL))
2326 oh->flags |= HWMOD_NO_IDLE;
2330 * _init - initialize internal data for the hwmod @oh
2331 * @oh: struct omap_hwmod *
2334 * Look up the clocks and the address space used by the MPU to access
2335 * registers belonging to the hwmod @oh. @oh must already be
2336 * registered at this point. This is the first of two phases for
2337 * hwmod initialization. Code called here does not touch any hardware
2338 * registers, it simply prepares internal data structures. Returns 0
2339 * upon success or if the hwmod isn't registered or if the hwmod's
2340 * address space is not defined, or -EINVAL upon failure.
2342 static int __init _init(struct omap_hwmod *oh, void *data)
2345 struct device_node *np = NULL;
2346 struct device_node *bus;
2348 if (oh->_state != _HWMOD_STATE_REGISTERED)
2351 bus = of_find_node_by_name(NULL, "ocp");
2355 r = of_dev_hwmod_lookup(bus, oh, &index, &np);
2357 pr_debug("omap_hwmod: %s missing dt data\n", oh->name);
2358 else if (np && index)
2359 pr_warn("omap_hwmod: %s using broken dt data from %pOFn\n",
2362 r = _init_mpu_rt_base(oh, NULL, index, np);
2364 WARN(1, "omap_hwmod: %s: doesn't have mpu register target base\n",
2369 r = _init_clocks(oh, np);
2371 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
2376 struct device_node *child;
2378 parse_module_flags(oh, np);
2379 child = of_get_next_child(np, NULL);
2381 parse_module_flags(oh, child);
2384 oh->_state = _HWMOD_STATE_INITIALIZED;
2390 * _setup_iclk_autoidle - configure an IP block's interface clocks
2391 * @oh: struct omap_hwmod *
2393 * Set up the module's interface clocks. XXX This function is still mostly
2394 * a stub; implementing this properly requires iclk autoidle usecounting in
2395 * the clock code. No return value.
2397 static void _setup_iclk_autoidle(struct omap_hwmod *oh)
2399 struct omap_hwmod_ocp_if *os;
2401 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2404 list_for_each_entry(os, &oh->slave_ports, node) {
2408 if (os->flags & OCPIF_SWSUP_IDLE) {
2410 * we might have multiple users of one iclk with
2411 * different requirements, disable autoidle when
2412 * the module is enabled, e.g. dss iclk
2415 /* we are enabling autoidle afterwards anyways */
2416 clk_enable(os->_clk);
2424 * _setup_reset - reset an IP block during the setup process
2425 * @oh: struct omap_hwmod *
2427 * Reset the IP block corresponding to the hwmod @oh during the setup
2428 * process. The IP block is first enabled so it can be successfully
2429 * reset. Returns 0 upon success or a negative error code upon
2432 static int _setup_reset(struct omap_hwmod *oh)
2436 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2439 if (oh->flags & HWMOD_EXT_OPT_MAIN_CLK)
2442 if (oh->rst_lines_cnt == 0) {
2445 pr_warn("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
2446 oh->name, oh->_state);
2451 if (!(oh->flags & HWMOD_INIT_NO_RESET))
2458 * _setup_postsetup - transition to the appropriate state after _setup
2459 * @oh: struct omap_hwmod *
2461 * Place an IP block represented by @oh into a "post-setup" state --
2462 * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
2463 * this function is called at the end of _setup().) The postsetup
2464 * state for an IP block can be changed by calling
2465 * omap_hwmod_enter_postsetup_state() early in the boot process,
2466 * before one of the omap_hwmod_setup*() functions are called for the
2469 * The IP block stays in this state until a PM runtime-based driver is
2470 * loaded for that IP block. A post-setup state of IDLE is
2471 * appropriate for almost all IP blocks with runtime PM-enabled
2472 * drivers, since those drivers are able to enable the IP block. A
2473 * post-setup state of ENABLED is appropriate for kernels with PM
2474 * runtime disabled. The DISABLED state is appropriate for unusual IP
2475 * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
2476 * included, since the WDTIMER starts running on reset and will reset
2477 * the MPU if left active.
2479 * This post-setup mechanism is deprecated. Once all of the OMAP
2480 * drivers have been converted to use PM runtime, and all of the IP
2481 * block data and interconnect data is available to the hwmod code, it
2482 * should be possible to replace this mechanism with a "lazy reset"
2483 * arrangement. In a "lazy reset" setup, each IP block is enabled
2484 * when the driver first probes, then all remaining IP blocks without
2485 * drivers are either shut down or enabled after the drivers have
2486 * loaded. However, this cannot take place until the above
2487 * preconditions have been met, since otherwise the late reset code
2488 * has no way of knowing which IP blocks are in use by drivers, and
2489 * which ones are unused.
2493 static void _setup_postsetup(struct omap_hwmod *oh)
2497 if (oh->rst_lines_cnt > 0)
2500 postsetup_state = oh->_postsetup_state;
2501 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
2502 postsetup_state = _HWMOD_STATE_ENABLED;
2505 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
2506 * it should be set by the core code as a runtime flag during startup
2508 if ((oh->flags & (HWMOD_INIT_NO_IDLE | HWMOD_NO_IDLE)) &&
2509 (postsetup_state == _HWMOD_STATE_IDLE)) {
2510 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
2511 postsetup_state = _HWMOD_STATE_ENABLED;
2514 if (postsetup_state == _HWMOD_STATE_IDLE)
2516 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2518 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2519 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2520 oh->name, postsetup_state);
2526 * _setup - prepare IP block hardware for use
2527 * @oh: struct omap_hwmod *
2528 * @n: (unused, pass NULL)
2530 * Configure the IP block represented by @oh. This may include
2531 * enabling the IP block, resetting it, and placing it into a
2532 * post-setup state, depending on the type of IP block and applicable
2533 * flags. IP blocks are reset to prevent any previous configuration
2534 * by the bootloader or previous operating system from interfering
2535 * with power management or other parts of the system. The reset can
2536 * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
2537 * two phases for hwmod initialization. Code called here generally
2538 * affects the IP block hardware, or system integration hardware
2539 * associated with the IP block. Returns 0.
2541 static int _setup(struct omap_hwmod *oh, void *data)
2543 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2546 if (oh->parent_hwmod) {
2549 r = _enable(oh->parent_hwmod);
2550 WARN(r, "hwmod: %s: setup: failed to enable parent hwmod %s\n",
2551 oh->name, oh->parent_hwmod->name);
2554 _setup_iclk_autoidle(oh);
2556 if (!_setup_reset(oh))
2557 _setup_postsetup(oh);
2559 if (oh->parent_hwmod) {
2562 postsetup_state = oh->parent_hwmod->_postsetup_state;
2564 if (postsetup_state == _HWMOD_STATE_IDLE)
2565 _idle(oh->parent_hwmod);
2566 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2567 _shutdown(oh->parent_hwmod);
2568 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2569 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2570 oh->parent_hwmod->name, postsetup_state);
2577 * _register - register a struct omap_hwmod
2578 * @oh: struct omap_hwmod *
2580 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
2581 * already has been registered by the same name; -EINVAL if the
2582 * omap_hwmod is in the wrong state, if @oh is NULL, if the
2583 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
2584 * name, or if the omap_hwmod's class is missing a name; or 0 upon
2587 * XXX The data should be copied into bootmem, so the original data
2588 * should be marked __initdata and freed after init. This would allow
2589 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
2590 * that the copy process would be relatively complex due to the large number
2593 static int _register(struct omap_hwmod *oh)
2595 if (!oh || !oh->name || !oh->class || !oh->class->name ||
2596 (oh->_state != _HWMOD_STATE_UNKNOWN))
2599 pr_debug("omap_hwmod: %s: registering\n", oh->name);
2601 if (_lookup(oh->name))
2604 list_add_tail(&oh->node, &omap_hwmod_list);
2606 INIT_LIST_HEAD(&oh->slave_ports);
2607 spin_lock_init(&oh->_lock);
2608 lockdep_set_class(&oh->_lock, &oh->hwmod_key);
2610 oh->_state = _HWMOD_STATE_REGISTERED;
2613 * XXX Rather than doing a strcmp(), this should test a flag
2614 * set in the hwmod data, inserted by the autogenerator code.
2616 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
2623 * _add_link - add an interconnect between two IP blocks
2624 * @oi: pointer to a struct omap_hwmod_ocp_if record
2626 * Add struct omap_hwmod_link records connecting the slave IP block
2627 * specified in @oi->slave to @oi. This code is assumed to run before
2628 * preemption or SMP has been enabled, thus avoiding the need for
2629 * locking in this code. Changes to this assumption will require
2630 * additional locking. Returns 0.
2632 static int _add_link(struct omap_hwmod_ocp_if *oi)
2634 pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name,
2637 list_add(&oi->node, &oi->slave->slave_ports);
2638 oi->slave->slaves_cnt++;
2644 * _register_link - register a struct omap_hwmod_ocp_if
2645 * @oi: struct omap_hwmod_ocp_if *
2647 * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it
2648 * has already been registered; -EINVAL if @oi is NULL or if the
2649 * record pointed to by @oi is missing required fields; or 0 upon
2652 * XXX The data should be copied into bootmem, so the original data
2653 * should be marked __initdata and freed after init. This would allow
2654 * unneeded omap_hwmods to be freed on multi-OMAP configurations.
2656 static int __init _register_link(struct omap_hwmod_ocp_if *oi)
2658 if (!oi || !oi->master || !oi->slave || !oi->user)
2661 if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED)
2664 pr_debug("omap_hwmod: registering link from %s to %s\n",
2665 oi->master->name, oi->slave->name);
2668 * Register the connected hwmods, if they haven't been
2669 * registered already
2671 if (oi->master->_state != _HWMOD_STATE_REGISTERED)
2672 _register(oi->master);
2674 if (oi->slave->_state != _HWMOD_STATE_REGISTERED)
2675 _register(oi->slave);
2679 oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED;
2684 /* Static functions intended only for use in soc_ops field function pointers */
2687 * _omap2xxx_3xxx_wait_target_ready - wait for a module to leave slave idle
2688 * @oh: struct omap_hwmod *
2690 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2691 * does not have an IDLEST bit or if the module successfully leaves
2692 * slave idle; otherwise, pass along the return value of the
2693 * appropriate *_cm*_wait_module_ready() function.
2695 static int _omap2xxx_3xxx_wait_target_ready(struct omap_hwmod *oh)
2700 if (oh->flags & HWMOD_NO_IDLEST)
2703 if (!_find_mpu_rt_port(oh))
2706 /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
2708 return omap_cm_wait_module_ready(0, oh->prcm.omap2.module_offs,
2709 oh->prcm.omap2.idlest_reg_id,
2710 oh->prcm.omap2.idlest_idle_bit);
2714 * _omap4_wait_target_ready - wait for a module to leave slave idle
2715 * @oh: struct omap_hwmod *
2717 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2718 * does not have an IDLEST bit or if the module successfully leaves
2719 * slave idle; otherwise, pass along the return value of the
2720 * appropriate *_cm*_wait_module_ready() function.
2722 static int _omap4_wait_target_ready(struct omap_hwmod *oh)
2727 if (oh->flags & HWMOD_NO_IDLEST || !oh->clkdm)
2730 if (!_find_mpu_rt_port(oh))
2733 if (_omap4_clkctrl_managed_by_clkfwk(oh))
2736 if (!_omap4_has_clkctrl_clock(oh))
2739 /* XXX check module SIDLEMODE, hardreset status */
2741 return omap_cm_wait_module_ready(oh->clkdm->prcm_partition,
2743 oh->prcm.omap4.clkctrl_offs, 0);
2747 * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2748 * @oh: struct omap_hwmod * to assert hardreset
2749 * @ohri: hardreset line data
2751 * Call omap2_prm_assert_hardreset() with parameters extracted from
2752 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2753 * use as an soc_ops function pointer. Passes along the return value
2754 * from omap2_prm_assert_hardreset(). XXX This function is scheduled
2755 * for removal when the PRM code is moved into drivers/.
2757 static int _omap2_assert_hardreset(struct omap_hwmod *oh,
2758 struct omap_hwmod_rst_info *ohri)
2760 return omap_prm_assert_hardreset(ohri->rst_shift, 0,
2761 oh->prcm.omap2.module_offs, 0);
2765 * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2766 * @oh: struct omap_hwmod * to deassert hardreset
2767 * @ohri: hardreset line data
2769 * Call omap2_prm_deassert_hardreset() with parameters extracted from
2770 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2771 * use as an soc_ops function pointer. Passes along the return value
2772 * from omap2_prm_deassert_hardreset(). XXX This function is
2773 * scheduled for removal when the PRM code is moved into drivers/.
2775 static int _omap2_deassert_hardreset(struct omap_hwmod *oh,
2776 struct omap_hwmod_rst_info *ohri)
2778 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift, 0,
2779 oh->prcm.omap2.module_offs, 0, 0);
2783 * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args
2784 * @oh: struct omap_hwmod * to test hardreset
2785 * @ohri: hardreset line data
2787 * Call omap2_prm_is_hardreset_asserted() with parameters extracted
2788 * from the hwmod @oh and the hardreset line data @ohri. Only
2789 * intended for use as an soc_ops function pointer. Passes along the
2790 * return value from omap2_prm_is_hardreset_asserted(). XXX This
2791 * function is scheduled for removal when the PRM code is moved into
2794 static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh,
2795 struct omap_hwmod_rst_info *ohri)
2797 return omap_prm_is_hardreset_asserted(ohri->st_shift, 0,
2798 oh->prcm.omap2.module_offs, 0);
2802 * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2803 * @oh: struct omap_hwmod * to assert hardreset
2804 * @ohri: hardreset line data
2806 * Call omap4_prminst_assert_hardreset() with parameters extracted
2807 * from the hwmod @oh and the hardreset line data @ohri. Only
2808 * intended for use as an soc_ops function pointer. Passes along the
2809 * return value from omap4_prminst_assert_hardreset(). XXX This
2810 * function is scheduled for removal when the PRM code is moved into
2813 static int _omap4_assert_hardreset(struct omap_hwmod *oh,
2814 struct omap_hwmod_rst_info *ohri)
2819 return omap_prm_assert_hardreset(ohri->rst_shift,
2820 oh->clkdm->pwrdm.ptr->prcm_partition,
2821 oh->clkdm->pwrdm.ptr->prcm_offs,
2822 oh->prcm.omap4.rstctrl_offs);
2826 * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2827 * @oh: struct omap_hwmod * to deassert hardreset
2828 * @ohri: hardreset line data
2830 * Call omap4_prminst_deassert_hardreset() with parameters extracted
2831 * from the hwmod @oh and the hardreset line data @ohri. Only
2832 * intended for use as an soc_ops function pointer. Passes along the
2833 * return value from omap4_prminst_deassert_hardreset(). XXX This
2834 * function is scheduled for removal when the PRM code is moved into
2837 static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
2838 struct omap_hwmod_rst_info *ohri)
2844 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
2845 oh->name, ohri->name);
2846 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->rst_shift,
2847 oh->clkdm->pwrdm.ptr->prcm_partition,
2848 oh->clkdm->pwrdm.ptr->prcm_offs,
2849 oh->prcm.omap4.rstctrl_offs,
2850 oh->prcm.omap4.rstctrl_offs +
2851 OMAP4_RST_CTRL_ST_OFFSET);
2855 * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args
2856 * @oh: struct omap_hwmod * to test hardreset
2857 * @ohri: hardreset line data
2859 * Call omap4_prminst_is_hardreset_asserted() with parameters
2860 * extracted from the hwmod @oh and the hardreset line data @ohri.
2861 * Only intended for use as an soc_ops function pointer. Passes along
2862 * the return value from omap4_prminst_is_hardreset_asserted(). XXX
2863 * This function is scheduled for removal when the PRM code is moved
2866 static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
2867 struct omap_hwmod_rst_info *ohri)
2872 return omap_prm_is_hardreset_asserted(ohri->rst_shift,
2873 oh->clkdm->pwrdm.ptr->
2875 oh->clkdm->pwrdm.ptr->prcm_offs,
2876 oh->prcm.omap4.rstctrl_offs);
2880 * _omap4_disable_direct_prcm - disable direct PRCM control for hwmod
2881 * @oh: struct omap_hwmod * to disable control for
2883 * Disables direct PRCM clkctrl done by hwmod core. Instead, the hwmod
2884 * will be using its main_clk to enable/disable the module. Returns
2887 static int _omap4_disable_direct_prcm(struct omap_hwmod *oh)
2892 oh->prcm.omap4.flags |= HWMOD_OMAP4_CLKFWK_CLKCTR_CLOCK;
2898 * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args
2899 * @oh: struct omap_hwmod * to deassert hardreset
2900 * @ohri: hardreset line data
2902 * Call am33xx_prminst_deassert_hardreset() with parameters extracted
2903 * from the hwmod @oh and the hardreset line data @ohri. Only
2904 * intended for use as an soc_ops function pointer. Passes along the
2905 * return value from am33xx_prminst_deassert_hardreset(). XXX This
2906 * function is scheduled for removal when the PRM code is moved into
2909 static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
2910 struct omap_hwmod_rst_info *ohri)
2912 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift,
2913 oh->clkdm->pwrdm.ptr->prcm_partition,
2914 oh->clkdm->pwrdm.ptr->prcm_offs,
2915 oh->prcm.omap4.rstctrl_offs,
2916 oh->prcm.omap4.rstst_offs);
2919 /* Public functions */
2921 u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
2923 if (oh->flags & HWMOD_16BIT_REG)
2924 return readw_relaxed(oh->_mpu_rt_va + reg_offs);
2926 return readl_relaxed(oh->_mpu_rt_va + reg_offs);
2929 void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
2931 if (oh->flags & HWMOD_16BIT_REG)
2932 writew_relaxed(v, oh->_mpu_rt_va + reg_offs);
2934 writel_relaxed(v, oh->_mpu_rt_va + reg_offs);
2938 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
2939 * @oh: struct omap_hwmod *
2941 * This is a public function exposed to drivers. Some drivers may need to do
2942 * some settings before and after resetting the device. Those drivers after
2943 * doing the necessary settings could use this function to start a reset by
2944 * setting the SYSCONFIG.SOFTRESET bit.
2946 int omap_hwmod_softreset(struct omap_hwmod *oh)
2951 if (!oh || !(oh->_sysc_cache))
2954 v = oh->_sysc_cache;
2955 ret = _set_softreset(oh, &v);
2958 _write_sysconfig(v, oh);
2960 ret = _clear_softreset(oh, &v);
2963 _write_sysconfig(v, oh);
2970 * omap_hwmod_lookup - look up a registered omap_hwmod by name
2971 * @name: name of the omap_hwmod to look up
2973 * Given a @name of an omap_hwmod, return a pointer to the registered
2974 * struct omap_hwmod *, or NULL upon error.
2976 struct omap_hwmod *omap_hwmod_lookup(const char *name)
2978 struct omap_hwmod *oh;
2989 * omap_hwmod_for_each - call function for each registered omap_hwmod
2990 * @fn: pointer to a callback function
2991 * @data: void * data to pass to callback function
2993 * Call @fn for each registered omap_hwmod, passing @data to each
2994 * function. @fn must return 0 for success or any other value for
2995 * failure. If @fn returns non-zero, the iteration across omap_hwmods
2996 * will stop and the non-zero return value will be passed to the
2997 * caller of omap_hwmod_for_each(). @fn is called with
2998 * omap_hwmod_for_each() held.
3000 int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
3003 struct omap_hwmod *temp_oh;
3009 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3010 ret = (*fn)(temp_oh, data);
3019 * omap_hwmod_register_links - register an array of hwmod links
3020 * @ois: pointer to an array of omap_hwmod_ocp_if to register
3022 * Intended to be called early in boot before the clock framework is
3023 * initialized. If @ois is not null, will register all omap_hwmods
3024 * listed in @ois that are valid for this chip. Returns -EINVAL if
3025 * omap_hwmod_init() hasn't been called before calling this function,
3026 * -ENOMEM if the link memory area can't be allocated, or 0 upon
3029 int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
3039 if (ois[0] == NULL) /* Empty list */
3044 r = _register_link(ois[i]);
3045 WARN(r && r != -EEXIST,
3046 "omap_hwmod: _register_link(%s -> %s) returned %d\n",
3047 ois[i]->master->name, ois[i]->slave->name, r);
3054 * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
3055 * @oh: pointer to the hwmod currently being set up (usually not the MPU)
3057 * If the hwmod data corresponding to the MPU subsystem IP block
3058 * hasn't been initialized and set up yet, do so now. This must be
3059 * done first since sleep dependencies may be added from other hwmods
3060 * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
3063 static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
3065 if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
3066 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
3067 __func__, MPU_INITIATOR_NAME);
3068 else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
3069 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
3073 * omap_hwmod_setup_one - set up a single hwmod
3074 * @oh_name: const char * name of the already-registered hwmod to set up
3076 * Initialize and set up a single hwmod. Intended to be used for a
3077 * small number of early devices, such as the timer IP blocks used for
3078 * the scheduler clock. Must be called after omap2_clk_init().
3079 * Resolves the struct clk names to struct clk pointers for each
3080 * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
3081 * -EINVAL upon error or 0 upon success.
3083 int __init omap_hwmod_setup_one(const char *oh_name)
3085 struct omap_hwmod *oh;
3087 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
3089 oh = _lookup(oh_name);
3091 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
3095 _ensure_mpu_hwmod_is_setup(oh);
3103 static void omap_hwmod_check_one(struct device *dev,
3104 const char *name, s8 v1, u8 v2)
3110 dev_warn(dev, "%s %d != %d\n", name, v1, v2);
3114 * omap_hwmod_check_sysc - check sysc against platform sysc
3115 * @dev: struct device
3116 * @data: module data
3117 * @sysc_fields: new sysc configuration
3119 static int omap_hwmod_check_sysc(struct device *dev,
3120 const struct ti_sysc_module_data *data,
3121 struct sysc_regbits *sysc_fields)
3123 const struct sysc_regbits *regbits = data->cap->regbits;
3125 omap_hwmod_check_one(dev, "dmadisable_shift",
3126 regbits->dmadisable_shift,
3127 sysc_fields->dmadisable_shift);
3128 omap_hwmod_check_one(dev, "midle_shift",
3129 regbits->midle_shift,
3130 sysc_fields->midle_shift);
3131 omap_hwmod_check_one(dev, "sidle_shift",
3132 regbits->sidle_shift,
3133 sysc_fields->sidle_shift);
3134 omap_hwmod_check_one(dev, "clkact_shift",
3135 regbits->clkact_shift,
3136 sysc_fields->clkact_shift);
3137 omap_hwmod_check_one(dev, "enwkup_shift",
3138 regbits->enwkup_shift,
3139 sysc_fields->enwkup_shift);
3140 omap_hwmod_check_one(dev, "srst_shift",
3141 regbits->srst_shift,
3142 sysc_fields->srst_shift);
3143 omap_hwmod_check_one(dev, "autoidle_shift",
3144 regbits->autoidle_shift,
3145 sysc_fields->autoidle_shift);
3151 * omap_hwmod_init_regbits - init sysconfig specific register bits
3152 * @dev: struct device
3154 * @data: module data
3155 * @sysc_fields: new sysc configuration
3157 static int omap_hwmod_init_regbits(struct device *dev, struct omap_hwmod *oh,
3158 const struct ti_sysc_module_data *data,
3159 struct sysc_regbits **sysc_fields)
3161 switch (data->cap->type) {
3163 case TI_SYSC_OMAP2_TIMER:
3164 *sysc_fields = &omap_hwmod_sysc_type1;
3166 case TI_SYSC_OMAP3_SHAM:
3167 *sysc_fields = &omap3_sham_sysc_fields;
3169 case TI_SYSC_OMAP3_AES:
3170 *sysc_fields = &omap3xxx_aes_sysc_fields;
3173 case TI_SYSC_OMAP4_TIMER:
3174 *sysc_fields = &omap_hwmod_sysc_type2;
3176 case TI_SYSC_OMAP4_SIMPLE:
3177 *sysc_fields = &omap_hwmod_sysc_type3;
3179 case TI_SYSC_OMAP34XX_SR:
3180 *sysc_fields = &omap34xx_sr_sysc_fields;
3182 case TI_SYSC_OMAP36XX_SR:
3183 *sysc_fields = &omap36xx_sr_sysc_fields;
3185 case TI_SYSC_OMAP4_SR:
3186 *sysc_fields = &omap36xx_sr_sysc_fields;
3188 case TI_SYSC_OMAP4_MCASP:
3189 *sysc_fields = &omap_hwmod_sysc_type_mcasp;
3191 case TI_SYSC_OMAP4_USB_HOST_FS:
3192 *sysc_fields = &omap_hwmod_sysc_type_usb_host_fs;
3195 *sysc_fields = NULL;
3196 if (!oh->class->sysc->sysc_fields)
3199 dev_err(dev, "sysc_fields not found\n");
3204 return omap_hwmod_check_sysc(dev, data, *sysc_fields);
3208 * omap_hwmod_init_reg_offs - initialize sysconfig register offsets
3209 * @dev: struct device
3210 * @data: module data
3211 * @rev_offs: revision register offset
3212 * @sysc_offs: sysc register offset
3213 * @syss_offs: syss register offset
3215 static int omap_hwmod_init_reg_offs(struct device *dev,
3216 const struct ti_sysc_module_data *data,
3217 s32 *rev_offs, s32 *sysc_offs,
3220 *rev_offs = -ENODEV;
3224 if (data->offsets[SYSC_REVISION] >= 0)
3225 *rev_offs = data->offsets[SYSC_REVISION];
3227 if (data->offsets[SYSC_SYSCONFIG] >= 0)
3228 *sysc_offs = data->offsets[SYSC_SYSCONFIG];
3230 if (data->offsets[SYSC_SYSSTATUS] >= 0)
3231 *syss_offs = data->offsets[SYSC_SYSSTATUS];
3237 * omap_hwmod_init_sysc_flags - initialize sysconfig features
3238 * @dev: struct device
3239 * @data: module data
3240 * @sysc_flags: module configuration
3242 static int omap_hwmod_init_sysc_flags(struct device *dev,
3243 const struct ti_sysc_module_data *data,
3248 switch (data->cap->type) {
3250 case TI_SYSC_OMAP2_TIMER:
3251 /* See SYSC_OMAP2_* in include/dt-bindings/bus/ti-sysc.h */
3252 if (data->cfg->sysc_val & SYSC_OMAP2_CLOCKACTIVITY)
3253 *sysc_flags |= SYSC_HAS_CLOCKACTIVITY;
3254 if (data->cfg->sysc_val & SYSC_OMAP2_EMUFREE)
3255 *sysc_flags |= SYSC_HAS_EMUFREE;
3256 if (data->cfg->sysc_val & SYSC_OMAP2_ENAWAKEUP)
3257 *sysc_flags |= SYSC_HAS_ENAWAKEUP;
3258 if (data->cfg->sysc_val & SYSC_OMAP2_SOFTRESET)
3259 *sysc_flags |= SYSC_HAS_SOFTRESET;
3260 if (data->cfg->sysc_val & SYSC_OMAP2_AUTOIDLE)
3261 *sysc_flags |= SYSC_HAS_AUTOIDLE;
3264 case TI_SYSC_OMAP4_TIMER:
3265 /* See SYSC_OMAP4_* in include/dt-bindings/bus/ti-sysc.h */
3266 if (data->cfg->sysc_val & SYSC_OMAP4_DMADISABLE)
3267 *sysc_flags |= SYSC_HAS_DMADISABLE;
3268 if (data->cfg->sysc_val & SYSC_OMAP4_FREEEMU)
3269 *sysc_flags |= SYSC_HAS_EMUFREE;
3270 if (data->cfg->sysc_val & SYSC_OMAP4_SOFTRESET)
3271 *sysc_flags |= SYSC_HAS_SOFTRESET;
3273 case TI_SYSC_OMAP34XX_SR:
3274 case TI_SYSC_OMAP36XX_SR:
3275 /* See SYSC_OMAP3_SR_* in include/dt-bindings/bus/ti-sysc.h */
3276 if (data->cfg->sysc_val & SYSC_OMAP3_SR_ENAWAKEUP)
3277 *sysc_flags |= SYSC_HAS_ENAWAKEUP;
3280 if (data->cap->regbits->emufree_shift >= 0)
3281 *sysc_flags |= SYSC_HAS_EMUFREE;
3282 if (data->cap->regbits->enwkup_shift >= 0)
3283 *sysc_flags |= SYSC_HAS_ENAWAKEUP;
3284 if (data->cap->regbits->srst_shift >= 0)
3285 *sysc_flags |= SYSC_HAS_SOFTRESET;
3286 if (data->cap->regbits->autoidle_shift >= 0)
3287 *sysc_flags |= SYSC_HAS_AUTOIDLE;
3291 if (data->cap->regbits->midle_shift >= 0 &&
3292 data->cfg->midlemodes)
3293 *sysc_flags |= SYSC_HAS_MIDLEMODE;
3295 if (data->cap->regbits->sidle_shift >= 0 &&
3296 data->cfg->sidlemodes)
3297 *sysc_flags |= SYSC_HAS_SIDLEMODE;
3299 if (data->cfg->quirks & SYSC_QUIRK_UNCACHED)
3300 *sysc_flags |= SYSC_NO_CACHE;
3301 if (data->cfg->quirks & SYSC_QUIRK_RESET_STATUS)
3302 *sysc_flags |= SYSC_HAS_RESET_STATUS;
3304 if (data->cfg->syss_mask & 1)
3305 *sysc_flags |= SYSS_HAS_RESET_STATUS;
3311 * omap_hwmod_init_idlemodes - initialize module idle modes
3312 * @dev: struct device
3313 * @data: module data
3314 * @idlemodes: module supported idle modes
3316 static int omap_hwmod_init_idlemodes(struct device *dev,
3317 const struct ti_sysc_module_data *data,
3322 if (data->cfg->midlemodes & BIT(SYSC_IDLE_FORCE))
3323 *idlemodes |= MSTANDBY_FORCE;
3324 if (data->cfg->midlemodes & BIT(SYSC_IDLE_NO))
3325 *idlemodes |= MSTANDBY_NO;
3326 if (data->cfg->midlemodes & BIT(SYSC_IDLE_SMART))
3327 *idlemodes |= MSTANDBY_SMART;
3328 if (data->cfg->midlemodes & BIT(SYSC_IDLE_SMART_WKUP))
3329 *idlemodes |= MSTANDBY_SMART_WKUP;
3331 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_FORCE))
3332 *idlemodes |= SIDLE_FORCE;
3333 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_NO))
3334 *idlemodes |= SIDLE_NO;
3335 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_SMART))
3336 *idlemodes |= SIDLE_SMART;
3337 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_SMART_WKUP))
3338 *idlemodes |= SIDLE_SMART_WKUP;
3344 * omap_hwmod_check_module - check new module against platform data
3345 * @dev: struct device
3347 * @data: new module data
3348 * @sysc_fields: sysc register bits
3349 * @rev_offs: revision register offset
3350 * @sysc_offs: sysconfig register offset
3351 * @syss_offs: sysstatus register offset
3352 * @sysc_flags: sysc specific flags
3353 * @idlemodes: sysc supported idlemodes
3355 static int omap_hwmod_check_module(struct device *dev,
3356 struct omap_hwmod *oh,
3357 const struct ti_sysc_module_data *data,
3358 struct sysc_regbits *sysc_fields,
3359 s32 rev_offs, s32 sysc_offs,
3360 s32 syss_offs, u32 sysc_flags,
3363 if (!oh->class->sysc)
3366 if (oh->class->sysc->sysc_fields &&
3367 sysc_fields != oh->class->sysc->sysc_fields)
3368 dev_warn(dev, "sysc_fields mismatch\n");
3370 if (rev_offs != oh->class->sysc->rev_offs)
3371 dev_warn(dev, "rev_offs %08x != %08x\n", rev_offs,
3372 oh->class->sysc->rev_offs);
3373 if (sysc_offs != oh->class->sysc->sysc_offs)
3374 dev_warn(dev, "sysc_offs %08x != %08x\n", sysc_offs,
3375 oh->class->sysc->sysc_offs);
3376 if (syss_offs != oh->class->sysc->syss_offs)
3377 dev_warn(dev, "syss_offs %08x != %08x\n", syss_offs,
3378 oh->class->sysc->syss_offs);
3380 if (sysc_flags != oh->class->sysc->sysc_flags)
3381 dev_warn(dev, "sysc_flags %08x != %08x\n", sysc_flags,
3382 oh->class->sysc->sysc_flags);
3384 if (idlemodes != oh->class->sysc->idlemodes)
3385 dev_warn(dev, "idlemodes %08x != %08x\n", idlemodes,
3386 oh->class->sysc->idlemodes);
3388 if (data->cfg->srst_udelay != oh->class->sysc->srst_udelay)
3389 dev_warn(dev, "srst_udelay %i != %i\n",
3390 data->cfg->srst_udelay,
3391 oh->class->sysc->srst_udelay);
3397 * omap_hwmod_allocate_module - allocate new module
3398 * @dev: struct device
3400 * @sysc_fields: sysc register bits
3401 * @clockdomain: clockdomain
3402 * @rev_offs: revision register offset
3403 * @sysc_offs: sysconfig register offset
3404 * @syss_offs: sysstatus register offset
3405 * @sysc_flags: sysc specific flags
3406 * @idlemodes: sysc supported idlemodes
3408 * Note that the allocations here cannot use devm as ti-sysc can rebind.
3410 static int omap_hwmod_allocate_module(struct device *dev, struct omap_hwmod *oh,
3411 const struct ti_sysc_module_data *data,
3412 struct sysc_regbits *sysc_fields,
3413 struct clockdomain *clkdm,
3414 s32 rev_offs, s32 sysc_offs,
3415 s32 syss_offs, u32 sysc_flags,
3418 struct omap_hwmod_class_sysconfig *sysc;
3419 struct omap_hwmod_class *class = NULL;
3420 struct omap_hwmod_ocp_if *oi = NULL;
3421 void __iomem *regs = NULL;
3422 unsigned long flags;
3424 sysc = kzalloc(sizeof(*sysc), GFP_KERNEL);
3428 sysc->sysc_fields = sysc_fields;
3429 sysc->rev_offs = rev_offs;
3430 sysc->sysc_offs = sysc_offs;
3431 sysc->syss_offs = syss_offs;
3432 sysc->sysc_flags = sysc_flags;
3433 sysc->idlemodes = idlemodes;
3434 sysc->srst_udelay = data->cfg->srst_udelay;
3436 if (!oh->_mpu_rt_va) {
3437 regs = ioremap(data->module_pa,
3444 * We may need a new oh->class as the other devices in the same class
3445 * may not yet have ioremapped their registers.
3447 if (oh->class->name && strcmp(oh->class->name, data->name)) {
3448 class = kmemdup(oh->class, sizeof(*oh->class), GFP_KERNEL);
3453 if (list_empty(&oh->slave_ports)) {
3454 oi = kcalloc(1, sizeof(*oi), GFP_KERNEL);
3456 goto out_free_class;
3459 * Note that we assume interconnect interface clocks will be
3460 * managed by the interconnect driver for OCPIF_SWSUP_IDLE case
3461 * on omap24xx and omap3.
3464 oi->user = OCP_USER_MPU | OCP_USER_SDMA;
3467 spin_lock_irqsave(&oh->_lock, flags);
3469 oh->_mpu_rt_va = regs;
3472 oh->class->sysc = sysc;
3477 oh->_state = _HWMOD_STATE_INITIALIZED;
3478 oh->_postsetup_state = _HWMOD_STATE_DEFAULT;
3480 spin_unlock_irqrestore(&oh->_lock, flags);
3493 static const struct omap_hwmod_reset omap24xx_reset_quirks[] = {
3494 { .match = "msdi", .len = 4, .reset = omap_msdi_reset, },
3497 static const struct omap_hwmod_reset dra7_reset_quirks[] = {
3498 { .match = "pcie", .len = 4, .reset = dra7xx_pciess_reset, },
3501 static const struct omap_hwmod_reset omap_reset_quirks[] = {
3502 { .match = "dss_core", .len = 8, .reset = omap_dss_reset, },
3503 { .match = "hdq1w", .len = 5, .reset = omap_hdq1w_reset, },
3504 { .match = "i2c", .len = 3, .reset = omap_i2c_reset, },
3505 { .match = "wd_timer", .len = 8, .reset = omap2_wd_timer_reset, },
3509 omap_hwmod_init_reset_quirk(struct device *dev, struct omap_hwmod *oh,
3510 const struct ti_sysc_module_data *data,
3511 const struct omap_hwmod_reset *quirks,
3514 const struct omap_hwmod_reset *quirk;
3517 for (i = 0; i < quirks_sz; i++) {
3519 if (!strncmp(data->name, quirk->match, quirk->len)) {
3520 oh->class->reset = quirk->reset;
3528 omap_hwmod_init_reset_quirks(struct device *dev, struct omap_hwmod *oh,
3529 const struct ti_sysc_module_data *data)
3531 if (soc_is_omap24xx())
3532 omap_hwmod_init_reset_quirk(dev, oh, data,
3533 omap24xx_reset_quirks,
3534 ARRAY_SIZE(omap24xx_reset_quirks));
3536 if (soc_is_dra7xx())
3537 omap_hwmod_init_reset_quirk(dev, oh, data, dra7_reset_quirks,
3538 ARRAY_SIZE(dra7_reset_quirks));
3540 omap_hwmod_init_reset_quirk(dev, oh, data, omap_reset_quirks,
3541 ARRAY_SIZE(omap_reset_quirks));
3545 * omap_hwmod_init_module - initialize new module
3546 * @dev: struct device
3547 * @data: module data
3548 * @cookie: cookie for the caller to use for later calls
3550 int omap_hwmod_init_module(struct device *dev,
3551 const struct ti_sysc_module_data *data,
3552 struct ti_sysc_cookie *cookie)
3554 struct omap_hwmod *oh;
3555 struct sysc_regbits *sysc_fields;
3556 s32 rev_offs, sysc_offs, syss_offs;
3557 u32 sysc_flags, idlemodes;
3560 if (!dev || !data || !data->name || !cookie)
3563 oh = _lookup(data->name);
3565 oh = kzalloc(sizeof(*oh), GFP_KERNEL);
3569 oh->name = data->name;
3570 oh->_state = _HWMOD_STATE_UNKNOWN;
3571 lockdep_register_key(&oh->hwmod_key);
3573 /* Unused, can be handled by PRM driver handling resets */
3574 oh->prcm.omap4.flags = HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT;
3576 oh->class = kzalloc(sizeof(*oh->class), GFP_KERNEL);
3582 omap_hwmod_init_reset_quirks(dev, oh, data);
3584 oh->class->name = data->name;
3585 mutex_lock(&list_lock);
3586 error = _register(oh);
3587 mutex_unlock(&list_lock);
3592 error = omap_hwmod_init_regbits(dev, oh, data, &sysc_fields);
3596 error = omap_hwmod_init_reg_offs(dev, data, &rev_offs,
3597 &sysc_offs, &syss_offs);
3601 error = omap_hwmod_init_sysc_flags(dev, data, &sysc_flags);
3605 error = omap_hwmod_init_idlemodes(dev, data, &idlemodes);
3609 if (data->cfg->quirks & SYSC_QUIRK_NO_IDLE)
3610 oh->flags |= HWMOD_NO_IDLE;
3611 if (data->cfg->quirks & SYSC_QUIRK_NO_IDLE_ON_INIT)
3612 oh->flags |= HWMOD_INIT_NO_IDLE;
3613 if (data->cfg->quirks & SYSC_QUIRK_NO_RESET_ON_INIT)
3614 oh->flags |= HWMOD_INIT_NO_RESET;
3615 if (data->cfg->quirks & SYSC_QUIRK_USE_CLOCKACT)
3616 oh->flags |= HWMOD_SET_DEFAULT_CLOCKACT;
3617 if (data->cfg->quirks & SYSC_QUIRK_SWSUP_SIDLE)
3618 oh->flags |= HWMOD_SWSUP_SIDLE;
3619 if (data->cfg->quirks & SYSC_QUIRK_SWSUP_SIDLE_ACT)
3620 oh->flags |= HWMOD_SWSUP_SIDLE_ACT;
3621 if (data->cfg->quirks & SYSC_QUIRK_SWSUP_MSTANDBY)
3622 oh->flags |= HWMOD_SWSUP_MSTANDBY;
3623 if (data->cfg->quirks & SYSC_QUIRK_CLKDM_NOAUTO)
3624 oh->flags |= HWMOD_CLKDM_NOAUTO;
3626 error = omap_hwmod_check_module(dev, oh, data, sysc_fields,
3627 rev_offs, sysc_offs, syss_offs,
3628 sysc_flags, idlemodes);
3632 return omap_hwmod_allocate_module(dev, oh, data, sysc_fields,
3633 cookie->clkdm, rev_offs,
3634 sysc_offs, syss_offs,
3635 sysc_flags, idlemodes);
3639 * omap_hwmod_setup_earlycon_flags - set up flags for early console
3641 * Enable DEBUG_OMAPUART_FLAGS for uart hwmod that is being used as
3642 * early concole so that hwmod core doesn't reset and keep it in idle
3643 * that specific uart.
3645 #ifdef CONFIG_SERIAL_EARLYCON
3646 static void __init omap_hwmod_setup_earlycon_flags(void)
3648 struct device_node *np;
3649 struct omap_hwmod *oh;
3652 np = of_find_node_by_path("/chosen");
3654 uart = of_get_property(np, "stdout-path", NULL);
3656 np = of_find_node_by_path(uart);
3658 uart = of_get_property(np, "ti,hwmods", NULL);
3659 oh = omap_hwmod_lookup(uart);
3661 uart = of_get_property(np->parent,
3664 oh = omap_hwmod_lookup(uart);
3667 oh->flags |= DEBUG_OMAPUART_FLAGS;
3675 * omap_hwmod_setup_all - set up all registered IP blocks
3677 * Initialize and set up all IP blocks registered with the hwmod code.
3678 * Must be called after omap2_clk_init(). Resolves the struct clk
3679 * names to struct clk pointers for each registered omap_hwmod. Also
3680 * calls _setup() on each hwmod. Returns 0 upon success.
3682 static int __init omap_hwmod_setup_all(void)
3684 _ensure_mpu_hwmod_is_setup(NULL);
3686 omap_hwmod_for_each(_init, NULL);
3687 #ifdef CONFIG_SERIAL_EARLYCON
3688 omap_hwmod_setup_earlycon_flags();
3690 omap_hwmod_for_each(_setup, NULL);
3694 omap_postcore_initcall(omap_hwmod_setup_all);
3697 * omap_hwmod_enable - enable an omap_hwmod
3698 * @oh: struct omap_hwmod *
3700 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
3701 * Returns -EINVAL on error or passes along the return value from _enable().
3703 int omap_hwmod_enable(struct omap_hwmod *oh)
3706 unsigned long flags;
3711 spin_lock_irqsave(&oh->_lock, flags);
3713 spin_unlock_irqrestore(&oh->_lock, flags);
3719 * omap_hwmod_idle - idle an omap_hwmod
3720 * @oh: struct omap_hwmod *
3722 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
3723 * Returns -EINVAL on error or passes along the return value from _idle().
3725 int omap_hwmod_idle(struct omap_hwmod *oh)
3728 unsigned long flags;
3733 spin_lock_irqsave(&oh->_lock, flags);
3735 spin_unlock_irqrestore(&oh->_lock, flags);
3741 * omap_hwmod_shutdown - shutdown an omap_hwmod
3742 * @oh: struct omap_hwmod *
3744 * Shutdown an omap_hwmod @oh. Intended to be called by
3745 * omap_device_shutdown(). Returns -EINVAL on error or passes along
3746 * the return value from _shutdown().
3748 int omap_hwmod_shutdown(struct omap_hwmod *oh)
3751 unsigned long flags;
3756 spin_lock_irqsave(&oh->_lock, flags);
3758 spin_unlock_irqrestore(&oh->_lock, flags);
3764 * IP block data retrieval functions
3768 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
3769 * @oh: struct omap_hwmod *
3771 * Return the powerdomain pointer associated with the OMAP module
3772 * @oh's main clock. If @oh does not have a main clk, return the
3773 * powerdomain associated with the interface clock associated with the
3774 * module's MPU port. (XXX Perhaps this should use the SDMA port
3775 * instead?) Returns NULL on error, or a struct powerdomain * on
3778 struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
3781 struct omap_hwmod_ocp_if *oi;
3782 struct clockdomain *clkdm;
3783 struct clk_hw_omap *clk;
3790 return oh->clkdm->pwrdm.ptr;
3795 oi = _find_mpu_rt_port(oh);
3801 hw = __clk_get_hw(c);
3805 clk = to_clk_hw_omap(hw);
3813 return clkdm->pwrdm.ptr;
3817 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
3818 * @oh: struct omap_hwmod *
3820 * Returns the virtual address corresponding to the beginning of the
3821 * module's register target, in the address range that is intended to
3822 * be used by the MPU. Returns the virtual address upon success or NULL
3825 void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
3830 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
3833 if (oh->_state == _HWMOD_STATE_UNKNOWN)
3836 return oh->_mpu_rt_va;
3840 * XXX what about functions for drivers to save/restore ocp_sysconfig
3841 * for context save/restore operations?
3845 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
3846 * contained in the hwmod module.
3847 * @oh: struct omap_hwmod *
3848 * @name: name of the reset line to lookup and assert
3850 * Some IP like dsp, ipu or iva contain processor that require
3851 * an HW reset line to be assert / deassert in order to enable fully
3852 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3853 * yet supported on this OMAP; otherwise, passes along the return value
3854 * from _assert_hardreset().
3856 int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
3859 unsigned long flags;
3864 spin_lock_irqsave(&oh->_lock, flags);
3865 ret = _assert_hardreset(oh, name);
3866 spin_unlock_irqrestore(&oh->_lock, flags);
3872 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
3873 * contained in the hwmod module.
3874 * @oh: struct omap_hwmod *
3875 * @name: name of the reset line to look up and deassert
3877 * Some IP like dsp, ipu or iva contain processor that require
3878 * an HW reset line to be assert / deassert in order to enable fully
3879 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3880 * yet supported on this OMAP; otherwise, passes along the return value
3881 * from _deassert_hardreset().
3883 int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
3886 unsigned long flags;
3891 spin_lock_irqsave(&oh->_lock, flags);
3892 ret = _deassert_hardreset(oh, name);
3893 spin_unlock_irqrestore(&oh->_lock, flags);
3899 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
3900 * @classname: struct omap_hwmod_class name to search for
3901 * @fn: callback function pointer to call for each hwmod in class @classname
3902 * @user: arbitrary context data to pass to the callback function
3904 * For each omap_hwmod of class @classname, call @fn.
3905 * If the callback function returns something other than
3906 * zero, the iterator is terminated, and the callback function's return
3907 * value is passed back to the caller. Returns 0 upon success, -EINVAL
3908 * if @classname or @fn are NULL, or passes back the error code from @fn.
3910 int omap_hwmod_for_each_by_class(const char *classname,
3911 int (*fn)(struct omap_hwmod *oh,
3915 struct omap_hwmod *temp_oh;
3918 if (!classname || !fn)
3921 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
3922 __func__, classname);
3924 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3925 if (!strcmp(temp_oh->class->name, classname)) {
3926 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
3927 __func__, temp_oh->name);
3928 ret = (*fn)(temp_oh, user);
3935 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
3942 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
3943 * @oh: struct omap_hwmod *
3944 * @state: state that _setup() should leave the hwmod in
3946 * Sets the hwmod state that @oh will enter at the end of _setup()
3947 * (called by omap_hwmod_setup_*()). See also the documentation
3948 * for _setup_postsetup(), above. Returns 0 upon success or
3949 * -EINVAL if there is a problem with the arguments or if the hwmod is
3950 * in the wrong state.
3952 int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
3955 unsigned long flags;
3960 if (state != _HWMOD_STATE_DISABLED &&
3961 state != _HWMOD_STATE_ENABLED &&
3962 state != _HWMOD_STATE_IDLE)
3965 spin_lock_irqsave(&oh->_lock, flags);
3967 if (oh->_state != _HWMOD_STATE_REGISTERED) {
3972 oh->_postsetup_state = state;
3976 spin_unlock_irqrestore(&oh->_lock, flags);
3982 * omap_hwmod_get_context_loss_count - get lost context count
3983 * @oh: struct omap_hwmod *
3985 * Returns the context loss count of associated @oh
3986 * upon success, or zero if no context loss data is available.
3988 * On OMAP4, this queries the per-hwmod context loss register,
3989 * assuming one exists. If not, or on OMAP2/3, this queries the
3990 * enclosing powerdomain context loss count.
3992 int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
3994 struct powerdomain *pwrdm;
3997 if (soc_ops.get_context_lost)
3998 return soc_ops.get_context_lost(oh);
4000 pwrdm = omap_hwmod_get_pwrdm(oh);
4002 ret = pwrdm_get_context_loss_count(pwrdm);
4008 * omap_hwmod_init - initialize the hwmod code
4010 * Sets up some function pointers needed by the hwmod code to operate on the
4011 * currently-booted SoC. Intended to be called once during kernel init
4012 * before any hwmods are registered. No return value.
4014 void __init omap_hwmod_init(void)
4016 if (cpu_is_omap24xx()) {
4017 soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready;
4018 soc_ops.assert_hardreset = _omap2_assert_hardreset;
4019 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
4020 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
4021 } else if (cpu_is_omap34xx()) {
4022 soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready;
4023 soc_ops.assert_hardreset = _omap2_assert_hardreset;
4024 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
4025 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
4026 soc_ops.init_clkdm = _init_clkdm;
4027 } else if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx()) {
4028 soc_ops.enable_module = _omap4_enable_module;
4029 soc_ops.disable_module = _omap4_disable_module;
4030 soc_ops.wait_target_ready = _omap4_wait_target_ready;
4031 soc_ops.assert_hardreset = _omap4_assert_hardreset;
4032 soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
4033 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
4034 soc_ops.init_clkdm = _init_clkdm;
4035 soc_ops.update_context_lost = _omap4_update_context_lost;
4036 soc_ops.get_context_lost = _omap4_get_context_lost;
4037 soc_ops.disable_direct_prcm = _omap4_disable_direct_prcm;
4038 soc_ops.xlate_clkctrl = _omap4_xlate_clkctrl;
4039 } else if (cpu_is_ti814x() || cpu_is_ti816x() || soc_is_am33xx() ||
4041 soc_ops.enable_module = _omap4_enable_module;
4042 soc_ops.disable_module = _omap4_disable_module;
4043 soc_ops.wait_target_ready = _omap4_wait_target_ready;
4044 soc_ops.assert_hardreset = _omap4_assert_hardreset;
4045 soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
4046 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
4047 soc_ops.init_clkdm = _init_clkdm;
4048 soc_ops.disable_direct_prcm = _omap4_disable_direct_prcm;
4049 soc_ops.xlate_clkctrl = _omap4_xlate_clkctrl;
4051 WARN(1, "omap_hwmod: unknown SoC type\n");
4054 _init_clkctrl_providers();
4060 * omap_hwmod_get_main_clk - get pointer to main clock name
4061 * @oh: struct omap_hwmod *
4063 * Returns the main clock name assocated with @oh upon success,
4064 * or NULL if @oh is NULL.
4066 const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh)
4071 return oh->main_clk;