1 # SPDX-License-Identifier: GPL-2.0-only
2 menu "TI OMAP/AM/DM/DRA Family"
3 depends on ARCH_MULTI_V6 || ARCH_MULTI_V7
7 depends on ARCH_MULTI_V6
10 select SOC_HAS_OMAP2_SDRC
14 depends on ARCH_MULTI_V7
16 select ARM_CPU_SUSPEND if PM
17 select OMAP_INTERCONNECT
20 select SOC_HAS_OMAP2_SDRC
21 select ARM_ERRATA_430973
25 depends on ARCH_MULTI_V7
27 select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP
28 select ARM_CPU_SUSPEND if PM
29 select ARM_ERRATA_720789
31 select HAVE_ARM_SCU if SMP
32 select HAVE_ARM_TWD if SMP
33 select OMAP_INTERCONNECT
34 select OMAP_INTERCONNECT_BARRIER
35 select PL310_ERRATA_588369 if CACHE_L2X0
36 select PL310_ERRATA_727915 if CACHE_L2X0
39 select ARM_ERRATA_754322
40 select ARM_ERRATA_775420
41 select OMAP_INTERCONNECT
45 depends on ARCH_MULTI_V7
47 select ARM_CPU_SUSPEND if PM
49 select HAVE_ARM_SCU if SMP
50 select HAVE_ARM_ARCH_TIMER
51 select ARM_ERRATA_798181 if SMP
52 select OMAP_INTERCONNECT
53 select OMAP_INTERCONNECT_BARRIER
55 select ZONE_DMA if ARM_LPAE
59 depends on ARCH_MULTI_V7
61 select ARM_CPU_SUSPEND if PM
65 depends on ARCH_MULTI_V7
68 select MACH_OMAP_GENERIC
70 select GENERIC_CLOCKEVENTS_BROADCAST
72 select ARM_ERRATA_754322
73 select ARM_ERRATA_775420
74 select OMAP_INTERCONNECT
75 select ARM_CPU_SUSPEND if PM
79 depends on ARCH_MULTI_V7
81 select ARM_CPU_SUSPEND if PM
83 select HAVE_ARM_SCU if SMP
84 select HAVE_ARM_ARCH_TIMER
86 select ARM_ERRATA_798181 if SMP
87 select OMAP_INTERCONNECT
88 select OMAP_INTERCONNECT_BARRIER
90 select ZONE_DMA if ARM_LPAE
91 select PINCTRL_TI_IODELAY if OF && PINCTRL
95 select ARCH_HAS_BANDGAP
96 select ARCH_HAS_RESET_CONTROLLER
99 select GENERIC_IRQ_CHIP
101 select MACH_OMAP_GENERIC
107 select PM_GENERIC_DOMAINS if PM
108 select PM_GENERIC_DOMAINS_OF if PM
109 select RESET_CONTROLLER
115 Systems based on OMAP2, OMAP3, OMAP4 or OMAP5
117 config OMAP_INTERCONNECT_BARRIER
124 menu "TI OMAP2/3/4 Specific Features"
126 config ARCH_OMAP2PLUS_TYPICAL
127 bool "Typical OMAP configuration"
133 select MENELAUS if ARCH_OMAP2
134 select NEON if CPU_V7
137 select REGULATOR_FIXED_VOLTAGE
138 select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4
139 select TWL4030_POWER if ARCH_OMAP3 || ARCH_OMAP4
142 Compile a kernel suitable for booting most boards
144 config SOC_HAS_OMAP2_SDRC
145 bool "OMAP2 SDRAM Controller support"
147 config SOC_HAS_REALTIME_COUNTER
148 bool "Real time free running counter"
149 depends on SOC_OMAP5 || SOC_DRA7XX
152 comment "OMAP Core Type"
153 depends on ARCH_OMAP2
156 bool "OMAP2420 support"
157 depends on ARCH_OMAP2
160 select SOC_HAS_OMAP2_SDRC
163 bool "OMAP2430 support"
164 depends on ARCH_OMAP2
166 select SOC_HAS_OMAP2_SDRC
169 bool "OMAP3430 support"
170 depends on ARCH_OMAP3
172 select SOC_HAS_OMAP2_SDRC
175 bool "TI81XX support"
176 depends on ARCH_OMAP3
179 config OMAP_PACKAGE_CBC
182 config OMAP_PACKAGE_CBB
185 config OMAP_PACKAGE_CUS
188 config OMAP_PACKAGE_CBP
191 comment "OMAP Legacy Platform Data Board Type"
192 depends on ARCH_OMAP2PLUS
194 config MACH_OMAP_GENERIC
197 config MACH_OMAP2_TUSB6010
199 depends on ARCH_OMAP2 && SOC_OMAP2420
200 default y if MACH_NOKIA_N8X0
202 config MACH_OMAP3517EVM
203 bool "OMAP3517/ AM3517 EVM board"
204 depends on ARCH_OMAP3
207 config MACH_OMAP3_PANDORA
209 depends on ARCH_OMAP3
211 select OMAP_PACKAGE_CBB
213 config MACH_NOKIA_N810
216 config MACH_NOKIA_N810_WIMAX
219 config MACH_NOKIA_N8X0
220 bool "Nokia N800/N810"
221 depends on SOC_OMAP2420
223 select MACH_NOKIA_N810
224 select MACH_NOKIA_N810_WIMAX
226 config OMAP3_SDRC_AC_TIMING
227 bool "Enable SDRC AC timing register changes"
228 depends on ARCH_OMAP3
230 If you know that none of your system initiators will attempt to
231 access SDRAM during CORE DVFS, select Y here. This should boost
232 SDRAM performance at lower CORE OPPs. There are relatively few
233 users who will wish to say yes at this point - almost everyone will
234 wish to say no. Selecting yes without understanding what is
235 going on could result in system crashes;
241 config OMAP5_ERRATA_801819
242 bool "Errata 801819: An eviction from L1 data cache might stall indefinitely"
243 depends on SOC_OMAP5 || SOC_DRA7XX
245 A livelock can occur in the L2 cache arbitration that might prevent
246 a snoop from completing. Under certain conditions this can cause the