GNU Linux-libre 4.19.314-gnu1
[releases.git] / arch / arm / mach-omap1 / sram.S
1 /*
2  * linux/arch/arm/plat-omap/sram-fn.S
3  *
4  * Functions that need to be run in internal SRAM
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  */
10
11 #include <linux/linkage.h>
12
13 #include <asm/assembler.h>
14
15 #include <mach/hardware.h>
16
17 #include "iomap.h"
18
19         .text
20
21 /*
22  * Reprograms ULPD and CKCTL.
23  */
24         .align  3
25 ENTRY(omap1_sram_reprogram_clock)
26         stmfd   sp!, {r0 - r12, lr}             @ save registers on stack
27
28         mov     r2, #OMAP1_IO_ADDRESS(DPLL_CTL) & 0xff000000
29         orr     r2, r2, #OMAP1_IO_ADDRESS(DPLL_CTL) & 0x00ff0000
30         orr     r2, r2, #OMAP1_IO_ADDRESS(DPLL_CTL) & 0x0000ff00
31
32         mov     r3, #OMAP1_IO_ADDRESS(ARM_CKCTL) & 0xff000000
33         orr     r3, r3, #OMAP1_IO_ADDRESS(ARM_CKCTL) & 0x00ff0000
34         orr     r3, r3, #OMAP1_IO_ADDRESS(ARM_CKCTL) & 0x0000ff00
35
36         tst     r0, #1 << 4                     @ want lock mode?
37         beq     newck                           @ nope
38         bic     r0, r0, #1 << 4                 @ else clear lock bit
39         strh    r0, [r2]                        @ set dpll into bypass mode
40         orr     r0, r0, #1 << 4                 @ set lock bit again
41
42 newck:
43         strh    r1, [r3]                        @ write new ckctl value
44         strh    r0, [r2]                        @ write new dpll value
45
46         mov     r4, #0x0700                     @ let the clocks settle
47         orr     r4, r4, #0x00ff
48 delay:  sub     r4, r4, #1
49         cmp     r4, #0
50         bne     delay
51
52 lock:   ldrh    r4, [r2], #0                    @ read back dpll value
53         tst     r0, #1 << 4                     @ want lock mode?
54         beq     out                             @ nope
55         tst     r4, #1 << 0                     @ dpll rate locked?
56         beq     lock                            @ try again
57
58 out:
59         ldmfd   sp!, {r0 - r12, pc}             @ restore regs and return
60 ENTRY(omap1_sram_reprogram_clock_sz)
61         .word   . - omap1_sram_reprogram_clock