arch/arm/mach-omap1/serial.c

   1 /*
   2  * linux/arch/arm/mach-omap1/serial.c
   3  *
   4  * OMAP1 serial support.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10 #include <linux/gpio.h>
  11 #include <linux/module.h>
  12 #include <linux/kernel.h>
  13 #include <linux/init.h>
  14 #include <linux/irq.h>
  15 #include <linux/delay.h>
  16 #include <linux/serial.h>
  17 #include <linux/tty.h>
  18 #include <linux/serial_8250.h>
  19 #include <linux/serial_reg.h>
  20 #include <linux/clk.h>
  21 #include <linux/io.h>
  22
  23 #include <asm/mach-types.h>
  24
  25 #include <mach/mux.h>
  26
  27 #include "pm.h"
  28 #include "soc.h"
  29
  30 static struct clk * uart1_ck;
  31 static struct clk * uart2_ck;
  32 static struct clk * uart3_ck;
  33
  34 static inline unsigned int omap_serial_in(struct plat_serial8250_port *up,
  35                                           int offset)
  36 {
  37         offset <<= up->regshift;
  38         return (unsigned int)__raw_readb(up->membase + offset);
  39 }
  40
  41 static inline void omap_serial_outp(struct plat_serial8250_port *p, int offset,
  42                                     int value)
  43 {
  44         offset <<= p->regshift;
  45         __raw_writeb(value, p->membase + offset);
  46 }
  47
  48 /*
  49  * Internal UARTs need to be initialized for the 8250 autoconfig to work
  50  * properly. Note that the TX watermark initialization may not be needed
  51  * once the 8250.c watermark handling code is merged.
  52  */
  53 static void __init omap_serial_reset(struct plat_serial8250_port *p)
  54 {
  55         omap_serial_outp(p, UART_OMAP_MDR1,
  56                         UART_OMAP_MDR1_DISABLE);        /* disable UART */
  57         omap_serial_outp(p, UART_OMAP_SCR, 0x08);       /* TX watermark */
  58         omap_serial_outp(p, UART_OMAP_MDR1,
  59                         UART_OMAP_MDR1_16X_MODE);       /* enable UART */
  60
  61         if (!cpu_is_omap15xx()) {
  62                 omap_serial_outp(p, UART_OMAP_SYSC, 0x01);
  63                 while (!(omap_serial_in(p, UART_OMAP_SYSC) & 0x01));
  64         }
  65 }
  66
  67 static struct plat_serial8250_port serial_platform_data[] = {
  68         {
  69                 .mapbase        = OMAP1_UART1_BASE,
  70                 .irq            = INT_UART1,
  71                 .flags          = UPF_BOOT_AUTOCONF,
  72                 .iotype         = UPIO_MEM,
  73                 .regshift       = 2,
  74                 .uartclk        = OMAP16XX_BASE_BAUD * 16,
  75         },
  76         {
  77                 .mapbase        = OMAP1_UART2_BASE,
  78                 .irq            = INT_UART2,
  79                 .flags          = UPF_BOOT_AUTOCONF,
  80                 .iotype         = UPIO_MEM,
  81                 .regshift       = 2,
  82                 .uartclk        = OMAP16XX_BASE_BAUD * 16,
  83         },
  84         {
  85                 .mapbase        = OMAP1_UART3_BASE,
  86                 .irq            = INT_UART3,
  87                 .flags          = UPF_BOOT_AUTOCONF,
  88                 .iotype         = UPIO_MEM,
  89                 .regshift       = 2,
  90                 .uartclk        = OMAP16XX_BASE_BAUD * 16,
  91         },
  92         { },
  93 };
  94
  95 static struct platform_device serial_device = {
  96         .name                   = "serial8250",
  97         .id                     = PLAT8250_DEV_PLATFORM,
  98         .dev                    = {
  99                 .platform_data  = serial_platform_data,
 100         },
 101 };
 102
 103 /*
 104  * Note that on Innovator-1510 UART2 pins conflict with USB2.
 105  * By default UART2 does not work on Innovator-1510 if you have
 106  * USB OHCI enabled. To use UART2, you must disable USB2 first.
 107  */
 108 void __init omap_serial_init(void)
 109 {
 110         int i;
 111
 112         if (cpu_is_omap7xx()) {
 113                 serial_platform_data[0].regshift = 0;
 114                 serial_platform_data[1].regshift = 0;
 115                 serial_platform_data[0].irq = INT_7XX_UART_MODEM_1;
 116                 serial_platform_data[1].irq = INT_7XX_UART_MODEM_IRDA_2;
 117         }
 118
 119         if (cpu_is_omap15xx()) {
 120                 serial_platform_data[0].uartclk = OMAP1510_BASE_BAUD * 16;
 121                 serial_platform_data[1].uartclk = OMAP1510_BASE_BAUD * 16;
 122                 serial_platform_data[2].uartclk = OMAP1510_BASE_BAUD * 16;
 123         }
 124
 125         for (i = 0; i < ARRAY_SIZE(serial_platform_data) - 1; i++) {
 126
 127                 /* Don't look at UARTs higher than 2 for omap7xx */
 128                 if (cpu_is_omap7xx() && i > 1) {
 129                         serial_platform_data[i].membase = NULL;
 130                         serial_platform_data[i].mapbase = 0;
 131                         continue;
 132                 }
 133
 134                 /* Static mapping, never released */
 135                 serial_platform_data[i].membase =
 136                         ioremap(serial_platform_data[i].mapbase, SZ_2K);
 137                 if (!serial_platform_data[i].membase) {
 138                         printk(KERN_ERR "Could not ioremap uart%i\n", i);
 139                         continue;
 140                 }
 141                 switch (i) {
 142                 case 0:
 143                         uart1_ck = clk_get(NULL, "uart1_ck");
 144                         if (IS_ERR(uart1_ck))
 145                                 printk("Could not get uart1_ck\n");
 146                         else {
 147                                 clk_enable(uart1_ck);
 148                                 if (cpu_is_omap15xx())
 149                                         clk_set_rate(uart1_ck, 12000000);
 150                         }
 151                         break;
 152                 case 1:
 153                         uart2_ck = clk_get(NULL, "uart2_ck");
 154                         if (IS_ERR(uart2_ck))
 155                                 printk("Could not get uart2_ck\n");
 156                         else {
 157                                 clk_enable(uart2_ck);
 158                                 if (cpu_is_omap15xx())
 159                                         clk_set_rate(uart2_ck, 12000000);
 160                                 else
 161                                         clk_set_rate(uart2_ck, 48000000);
 162                         }
 163                         break;
 164                 case 2:
 165                         uart3_ck = clk_get(NULL, "uart3_ck");
 166                         if (IS_ERR(uart3_ck))
 167                                 printk("Could not get uart3_ck\n");
 168                         else {
 169                                 clk_enable(uart3_ck);
 170                                 if (cpu_is_omap15xx())
 171                                         clk_set_rate(uart3_ck, 12000000);
 172                         }
 173                         break;
 174                 }
 175                 omap_serial_reset(&serial_platform_data[i]);
 176         }
 177 }
 178
 179 #ifdef CONFIG_OMAP_SERIAL_WAKE
 180
 181 static irqreturn_t omap_serial_wake_interrupt(int irq, void *dev_id)
 182 {
 183         /* Need to do something with serial port right after wake-up? */
 184         return IRQ_HANDLED;
 185 }
 186
 187 /*
 188  * Reroutes serial RX lines to GPIO lines for the duration of
 189  * sleep to allow waking up the device from serial port even
 190  * in deep sleep.
 191  */
 192 void omap_serial_wake_trigger(int enable)
 193 {
 194         if (!cpu_is_omap16xx())
 195                 return;
 196
 197         if (uart1_ck != NULL) {
 198                 if (enable)
 199                         omap_cfg_reg(V14_16XX_GPIO37);
 200                 else
 201                         omap_cfg_reg(V14_16XX_UART1_RX);
 202         }
 203         if (uart2_ck != NULL) {
 204                 if (enable)
 205                         omap_cfg_reg(R9_16XX_GPIO18);
 206                 else
 207                         omap_cfg_reg(R9_16XX_UART2_RX);
 208         }
 209         if (uart3_ck != NULL) {
 210                 if (enable)
 211                         omap_cfg_reg(L14_16XX_GPIO49);
 212                 else
 213                         omap_cfg_reg(L14_16XX_UART3_RX);
 214         }
 215 }
 216
 217 static void __init omap_serial_set_port_wakeup(int gpio_nr)
 218 {
 219         int ret;
 220
 221         ret = gpio_request(gpio_nr, "UART wake");
 222         if (ret < 0) {
 223                 printk(KERN_ERR "Could not request UART wake GPIO: %i\n",
 224                        gpio_nr);
 225                 return;
 226         }
 227         gpio_direction_input(gpio_nr);
 228         ret = request_irq(gpio_to_irq(gpio_nr), &omap_serial_wake_interrupt,
 229                           IRQF_TRIGGER_RISING, "serial wakeup", NULL);
 230         if (ret) {
 231                 gpio_free(gpio_nr);
 232                 printk(KERN_ERR "No interrupt for UART wake GPIO: %i\n",
 233                        gpio_nr);
 234                 return;
 235         }
 236         enable_irq_wake(gpio_to_irq(gpio_nr));
 237 }
 238
 239 int __init omap_serial_wakeup_init(void)
 240 {
 241         if (!cpu_is_omap16xx())
 242                 return 0;
 243
 244         if (uart1_ck != NULL)
 245                 omap_serial_set_port_wakeup(37);
 246         if (uart2_ck != NULL)
 247                 omap_serial_set_port_wakeup(18);
 248         if (uart3_ck != NULL)
 249                 omap_serial_set_port_wakeup(49);
 250
 251         return 0;
 252 }
 253
 254 #endif  /* CONFIG_OMAP_SERIAL_WAKE */
 255
 256 static int __init omap_init(void)
 257 {
 258         if (!cpu_class_is_omap1())
 259                 return -ENODEV;
 260
 261         return platform_device_register(&serial_device);
 262 }
 263 arch_initcall(omap_init);