1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mach-omap1/mcbsp.c
5 * Copyright (C) 2008 Instituto Nokia de Tecnologia
6 * Contact: Eduardo Valentin <eduardo.valentin@indt.org.br>
8 * Multichannel mode not supported.
10 #include <linux/ioport.h>
11 #include <linux/module.h>
12 #include <linux/init.h>
13 #include <linux/clk.h>
14 #include <linux/err.h>
16 #include <linux/platform_device.h>
17 #include <linux/slab.h>
18 #include <linux/omap-dma.h>
19 #include <linux/soc/ti/omap1-io.h>
20 #include <linux/platform_data/asoc-ti-mcbsp.h>
27 #define DPS_RSTCT2_PER_EN (1 << 0)
28 #define DSP_RSTCT2_WD_PER_EN (1 << 1)
31 static struct clk *api_clk;
32 static struct clk *dsp_clk;
33 static struct platform_device **omap_mcbsp_devices;
35 static void omap1_mcbsp_request(unsigned int id)
38 * On 1510, 1610 and 1710, McBSP1 and McBSP3
39 * are DSP public peripherals.
41 if (id == 0 || id == 2) {
43 api_clk = clk_get(NULL, "api_ck");
44 dsp_clk = clk_get(NULL, "dsp_ck");
45 if (!IS_ERR(api_clk) && !IS_ERR(dsp_clk)) {
46 clk_prepare_enable(api_clk);
47 clk_prepare_enable(dsp_clk);
50 * DSP external peripheral reset
51 * FIXME: This should be moved to dsp code
53 __raw_writew(__raw_readw(DSP_RSTCT2) | DPS_RSTCT2_PER_EN |
54 DSP_RSTCT2_WD_PER_EN, DSP_RSTCT2);
60 static void omap1_mcbsp_free(unsigned int id)
62 if (id == 0 || id == 2) {
64 if (!IS_ERR(api_clk)) {
65 clk_disable_unprepare(api_clk);
68 if (!IS_ERR(dsp_clk)) {
69 clk_disable_unprepare(dsp_clk);
76 static struct omap_mcbsp_ops omap1_mcbsp_ops = {
77 .request = omap1_mcbsp_request,
78 .free = omap1_mcbsp_free,
81 #define OMAP7XX_MCBSP1_BASE 0xfffb1000
82 #define OMAP7XX_MCBSP2_BASE 0xfffb1800
84 #define OMAP1510_MCBSP1_BASE 0xe1011800
85 #define OMAP1510_MCBSP2_BASE 0xfffb1000
86 #define OMAP1510_MCBSP3_BASE 0xe1017000
88 #define OMAP1610_MCBSP1_BASE 0xe1011800
89 #define OMAP1610_MCBSP2_BASE 0xfffb1000
90 #define OMAP1610_MCBSP3_BASE 0xe1017000
92 #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
93 struct resource omap7xx_mcbsp_res[][6] = {
96 .start = OMAP7XX_MCBSP1_BASE,
97 .end = OMAP7XX_MCBSP1_BASE + SZ_256,
98 .flags = IORESOURCE_MEM,
102 .start = INT_7XX_McBSP1RX,
103 .flags = IORESOURCE_IRQ,
107 .start = INT_7XX_McBSP1TX,
108 .flags = IORESOURCE_IRQ,
113 .flags = IORESOURCE_DMA,
118 .flags = IORESOURCE_DMA,
123 .start = OMAP7XX_MCBSP2_BASE,
124 .end = OMAP7XX_MCBSP2_BASE + SZ_256,
125 .flags = IORESOURCE_MEM,
129 .start = INT_7XX_McBSP2RX,
130 .flags = IORESOURCE_IRQ,
134 .start = INT_7XX_McBSP2TX,
135 .flags = IORESOURCE_IRQ,
140 .flags = IORESOURCE_DMA,
145 .flags = IORESOURCE_DMA,
150 #define omap7xx_mcbsp_res_0 omap7xx_mcbsp_res[0]
152 static struct omap_mcbsp_platform_data omap7xx_mcbsp_pdata[] = {
154 .ops = &omap1_mcbsp_ops,
157 .ops = &omap1_mcbsp_ops,
160 #define OMAP7XX_MCBSP_RES_SZ ARRAY_SIZE(omap7xx_mcbsp_res[1])
161 #define OMAP7XX_MCBSP_COUNT ARRAY_SIZE(omap7xx_mcbsp_res)
163 #define omap7xx_mcbsp_res_0 NULL
164 #define omap7xx_mcbsp_pdata NULL
165 #define OMAP7XX_MCBSP_RES_SZ 0
166 #define OMAP7XX_MCBSP_COUNT 0
169 #ifdef CONFIG_ARCH_OMAP15XX
170 struct resource omap15xx_mcbsp_res[][6] = {
173 .start = OMAP1510_MCBSP1_BASE,
174 .end = OMAP1510_MCBSP1_BASE + SZ_256,
175 .flags = IORESOURCE_MEM,
179 .start = INT_McBSP1RX,
180 .flags = IORESOURCE_IRQ,
184 .start = INT_McBSP1TX,
185 .flags = IORESOURCE_IRQ,
190 .flags = IORESOURCE_DMA,
195 .flags = IORESOURCE_DMA,
200 .start = OMAP1510_MCBSP2_BASE,
201 .end = OMAP1510_MCBSP2_BASE + SZ_256,
202 .flags = IORESOURCE_MEM,
206 .start = INT_1510_SPI_RX,
207 .flags = IORESOURCE_IRQ,
211 .start = INT_1510_SPI_TX,
212 .flags = IORESOURCE_IRQ,
217 .flags = IORESOURCE_DMA,
222 .flags = IORESOURCE_DMA,
227 .start = OMAP1510_MCBSP3_BASE,
228 .end = OMAP1510_MCBSP3_BASE + SZ_256,
229 .flags = IORESOURCE_MEM,
233 .start = INT_McBSP3RX,
234 .flags = IORESOURCE_IRQ,
238 .start = INT_McBSP3TX,
239 .flags = IORESOURCE_IRQ,
244 .flags = IORESOURCE_DMA,
249 .flags = IORESOURCE_DMA,
254 #define omap15xx_mcbsp_res_0 omap15xx_mcbsp_res[0]
256 static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = {
258 .ops = &omap1_mcbsp_ops,
261 .ops = &omap1_mcbsp_ops,
264 .ops = &omap1_mcbsp_ops,
267 #define OMAP15XX_MCBSP_RES_SZ ARRAY_SIZE(omap15xx_mcbsp_res[1])
268 #define OMAP15XX_MCBSP_COUNT ARRAY_SIZE(omap15xx_mcbsp_res)
270 #define omap15xx_mcbsp_res_0 NULL
271 #define omap15xx_mcbsp_pdata NULL
272 #define OMAP15XX_MCBSP_RES_SZ 0
273 #define OMAP15XX_MCBSP_COUNT 0
276 #ifdef CONFIG_ARCH_OMAP16XX
277 struct resource omap16xx_mcbsp_res[][6] = {
280 .start = OMAP1610_MCBSP1_BASE,
281 .end = OMAP1610_MCBSP1_BASE + SZ_256,
282 .flags = IORESOURCE_MEM,
286 .start = INT_McBSP1RX,
287 .flags = IORESOURCE_IRQ,
291 .start = INT_McBSP1TX,
292 .flags = IORESOURCE_IRQ,
297 .flags = IORESOURCE_DMA,
302 .flags = IORESOURCE_DMA,
307 .start = OMAP1610_MCBSP2_BASE,
308 .end = OMAP1610_MCBSP2_BASE + SZ_256,
309 .flags = IORESOURCE_MEM,
313 .start = INT_1610_McBSP2_RX,
314 .flags = IORESOURCE_IRQ,
318 .start = INT_1610_McBSP2_TX,
319 .flags = IORESOURCE_IRQ,
324 .flags = IORESOURCE_DMA,
329 .flags = IORESOURCE_DMA,
334 .start = OMAP1610_MCBSP3_BASE,
335 .end = OMAP1610_MCBSP3_BASE + SZ_256,
336 .flags = IORESOURCE_MEM,
340 .start = INT_McBSP3RX,
341 .flags = IORESOURCE_IRQ,
345 .start = INT_McBSP3TX,
346 .flags = IORESOURCE_IRQ,
351 .flags = IORESOURCE_DMA,
356 .flags = IORESOURCE_DMA,
361 #define omap16xx_mcbsp_res_0 omap16xx_mcbsp_res[0]
363 static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
365 .ops = &omap1_mcbsp_ops,
368 .ops = &omap1_mcbsp_ops,
371 .ops = &omap1_mcbsp_ops,
374 #define OMAP16XX_MCBSP_RES_SZ ARRAY_SIZE(omap16xx_mcbsp_res[1])
375 #define OMAP16XX_MCBSP_COUNT ARRAY_SIZE(omap16xx_mcbsp_res)
377 #define omap16xx_mcbsp_res_0 NULL
378 #define omap16xx_mcbsp_pdata NULL
379 #define OMAP16XX_MCBSP_RES_SZ 0
380 #define OMAP16XX_MCBSP_COUNT 0
383 static void omap_mcbsp_register_board_cfg(struct resource *res, int res_count,
384 struct omap_mcbsp_platform_data *config, int size)
388 omap_mcbsp_devices = kcalloc(size, sizeof(struct platform_device *),
390 if (!omap_mcbsp_devices) {
391 printk(KERN_ERR "Could not register McBSP devices\n");
395 for (i = 0; i < size; i++) {
396 struct platform_device *new_mcbsp;
399 new_mcbsp = platform_device_alloc("omap-mcbsp", i + 1);
402 platform_device_add_resources(new_mcbsp, &res[i * res_count],
404 config[i].reg_size = 2;
405 config[i].reg_step = 2;
406 new_mcbsp->dev.platform_data = &config[i];
407 ret = platform_device_add(new_mcbsp);
409 platform_device_put(new_mcbsp);
412 omap_mcbsp_devices[i] = new_mcbsp;
416 static int __init omap1_mcbsp_init(void)
418 if (!cpu_class_is_omap1())
421 if (cpu_is_omap7xx())
422 omap_mcbsp_register_board_cfg(omap7xx_mcbsp_res_0,
423 OMAP7XX_MCBSP_RES_SZ,
425 OMAP7XX_MCBSP_COUNT);
427 if (cpu_is_omap15xx())
428 omap_mcbsp_register_board_cfg(omap15xx_mcbsp_res_0,
429 OMAP15XX_MCBSP_RES_SZ,
430 omap15xx_mcbsp_pdata,
431 OMAP15XX_MCBSP_COUNT);
433 if (cpu_is_omap16xx())
434 omap_mcbsp_register_board_cfg(omap16xx_mcbsp_res_0,
435 OMAP16XX_MCBSP_RES_SZ,
436 omap16xx_mcbsp_pdata,
437 OMAP16XX_MCBSP_COUNT);
442 arch_initcall(omap1_mcbsp_init);