1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mach-omap1/mcbsp.c
5 * Copyright (C) 2008 Instituto Nokia de Tecnologia
6 * Contact: Eduardo Valentin <eduardo.valentin@indt.org.br>
8 * Multichannel mode not supported.
10 #include <linux/ioport.h>
11 #include <linux/module.h>
12 #include <linux/init.h>
13 #include <linux/clk.h>
14 #include <linux/err.h>
16 #include <linux/platform_device.h>
17 #include <linux/slab.h>
18 #include <linux/omap-dma.h>
19 #include <linux/soc/ti/omap1-io.h>
20 #include <linux/platform_data/asoc-ti-mcbsp.h>
27 #define DPS_RSTCT2_PER_EN (1 << 0)
28 #define DSP_RSTCT2_WD_PER_EN (1 << 1)
31 static struct clk *api_clk;
32 static struct clk *dsp_clk;
33 static struct platform_device **omap_mcbsp_devices;
35 static void omap1_mcbsp_request(unsigned int id)
38 * On 1510, 1610 and 1710, McBSP1 and McBSP3
39 * are DSP public peripherals.
41 if (id == 0 || id == 2) {
43 api_clk = clk_get(NULL, "api_ck");
44 dsp_clk = clk_get(NULL, "dsp_ck");
45 if (!IS_ERR(api_clk) && !IS_ERR(dsp_clk)) {
46 clk_prepare_enable(api_clk);
47 clk_prepare_enable(dsp_clk);
50 * DSP external peripheral reset
51 * FIXME: This should be moved to dsp code
53 __raw_writew(__raw_readw(DSP_RSTCT2) | DPS_RSTCT2_PER_EN |
54 DSP_RSTCT2_WD_PER_EN, DSP_RSTCT2);
60 static void omap1_mcbsp_free(unsigned int id)
62 if (id == 0 || id == 2) {
64 if (!IS_ERR(api_clk)) {
65 clk_disable_unprepare(api_clk);
68 if (!IS_ERR(dsp_clk)) {
69 clk_disable_unprepare(dsp_clk);
76 static struct omap_mcbsp_ops omap1_mcbsp_ops = {
77 .request = omap1_mcbsp_request,
78 .free = omap1_mcbsp_free,
81 #define OMAP7XX_MCBSP1_BASE 0xfffb1000
82 #define OMAP7XX_MCBSP2_BASE 0xfffb1800
84 #define OMAP1510_MCBSP1_BASE 0xe1011800
85 #define OMAP1510_MCBSP2_BASE 0xfffb1000
86 #define OMAP1510_MCBSP3_BASE 0xe1017000
88 #define OMAP1610_MCBSP1_BASE 0xe1011800
89 #define OMAP1610_MCBSP2_BASE 0xfffb1000
90 #define OMAP1610_MCBSP3_BASE 0xe1017000
92 struct resource omap7xx_mcbsp_res[][6] = {
95 .start = OMAP7XX_MCBSP1_BASE,
96 .end = OMAP7XX_MCBSP1_BASE + SZ_256,
97 .flags = IORESOURCE_MEM,
101 .start = INT_7XX_McBSP1RX,
102 .flags = IORESOURCE_IRQ,
106 .start = INT_7XX_McBSP1TX,
107 .flags = IORESOURCE_IRQ,
112 .flags = IORESOURCE_DMA,
117 .flags = IORESOURCE_DMA,
122 .start = OMAP7XX_MCBSP2_BASE,
123 .end = OMAP7XX_MCBSP2_BASE + SZ_256,
124 .flags = IORESOURCE_MEM,
128 .start = INT_7XX_McBSP2RX,
129 .flags = IORESOURCE_IRQ,
133 .start = INT_7XX_McBSP2TX,
134 .flags = IORESOURCE_IRQ,
139 .flags = IORESOURCE_DMA,
144 .flags = IORESOURCE_DMA,
149 #define omap7xx_mcbsp_res_0 omap7xx_mcbsp_res[0]
151 static struct omap_mcbsp_platform_data omap7xx_mcbsp_pdata[] = {
153 .ops = &omap1_mcbsp_ops,
156 .ops = &omap1_mcbsp_ops,
159 #define OMAP7XX_MCBSP_RES_SZ ARRAY_SIZE(omap7xx_mcbsp_res[1])
160 #define OMAP7XX_MCBSP_COUNT ARRAY_SIZE(omap7xx_mcbsp_res)
162 struct resource omap15xx_mcbsp_res[][6] = {
165 .start = OMAP1510_MCBSP1_BASE,
166 .end = OMAP1510_MCBSP1_BASE + SZ_256,
167 .flags = IORESOURCE_MEM,
171 .start = INT_McBSP1RX,
172 .flags = IORESOURCE_IRQ,
176 .start = INT_McBSP1TX,
177 .flags = IORESOURCE_IRQ,
182 .flags = IORESOURCE_DMA,
187 .flags = IORESOURCE_DMA,
192 .start = OMAP1510_MCBSP2_BASE,
193 .end = OMAP1510_MCBSP2_BASE + SZ_256,
194 .flags = IORESOURCE_MEM,
198 .start = INT_1510_SPI_RX,
199 .flags = IORESOURCE_IRQ,
203 .start = INT_1510_SPI_TX,
204 .flags = IORESOURCE_IRQ,
209 .flags = IORESOURCE_DMA,
214 .flags = IORESOURCE_DMA,
219 .start = OMAP1510_MCBSP3_BASE,
220 .end = OMAP1510_MCBSP3_BASE + SZ_256,
221 .flags = IORESOURCE_MEM,
225 .start = INT_McBSP3RX,
226 .flags = IORESOURCE_IRQ,
230 .start = INT_McBSP3TX,
231 .flags = IORESOURCE_IRQ,
236 .flags = IORESOURCE_DMA,
241 .flags = IORESOURCE_DMA,
246 #define omap15xx_mcbsp_res_0 omap15xx_mcbsp_res[0]
248 static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = {
250 .ops = &omap1_mcbsp_ops,
253 .ops = &omap1_mcbsp_ops,
256 .ops = &omap1_mcbsp_ops,
259 #define OMAP15XX_MCBSP_RES_SZ ARRAY_SIZE(omap15xx_mcbsp_res[1])
260 #define OMAP15XX_MCBSP_COUNT ARRAY_SIZE(omap15xx_mcbsp_res)
262 struct resource omap16xx_mcbsp_res[][6] = {
265 .start = OMAP1610_MCBSP1_BASE,
266 .end = OMAP1610_MCBSP1_BASE + SZ_256,
267 .flags = IORESOURCE_MEM,
271 .start = INT_McBSP1RX,
272 .flags = IORESOURCE_IRQ,
276 .start = INT_McBSP1TX,
277 .flags = IORESOURCE_IRQ,
282 .flags = IORESOURCE_DMA,
287 .flags = IORESOURCE_DMA,
292 .start = OMAP1610_MCBSP2_BASE,
293 .end = OMAP1610_MCBSP2_BASE + SZ_256,
294 .flags = IORESOURCE_MEM,
298 .start = INT_1610_McBSP2_RX,
299 .flags = IORESOURCE_IRQ,
303 .start = INT_1610_McBSP2_TX,
304 .flags = IORESOURCE_IRQ,
309 .flags = IORESOURCE_DMA,
314 .flags = IORESOURCE_DMA,
319 .start = OMAP1610_MCBSP3_BASE,
320 .end = OMAP1610_MCBSP3_BASE + SZ_256,
321 .flags = IORESOURCE_MEM,
325 .start = INT_McBSP3RX,
326 .flags = IORESOURCE_IRQ,
330 .start = INT_McBSP3TX,
331 .flags = IORESOURCE_IRQ,
336 .flags = IORESOURCE_DMA,
341 .flags = IORESOURCE_DMA,
346 #define omap16xx_mcbsp_res_0 omap16xx_mcbsp_res[0]
348 static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
350 .ops = &omap1_mcbsp_ops,
353 .ops = &omap1_mcbsp_ops,
356 .ops = &omap1_mcbsp_ops,
359 #define OMAP16XX_MCBSP_RES_SZ ARRAY_SIZE(omap16xx_mcbsp_res[1])
360 #define OMAP16XX_MCBSP_COUNT ARRAY_SIZE(omap16xx_mcbsp_res)
362 static void omap_mcbsp_register_board_cfg(struct resource *res, int res_count,
363 struct omap_mcbsp_platform_data *config, int size)
367 omap_mcbsp_devices = kcalloc(size, sizeof(struct platform_device *),
369 if (!omap_mcbsp_devices) {
370 printk(KERN_ERR "Could not register McBSP devices\n");
374 for (i = 0; i < size; i++) {
375 struct platform_device *new_mcbsp;
378 new_mcbsp = platform_device_alloc("omap-mcbsp", i + 1);
381 platform_device_add_resources(new_mcbsp, &res[i * res_count],
383 config[i].reg_size = 2;
384 config[i].reg_step = 2;
385 new_mcbsp->dev.platform_data = &config[i];
386 ret = platform_device_add(new_mcbsp);
388 platform_device_put(new_mcbsp);
391 omap_mcbsp_devices[i] = new_mcbsp;
395 static int __init omap1_mcbsp_init(void)
397 if (!cpu_class_is_omap1())
400 if (cpu_is_omap7xx())
401 omap_mcbsp_register_board_cfg(omap7xx_mcbsp_res_0,
402 OMAP7XX_MCBSP_RES_SZ,
404 OMAP7XX_MCBSP_COUNT);
406 if (cpu_is_omap15xx())
407 omap_mcbsp_register_board_cfg(omap15xx_mcbsp_res_0,
408 OMAP15XX_MCBSP_RES_SZ,
409 omap15xx_mcbsp_pdata,
410 OMAP15XX_MCBSP_COUNT);
412 if (cpu_is_omap16xx())
413 omap_mcbsp_register_board_cfg(omap16xx_mcbsp_res_0,
414 OMAP16XX_MCBSP_RES_SZ,
415 omap16xx_mcbsp_pdata,
416 OMAP16XX_MCBSP_COUNT);
421 arch_initcall(omap1_mcbsp_init);