arch/arm/mach-omap1/board-perseus2.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * linux/arch/arm/mach-omap1/board-perseus2.c
   4  *
   5  * Modified from board-generic.c
   6  *
   7  * Original OMAP730 support by Jean Pihet <j-pihet@ti.com>
   8  * Updated for 2.6 by Kevin Hilman <kjh@hilman.org>
   9  */
  10 #include <linux/gpio.h>
  11 #include <linux/kernel.h>
  12 #include <linux/init.h>
  13 #include <linux/platform_device.h>
  14 #include <linux/delay.h>
  15 #include <linux/mtd/mtd.h>
  16 #include <linux/mtd/platnand.h>
  17 #include <linux/mtd/physmap.h>
  18 #include <linux/input.h>
  19 #include <linux/smc91x.h>
  20 #include <linux/omapfb.h>
  21 #include <linux/platform_data/keypad-omap.h>
  22 #include <linux/soc/ti/omap1-io.h>
  23
  24 #include <asm/mach-types.h>
  25 #include <asm/mach/arch.h>
  26 #include <asm/mach/map.h>
  27
  28 #include "tc.h"
  29 #include "mux.h"
  30 #include "flash.h"
  31 #include "hardware.h"
  32 #include "iomap.h"
  33 #include "common.h"
  34 #include "fpga.h"
  35
  36 static const unsigned int p2_keymap[] = {
  37         KEY(0, 0, KEY_UP),
  38         KEY(1, 0, KEY_RIGHT),
  39         KEY(2, 0, KEY_LEFT),
  40         KEY(3, 0, KEY_DOWN),
  41         KEY(4, 0, KEY_ENTER),
  42         KEY(0, 1, KEY_F10),
  43         KEY(1, 1, KEY_SEND),
  44         KEY(2, 1, KEY_END),
  45         KEY(3, 1, KEY_VOLUMEDOWN),
  46         KEY(4, 1, KEY_VOLUMEUP),
  47         KEY(5, 1, KEY_RECORD),
  48         KEY(0, 2, KEY_F9),
  49         KEY(1, 2, KEY_3),
  50         KEY(2, 2, KEY_6),
  51         KEY(3, 2, KEY_9),
  52         KEY(4, 2, KEY_KPDOT),
  53         KEY(0, 3, KEY_BACK),
  54         KEY(1, 3, KEY_2),
  55         KEY(2, 3, KEY_5),
  56         KEY(3, 3, KEY_8),
  57         KEY(4, 3, KEY_0),
  58         KEY(5, 3, KEY_KPSLASH),
  59         KEY(0, 4, KEY_HOME),
  60         KEY(1, 4, KEY_1),
  61         KEY(2, 4, KEY_4),
  62         KEY(3, 4, KEY_7),
  63         KEY(4, 4, KEY_KPASTERISK),
  64         KEY(5, 4, KEY_POWER),
  65 };
  66
  67 static struct smc91x_platdata smc91x_info = {
  68         .flags  = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  69         .leda   = RPC_LED_100_10,
  70         .ledb   = RPC_LED_TX_RX,
  71 };
  72
  73 static struct resource smc91x_resources[] = {
  74         [0] = {
  75                 .start  = H2P2_DBG_FPGA_ETHR_START,     /* Physical */
  76                 .end    = H2P2_DBG_FPGA_ETHR_START + 0xf,
  77                 .flags  = IORESOURCE_MEM,
  78         },
  79         [1] = {
  80                 .start  = INT_7XX_MPU_EXT_NIRQ,
  81                 .end    = 0,
  82                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
  83         },
  84 };
  85
  86 static struct mtd_partition nor_partitions[] = {
  87         /* bootloader (U-Boot, etc) in first sector */
  88         {
  89               .name             = "bootloader",
  90               .offset           = 0,
  91               .size             = SZ_128K,
  92               .mask_flags       = MTD_WRITEABLE, /* force read-only */
  93         },
  94         /* bootloader params in the next sector */
  95         {
  96               .name             = "params",
  97               .offset           = MTDPART_OFS_APPEND,
  98               .size             = SZ_128K,
  99               .mask_flags       = 0,
 100         },
 101         /* kernel */
 102         {
 103               .name             = "kernel",
 104               .offset           = MTDPART_OFS_APPEND,
 105               .size             = SZ_2M,
 106               .mask_flags       = 0
 107         },
 108         /* rest of flash is a file system */
 109         {
 110               .name             = "rootfs",
 111               .offset           = MTDPART_OFS_APPEND,
 112               .size             = MTDPART_SIZ_FULL,
 113               .mask_flags       = 0
 114         },
 115 };
 116
 117 static struct physmap_flash_data nor_data = {
 118         .width          = 2,
 119         .set_vpp        = omap1_set_vpp,
 120         .parts          = nor_partitions,
 121         .nr_parts       = ARRAY_SIZE(nor_partitions),
 122 };
 123
 124 static struct resource nor_resource = {
 125         .start          = OMAP_CS0_PHYS,
 126         .end            = OMAP_CS0_PHYS + SZ_32M - 1,
 127         .flags          = IORESOURCE_MEM,
 128 };
 129
 130 static struct platform_device nor_device = {
 131         .name           = "physmap-flash",
 132         .id             = 0,
 133         .dev            = {
 134                 .platform_data  = &nor_data,
 135         },
 136         .num_resources  = 1,
 137         .resource       = &nor_resource,
 138 };
 139
 140 #define P2_NAND_RB_GPIO_PIN     62
 141
 142 static int nand_dev_ready(struct nand_chip *chip)
 143 {
 144         return gpio_get_value(P2_NAND_RB_GPIO_PIN);
 145 }
 146
 147 static struct platform_nand_data nand_data = {
 148         .chip   = {
 149                 .nr_chips               = 1,
 150                 .chip_offset            = 0,
 151                 .options                = NAND_SAMSUNG_LP_OPTIONS,
 152         },
 153         .ctrl   = {
 154                 .cmd_ctrl       = omap1_nand_cmd_ctl,
 155                 .dev_ready      = nand_dev_ready,
 156         },
 157 };
 158
 159 static struct resource nand_resource = {
 160         .start          = OMAP_CS3_PHYS,
 161         .end            = OMAP_CS3_PHYS + SZ_4K - 1,
 162         .flags          = IORESOURCE_MEM,
 163 };
 164
 165 static struct platform_device nand_device = {
 166         .name           = "gen_nand",
 167         .id             = 0,
 168         .dev            = {
 169                 .platform_data  = &nand_data,
 170         },
 171         .num_resources  = 1,
 172         .resource       = &nand_resource,
 173 };
 174
 175 static struct platform_device smc91x_device = {
 176         .name           = "smc91x",
 177         .id             = 0,
 178         .dev    = {
 179                 .platform_data  = &smc91x_info,
 180         },
 181         .num_resources  = ARRAY_SIZE(smc91x_resources),
 182         .resource       = smc91x_resources,
 183 };
 184
 185 static struct resource kp_resources[] = {
 186         [0] = {
 187                 .start  = INT_7XX_MPUIO_KEYPAD,
 188                 .end    = INT_7XX_MPUIO_KEYPAD,
 189                 .flags  = IORESOURCE_IRQ,
 190         },
 191 };
 192
 193 static const struct matrix_keymap_data p2_keymap_data = {
 194         .keymap         = p2_keymap,
 195         .keymap_size    = ARRAY_SIZE(p2_keymap),
 196 };
 197
 198 static struct omap_kp_platform_data kp_data = {
 199         .rows           = 8,
 200         .cols           = 8,
 201         .keymap_data    = &p2_keymap_data,
 202         .delay          = 4,
 203         .dbounce        = true,
 204 };
 205
 206 static struct platform_device kp_device = {
 207         .name           = "omap-keypad",
 208         .id             = -1,
 209         .dev            = {
 210                 .platform_data = &kp_data,
 211         },
 212         .num_resources  = ARRAY_SIZE(kp_resources),
 213         .resource       = kp_resources,
 214 };
 215
 216 static struct platform_device *devices[] __initdata = {
 217         &nor_device,
 218         &nand_device,
 219         &smc91x_device,
 220         &kp_device,
 221 };
 222
 223 static const struct omap_lcd_config perseus2_lcd_config __initconst = {
 224         .ctrl_name      = "internal",
 225 };
 226
 227 static void __init perseus2_init_smc91x(void)
 228 {
 229         __raw_writeb(1, H2P2_DBG_FPGA_LAN_RESET);
 230         mdelay(50);
 231         __raw_writeb(__raw_readb(H2P2_DBG_FPGA_LAN_RESET) & ~1,
 232                    H2P2_DBG_FPGA_LAN_RESET);
 233         mdelay(50);
 234 }
 235
 236 static void __init omap_perseus2_init(void)
 237 {
 238         /* Early, board-dependent init */
 239
 240         /*
 241          * Hold GSM Reset until needed
 242          */
 243         omap_writew(omap_readw(OMAP7XX_DSP_M_CTL) & ~1, OMAP7XX_DSP_M_CTL);
 244
 245         /*
 246          * UARTs -> done automagically by 8250 driver
 247          */
 248
 249         /*
 250          * CSx timings, GPIO Mux ... setup
 251          */
 252
 253         /* Flash: CS0 timings setup */
 254         omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_0);
 255         omap_writel(0x00000088, OMAP7XX_FLASH_ACFG_0);
 256
 257         /*
 258          * Ethernet support through the debug board
 259          * CS1 timings setup
 260          */
 261         omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_1);
 262         omap_writel(0x00000000, OMAP7XX_FLASH_ACFG_1);
 263
 264         /*
 265          * Configure MPU_EXT_NIRQ IO in IO_CONF9 register,
 266          * It is used as the Ethernet controller interrupt
 267          */
 268         omap_writel(omap_readl(OMAP7XX_IO_CONF_9) & 0x1FFFFFFF,
 269                                 OMAP7XX_IO_CONF_9);
 270
 271         perseus2_init_smc91x();
 272
 273         BUG_ON(gpio_request(P2_NAND_RB_GPIO_PIN, "NAND ready") < 0);
 274         gpio_direction_input(P2_NAND_RB_GPIO_PIN);
 275
 276         omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
 277         omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
 278
 279         /* Mux pins for keypad */
 280         omap_cfg_reg(E2_7XX_KBR0);
 281         omap_cfg_reg(J7_7XX_KBR1);
 282         omap_cfg_reg(E1_7XX_KBR2);
 283         omap_cfg_reg(F3_7XX_KBR3);
 284         omap_cfg_reg(D2_7XX_KBR4);
 285         omap_cfg_reg(C2_7XX_KBC0);
 286         omap_cfg_reg(D3_7XX_KBC1);
 287         omap_cfg_reg(E4_7XX_KBC2);
 288         omap_cfg_reg(F4_7XX_KBC3);
 289         omap_cfg_reg(E3_7XX_KBC4);
 290
 291         if (IS_ENABLED(CONFIG_SPI_OMAP_UWIRE)) {
 292                 /* configure pins: MPU_UW_nSCS1, MPU_UW_SDO, MPU_UW_SCLK */
 293                 int val = omap_readl(OMAP7XX_IO_CONF_9) & ~0x00EEE000;
 294                 omap_writel(val | 0x00AAA000, OMAP7XX_IO_CONF_9);
 295         }
 296
 297         platform_add_devices(devices, ARRAY_SIZE(devices));
 298
 299         omap_serial_init();
 300         omap_register_i2c_bus(1, 100, NULL, 0);
 301
 302         omapfb_set_lcd_config(&perseus2_lcd_config);
 303 }
 304
 305 /* Only FPGA needs to be mapped here. All others are done with ioremap */
 306 static struct map_desc omap_perseus2_io_desc[] __initdata = {
 307         {
 308                 .virtual        = H2P2_DBG_FPGA_BASE,
 309                 .pfn            = __phys_to_pfn(H2P2_DBG_FPGA_START),
 310                 .length         = H2P2_DBG_FPGA_SIZE,
 311                 .type           = MT_DEVICE
 312         }
 313 };
 314
 315 static void __init omap_perseus2_map_io(void)
 316 {
 317         omap7xx_map_io();
 318         iotable_init(omap_perseus2_io_desc,
 319                      ARRAY_SIZE(omap_perseus2_io_desc));
 320 }
 321
 322 MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2")
 323         /* Maintainer: Kevin Hilman <kjh@hilman.org> */
 324         .atag_offset    = 0x100,
 325         .map_io         = omap_perseus2_map_io,
 326         .init_early     = omap1_init_early,
 327         .init_irq       = omap1_init_irq,
 328         .handle_irq     = omap1_handle_irq,
 329         .init_machine   = omap_perseus2_init,
 330         .init_late      = omap1_init_late,
 331         .init_time      = omap1_timer_init,
 332         .restart        = omap1_restart,
 333 MACHINE_END