1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * arch/arm/mach-iop32x/iq80321.c
5 * Board support code for the Intel IQ80321 platform.
7 * Author: Rory Bolt <rorybolt@pacbell.net>
8 * Copyright (C) 2002 Rory Bolt
9 * Copyright (C) 2004 Intel Corp.
13 #include <linux/init.h>
14 #include <linux/kernel.h>
15 #include <linux/pci.h>
16 #include <linux/string.h>
17 #include <linux/serial_core.h>
18 #include <linux/serial_8250.h>
19 #include <linux/mtd/physmap.h>
20 #include <linux/platform_device.h>
22 #include <linux/gpio/machine.h>
24 #include <asm/mach/arch.h>
25 #include <asm/mach/map.h>
26 #include <asm/mach/pci.h>
27 #include <asm/mach/time.h>
28 #include <asm/mach-types.h>
33 #include "gpio-iop32x.h"
36 * IQ80321 timer tick configuration.
38 static void __init iq80321_timer_init(void)
40 /* 33.333 MHz crystal. */
41 iop_init_time(200000000);
48 static struct map_desc iq80321_io_desc[] __initdata = {
49 { /* on-board devices */
50 .virtual = IQ80321_UART,
51 .pfn = __phys_to_pfn(IQ80321_UART),
57 void __init iq80321_map_io(void)
60 iotable_init(iq80321_io_desc, ARRAY_SIZE(iq80321_io_desc));
68 iq80321_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
72 if ((slot == 2 || slot == 6) && pin == 1) {
74 irq = IRQ_IOP32X_XINT2;
75 } else if ((slot == 2 || slot == 6) && pin == 2) {
77 irq = IRQ_IOP32X_XINT3;
78 } else if ((slot == 2 || slot == 6) && pin == 3) {
80 irq = IRQ_IOP32X_XINT0;
81 } else if ((slot == 2 || slot == 6) && pin == 4) {
83 irq = IRQ_IOP32X_XINT1;
84 } else if (slot == 4 || slot == 8) {
86 irq = IRQ_IOP32X_XINT0;
88 printk(KERN_ERR "iq80321_pci_map_irq() called for unknown "
89 "device PCI:%d:%d:%d\n", dev->bus->number,
90 PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
97 static struct hw_pci iq80321_pci __initdata = {
100 .setup = iop3xx_pci_setup,
101 .preinit = iop3xx_pci_preinit_cond,
102 .map_irq = iq80321_pci_map_irq,
105 static int __init iq80321_pci_init(void)
107 if ((iop3xx_get_init_atu() == IOP3XX_INIT_ATU_ENABLE) &&
108 machine_is_iq80321())
109 pci_common_init(&iq80321_pci);
114 subsys_initcall(iq80321_pci_init);
118 * IQ80321 machine initialisation.
120 static struct physmap_flash_data iq80321_flash_data = {
124 static struct resource iq80321_flash_resource = {
127 .flags = IORESOURCE_MEM,
130 static struct platform_device iq80321_flash_device = {
131 .name = "physmap-flash",
134 .platform_data = &iq80321_flash_data,
137 .resource = &iq80321_flash_resource,
140 static struct plat_serial8250_port iq80321_serial_port[] = {
142 .mapbase = IQ80321_UART,
143 .membase = (char *)IQ80321_UART,
144 .irq = IRQ_IOP32X_XINT1,
145 .flags = UPF_SKIP_TEST,
153 static struct resource iq80321_uart_resource = {
154 .start = IQ80321_UART,
155 .end = IQ80321_UART + 7,
156 .flags = IORESOURCE_MEM,
159 static struct platform_device iq80321_serial_device = {
160 .name = "serial8250",
161 .id = PLAT8250_DEV_PLATFORM,
163 .platform_data = iq80321_serial_port,
166 .resource = &iq80321_uart_resource,
169 static void __init iq80321_init_machine(void)
171 register_iop32x_gpio();
172 gpiod_add_lookup_table(&iop3xx_i2c0_gpio_lookup);
173 gpiod_add_lookup_table(&iop3xx_i2c1_gpio_lookup);
174 platform_device_register(&iop3xx_i2c0_device);
175 platform_device_register(&iop3xx_i2c1_device);
176 platform_device_register(&iq80321_flash_device);
177 platform_device_register(&iq80321_serial_device);
178 platform_device_register(&iop3xx_dma_0_channel);
179 platform_device_register(&iop3xx_dma_1_channel);
180 platform_device_register(&iop3xx_aau_channel);
183 MACHINE_START(IQ80321, "Intel IQ80321")
184 /* Maintainer: Intel Corp. */
185 .atag_offset = 0x100,
186 .nr_irqs = IOP32X_NR_IRQS,
187 .map_io = iq80321_map_io,
188 .init_irq = iop32x_init_irq,
189 .init_time = iq80321_timer_init,
190 .init_machine = iq80321_init_machine,
191 .restart = iop3xx_restart,