GNU Linux-libre 4.19.314-gnu1
[releases.git] / arch / arm / mach-imx / cpuidle-imx6sx.c
1 /*
2  * Copyright (C) 2014 Freescale Semiconductor, Inc.
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License version 2 as
6  * published by the Free Software Foundation.
7  */
8
9 #include <linux/cpuidle.h>
10 #include <linux/cpu_pm.h>
11 #include <linux/module.h>
12 #include <asm/cacheflush.h>
13 #include <asm/cpuidle.h>
14 #include <asm/suspend.h>
15
16 #include "common.h"
17 #include "cpuidle.h"
18 #include "hardware.h"
19
20 static int imx6sx_idle_finish(unsigned long val)
21 {
22         /*
23          * for Cortex-A7 which has an internal L2
24          * cache, need to flush it before powering
25          * down ARM platform, since flushing L1 cache
26          * here again has very small overhead, compared
27          * to adding conditional code for L2 cache type,
28          * just call flush_cache_all() is fine.
29          */
30         flush_cache_all();
31         cpu_do_idle();
32
33         return 0;
34 }
35
36 static int imx6sx_enter_wait(struct cpuidle_device *dev,
37                             struct cpuidle_driver *drv, int index)
38 {
39         imx6_set_lpm(WAIT_UNCLOCKED);
40
41         switch (index) {
42         case 1:
43                 cpu_do_idle();
44                 break;
45         case 2:
46                 imx6_enable_rbc(true);
47                 imx_gpc_set_arm_power_in_lpm(true);
48                 imx_set_cpu_jump(0, v7_cpu_resume);
49                 /* Need to notify there is a cpu pm operation. */
50                 cpu_pm_enter();
51                 cpu_cluster_pm_enter();
52
53                 cpu_suspend(0, imx6sx_idle_finish);
54
55                 cpu_cluster_pm_exit();
56                 cpu_pm_exit();
57                 imx_gpc_set_arm_power_in_lpm(false);
58                 imx6_enable_rbc(false);
59                 break;
60         default:
61                 break;
62         }
63
64         imx6_set_lpm(WAIT_CLOCKED);
65
66         return index;
67 }
68
69 static struct cpuidle_driver imx6sx_cpuidle_driver = {
70         .name = "imx6sx_cpuidle",
71         .owner = THIS_MODULE,
72         .states = {
73                 /* WFI */
74                 ARM_CPUIDLE_WFI_STATE,
75                 /* WAIT */
76                 {
77                         .exit_latency = 50,
78                         .target_residency = 75,
79                         .flags = CPUIDLE_FLAG_TIMER_STOP,
80                         .enter = imx6sx_enter_wait,
81                         .name = "WAIT",
82                         .desc = "Clock off",
83                 },
84                 /* WAIT + ARM power off  */
85                 {
86                         /*
87                          * ARM gating 31us * 5 + RBC clear 65us
88                          * and some margin for SW execution, here set it
89                          * to 300us.
90                          */
91                         .exit_latency = 300,
92                         .target_residency = 500,
93                         .flags = CPUIDLE_FLAG_TIMER_STOP,
94                         .enter = imx6sx_enter_wait,
95                         .name = "LOW-POWER-IDLE",
96                         .desc = "ARM power off",
97                 },
98         },
99         .state_count = 3,
100         .safe_state_index = 0,
101 };
102
103 int __init imx6sx_cpuidle_init(void)
104 {
105         imx6_set_int_mem_clk_lpm(true);
106         imx6_enable_rbc(false);
107         imx_gpc_set_l2_mem_power_in_lpm(false);
108         /*
109          * set ARM power up/down timing to the fastest,
110          * sw2iso and sw can be set to one 32K cycle = 31us
111          * except for power up sw2iso which need to be
112          * larger than LDO ramp up time.
113          */
114         imx_gpc_set_arm_power_up_timing(cpu_is_imx6sx() ? 0xf : 0x2, 1);
115         imx_gpc_set_arm_power_down_timing(1, 1);
116
117         return cpuidle_register(&imx6sx_cpuidle_driver, NULL);
118 }