arch/arm/mach-davinci/mux.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * Pin-multiplex helper macros for TI DaVinci family devices
   4  *
   5  * Author: Vladimir Barinov, MontaVista Software, Inc. <source@mvista.com>
   6  *
   7  * 2007 (c) MontaVista Software, Inc.
   8  *
   9  * Copyright (C) 2008 Texas Instruments.
  10  */
  11 #ifndef _MACH_DAVINCI_MUX_H_
  12 #define _MACH_DAVINCI_MUX_H_
  13
  14 struct mux_config {
  15         const char *name;
  16         const char *mux_reg_name;
  17         const unsigned char mux_reg;
  18         const unsigned char mask_offset;
  19         const unsigned char mask;
  20         const unsigned char mode;
  21         bool debug;
  22 };
  23
  24 enum davinci_dm644x_index {
  25         /* ATA and HDDIR functions */
  26         DM644X_HDIREN,
  27         DM644X_ATAEN,
  28         DM644X_ATAEN_DISABLE,
  29
  30         /* HPI functions */
  31         DM644X_HPIEN_DISABLE,
  32
  33         /* AEAW functions */
  34         DM644X_AEAW,
  35         DM644X_AEAW0,
  36         DM644X_AEAW1,
  37         DM644X_AEAW2,
  38         DM644X_AEAW3,
  39         DM644X_AEAW4,
  40
  41         /* Memory Stick */
  42         DM644X_MSTK,
  43
  44         /* I2C */
  45         DM644X_I2C,
  46
  47         /* ASP function */
  48         DM644X_MCBSP,
  49
  50         /* UART1 */
  51         DM644X_UART1,
  52
  53         /* UART2 */
  54         DM644X_UART2,
  55
  56         /* PWM0 */
  57         DM644X_PWM0,
  58
  59         /* PWM1 */
  60         DM644X_PWM1,
  61
  62         /* PWM2 */
  63         DM644X_PWM2,
  64
  65         /* VLYNQ function */
  66         DM644X_VLYNQEN,
  67         DM644X_VLSCREN,
  68         DM644X_VLYNQWD,
  69
  70         /* EMAC and MDIO function */
  71         DM644X_EMACEN,
  72
  73         /* GPIO3V[0:16] pins */
  74         DM644X_GPIO3V,
  75
  76         /* GPIO pins */
  77         DM644X_GPIO0,
  78         DM644X_GPIO3,
  79         DM644X_GPIO43_44,
  80         DM644X_GPIO46_47,
  81
  82         /* VPBE */
  83         DM644X_RGB666,
  84
  85         /* LCD */
  86         DM644X_LOEEN,
  87         DM644X_LFLDEN,
  88 };
  89
  90 enum davinci_dm646x_index {
  91         /* ATA function */
  92         DM646X_ATAEN,
  93
  94         /* AUDIO Clock */
  95         DM646X_AUDCK1,
  96         DM646X_AUDCK0,
  97
  98         /* CRGEN Control */
  99         DM646X_CRGMUX,
 100
 101         /* VPIF Control */
 102         DM646X_STSOMUX_DISABLE,
 103         DM646X_STSIMUX_DISABLE,
 104         DM646X_PTSOMUX_DISABLE,
 105         DM646X_PTSIMUX_DISABLE,
 106
 107         /* TSIF Control */
 108         DM646X_STSOMUX,
 109         DM646X_STSIMUX,
 110         DM646X_PTSOMUX_PARALLEL,
 111         DM646X_PTSIMUX_PARALLEL,
 112         DM646X_PTSOMUX_SERIAL,
 113         DM646X_PTSIMUX_SERIAL,
 114 };
 115
 116 enum davinci_dm355_index {
 117         /* MMC/SD 0 */
 118         DM355_MMCSD0,
 119
 120         /* MMC/SD 1 */
 121         DM355_SD1_CLK,
 122         DM355_SD1_CMD,
 123         DM355_SD1_DATA3,
 124         DM355_SD1_DATA2,
 125         DM355_SD1_DATA1,
 126         DM355_SD1_DATA0,
 127
 128         /* I2C */
 129         DM355_I2C_SDA,
 130         DM355_I2C_SCL,
 131
 132         /* ASP0 function */
 133         DM355_MCBSP0_BDX,
 134         DM355_MCBSP0_X,
 135         DM355_MCBSP0_BFSX,
 136         DM355_MCBSP0_BDR,
 137         DM355_MCBSP0_R,
 138         DM355_MCBSP0_BFSR,
 139
 140         /* SPI0 */
 141         DM355_SPI0_SDI,
 142         DM355_SPI0_SDENA0,
 143         DM355_SPI0_SDENA1,
 144
 145         /* IRQ muxing */
 146         DM355_INT_EDMA_CC,
 147         DM355_INT_EDMA_TC0_ERR,
 148         DM355_INT_EDMA_TC1_ERR,
 149
 150         /* EDMA event muxing */
 151         DM355_EVT8_ASP1_TX,
 152         DM355_EVT9_ASP1_RX,
 153         DM355_EVT26_MMC0_RX,
 154
 155         /* Video Out */
 156         DM355_VOUT_FIELD,
 157         DM355_VOUT_FIELD_G70,
 158         DM355_VOUT_HVSYNC,
 159         DM355_VOUT_COUTL_EN,
 160         DM355_VOUT_COUTH_EN,
 161
 162         /* Video In Pin Mux */
 163         DM355_VIN_PCLK,
 164         DM355_VIN_CAM_WEN,
 165         DM355_VIN_CAM_VD,
 166         DM355_VIN_CAM_HD,
 167         DM355_VIN_YIN_EN,
 168         DM355_VIN_CINL_EN,
 169         DM355_VIN_CINH_EN,
 170 };
 171
 172 enum davinci_dm365_index {
 173         /* MMC/SD 0 */
 174         DM365_MMCSD0,
 175
 176         /* MMC/SD 1 */
 177         DM365_SD1_CLK,
 178         DM365_SD1_CMD,
 179         DM365_SD1_DATA3,
 180         DM365_SD1_DATA2,
 181         DM365_SD1_DATA1,
 182         DM365_SD1_DATA0,
 183
 184         /* I2C */
 185         DM365_I2C_SDA,
 186         DM365_I2C_SCL,
 187
 188         /* AEMIF */
 189         DM365_AEMIF_AR_A14,
 190         DM365_AEMIF_AR_BA0,
 191         DM365_AEMIF_A3,
 192         DM365_AEMIF_A7,
 193         DM365_AEMIF_D15_8,
 194         DM365_AEMIF_CE0,
 195         DM365_AEMIF_CE1,
 196         DM365_AEMIF_WE_OE,
 197
 198         /* ASP0 function */
 199         DM365_MCBSP0_BDX,
 200         DM365_MCBSP0_X,
 201         DM365_MCBSP0_BFSX,
 202         DM365_MCBSP0_BDR,
 203         DM365_MCBSP0_R,
 204         DM365_MCBSP0_BFSR,
 205
 206         /* SPI0 */
 207         DM365_SPI0_SCLK,
 208         DM365_SPI0_SDI,
 209         DM365_SPI0_SDO,
 210         DM365_SPI0_SDENA0,
 211         DM365_SPI0_SDENA1,
 212
 213         /* UART */
 214         DM365_UART0_RXD,
 215         DM365_UART0_TXD,
 216         DM365_UART1_RXD,
 217         DM365_UART1_TXD,
 218         DM365_UART1_RTS,
 219         DM365_UART1_CTS,
 220
 221         /* EMAC */
 222         DM365_EMAC_TX_EN,
 223         DM365_EMAC_TX_CLK,
 224         DM365_EMAC_COL,
 225         DM365_EMAC_TXD3,
 226         DM365_EMAC_TXD2,
 227         DM365_EMAC_TXD1,
 228         DM365_EMAC_TXD0,
 229         DM365_EMAC_RXD3,
 230         DM365_EMAC_RXD2,
 231         DM365_EMAC_RXD1,
 232         DM365_EMAC_RXD0,
 233         DM365_EMAC_RX_CLK,
 234         DM365_EMAC_RX_DV,
 235         DM365_EMAC_RX_ER,
 236         DM365_EMAC_CRS,
 237         DM365_EMAC_MDIO,
 238         DM365_EMAC_MDCLK,
 239
 240         /* Key Scan */
 241         DM365_KEYSCAN,
 242
 243         /* PWM */
 244         DM365_PWM0,
 245         DM365_PWM0_G23,
 246         DM365_PWM1,
 247         DM365_PWM1_G25,
 248         DM365_PWM2_G87,
 249         DM365_PWM2_G88,
 250         DM365_PWM2_G89,
 251         DM365_PWM2_G90,
 252         DM365_PWM3_G80,
 253         DM365_PWM3_G81,
 254         DM365_PWM3_G85,
 255         DM365_PWM3_G86,
 256
 257         /* SPI1 */
 258         DM365_SPI1_SCLK,
 259         DM365_SPI1_SDO,
 260         DM365_SPI1_SDI,
 261         DM365_SPI1_SDENA0,
 262         DM365_SPI1_SDENA1,
 263
 264         /* SPI2 */
 265         DM365_SPI2_SCLK,
 266         DM365_SPI2_SDO,
 267         DM365_SPI2_SDI,
 268         DM365_SPI2_SDENA0,
 269         DM365_SPI2_SDENA1,
 270
 271         /* SPI3 */
 272         DM365_SPI3_SCLK,
 273         DM365_SPI3_SDO,
 274         DM365_SPI3_SDI,
 275         DM365_SPI3_SDENA0,
 276         DM365_SPI3_SDENA1,
 277
 278         /* SPI4 */
 279         DM365_SPI4_SCLK,
 280         DM365_SPI4_SDO,
 281         DM365_SPI4_SDI,
 282         DM365_SPI4_SDENA0,
 283         DM365_SPI4_SDENA1,
 284
 285         /* Clock */
 286         DM365_CLKOUT0,
 287         DM365_CLKOUT1,
 288         DM365_CLKOUT2,
 289
 290         /* GPIO */
 291         DM365_GPIO20,
 292         DM365_GPIO30,
 293         DM365_GPIO31,
 294         DM365_GPIO32,
 295         DM365_GPIO33,
 296         DM365_GPIO40,
 297         DM365_GPIO64_57,
 298
 299         /* Video */
 300         DM365_VOUT_FIELD,
 301         DM365_VOUT_FIELD_G81,
 302         DM365_VOUT_HVSYNC,
 303         DM365_VOUT_COUTL_EN,
 304         DM365_VOUT_COUTH_EN,
 305         DM365_VIN_CAM_WEN,
 306         DM365_VIN_CAM_VD,
 307         DM365_VIN_CAM_HD,
 308         DM365_VIN_YIN4_7_EN,
 309         DM365_VIN_YIN0_3_EN,
 310
 311         /* IRQ muxing */
 312         DM365_INT_EDMA_CC,
 313         DM365_INT_EDMA_TC0_ERR,
 314         DM365_INT_EDMA_TC1_ERR,
 315         DM365_INT_EDMA_TC2_ERR,
 316         DM365_INT_EDMA_TC3_ERR,
 317         DM365_INT_PRTCSS,
 318         DM365_INT_EMAC_RXTHRESH,
 319         DM365_INT_EMAC_RXPULSE,
 320         DM365_INT_EMAC_TXPULSE,
 321         DM365_INT_EMAC_MISCPULSE,
 322         DM365_INT_IMX0_ENABLE,
 323         DM365_INT_IMX0_DISABLE,
 324         DM365_INT_HDVICP_ENABLE,
 325         DM365_INT_HDVICP_DISABLE,
 326         DM365_INT_IMX1_ENABLE,
 327         DM365_INT_IMX1_DISABLE,
 328         DM365_INT_NSF_ENABLE,
 329         DM365_INT_NSF_DISABLE,
 330
 331         /* EDMA event muxing */
 332         DM365_EVT2_ASP_TX,
 333         DM365_EVT3_ASP_RX,
 334         DM365_EVT2_VC_TX,
 335         DM365_EVT3_VC_RX,
 336         DM365_EVT26_MMC0_RX,
 337 };
 338
 339 enum da830_index {
 340         DA830_GPIO7_14,
 341         DA830_RTCK,
 342         DA830_GPIO7_15,
 343         DA830_EMU_0,
 344         DA830_EMB_SDCKE,
 345         DA830_EMB_CLK_GLUE,
 346         DA830_EMB_CLK,
 347         DA830_NEMB_CS_0,
 348         DA830_NEMB_CAS,
 349         DA830_NEMB_RAS,
 350         DA830_NEMB_WE,
 351         DA830_EMB_BA_1,
 352         DA830_EMB_BA_0,
 353         DA830_EMB_A_0,
 354         DA830_EMB_A_1,
 355         DA830_EMB_A_2,
 356         DA830_EMB_A_3,
 357         DA830_EMB_A_4,
 358         DA830_EMB_A_5,
 359         DA830_GPIO7_0,
 360         DA830_GPIO7_1,
 361         DA830_GPIO7_2,
 362         DA830_GPIO7_3,
 363         DA830_GPIO7_4,
 364         DA830_GPIO7_5,
 365         DA830_GPIO7_6,
 366         DA830_GPIO7_7,
 367         DA830_EMB_A_6,
 368         DA830_EMB_A_7,
 369         DA830_EMB_A_8,
 370         DA830_EMB_A_9,
 371         DA830_EMB_A_10,
 372         DA830_EMB_A_11,
 373         DA830_EMB_A_12,
 374         DA830_EMB_D_31,
 375         DA830_GPIO7_8,
 376         DA830_GPIO7_9,
 377         DA830_GPIO7_10,
 378         DA830_GPIO7_11,
 379         DA830_GPIO7_12,
 380         DA830_GPIO7_13,
 381         DA830_GPIO3_13,
 382         DA830_EMB_D_30,
 383         DA830_EMB_D_29,
 384         DA830_EMB_D_28,
 385         DA830_EMB_D_27,
 386         DA830_EMB_D_26,
 387         DA830_EMB_D_25,
 388         DA830_EMB_D_24,
 389         DA830_EMB_D_23,
 390         DA830_EMB_D_22,
 391         DA830_EMB_D_21,
 392         DA830_EMB_D_20,
 393         DA830_EMB_D_19,
 394         DA830_EMB_D_18,
 395         DA830_EMB_D_17,
 396         DA830_EMB_D_16,
 397         DA830_NEMB_WE_DQM_3,
 398         DA830_NEMB_WE_DQM_2,
 399         DA830_EMB_D_0,
 400         DA830_EMB_D_1,
 401         DA830_EMB_D_2,
 402         DA830_EMB_D_3,
 403         DA830_EMB_D_4,
 404         DA830_EMB_D_5,
 405         DA830_EMB_D_6,
 406         DA830_GPIO6_0,
 407         DA830_GPIO6_1,
 408         DA830_GPIO6_2,
 409         DA830_GPIO6_3,
 410         DA830_GPIO6_4,
 411         DA830_GPIO6_5,
 412         DA830_GPIO6_6,
 413         DA830_EMB_D_7,
 414         DA830_EMB_D_8,
 415         DA830_EMB_D_9,
 416         DA830_EMB_D_10,
 417         DA830_EMB_D_11,
 418         DA830_EMB_D_12,
 419         DA830_EMB_D_13,
 420         DA830_EMB_D_14,
 421         DA830_GPIO6_7,
 422         DA830_GPIO6_8,
 423         DA830_GPIO6_9,
 424         DA830_GPIO6_10,
 425         DA830_GPIO6_11,
 426         DA830_GPIO6_12,
 427         DA830_GPIO6_13,
 428         DA830_GPIO6_14,
 429         DA830_EMB_D_15,
 430         DA830_NEMB_WE_DQM_1,
 431         DA830_NEMB_WE_DQM_0,
 432         DA830_SPI0_SOMI_0,
 433         DA830_SPI0_SIMO_0,
 434         DA830_SPI0_CLK,
 435         DA830_NSPI0_ENA,
 436         DA830_NSPI0_SCS_0,
 437         DA830_EQEP0I,
 438         DA830_EQEP0S,
 439         DA830_EQEP1I,
 440         DA830_NUART0_CTS,
 441         DA830_NUART0_RTS,
 442         DA830_EQEP0A,
 443         DA830_EQEP0B,
 444         DA830_GPIO6_15,
 445         DA830_GPIO5_14,
 446         DA830_GPIO5_15,
 447         DA830_GPIO5_0,
 448         DA830_GPIO5_1,
 449         DA830_GPIO5_2,
 450         DA830_GPIO5_3,
 451         DA830_GPIO5_4,
 452         DA830_SPI1_SOMI_0,
 453         DA830_SPI1_SIMO_0,
 454         DA830_SPI1_CLK,
 455         DA830_UART0_RXD,
 456         DA830_UART0_TXD,
 457         DA830_AXR1_10,
 458         DA830_AXR1_11,
 459         DA830_NSPI1_ENA,
 460         DA830_I2C1_SCL,
 461         DA830_I2C1_SDA,
 462         DA830_EQEP1S,
 463         DA830_I2C0_SDA,
 464         DA830_I2C0_SCL,
 465         DA830_UART2_RXD,
 466         DA830_TM64P0_IN12,
 467         DA830_TM64P0_OUT12,
 468         DA830_GPIO5_5,
 469         DA830_GPIO5_6,
 470         DA830_GPIO5_7,
 471         DA830_GPIO5_8,
 472         DA830_GPIO5_9,
 473         DA830_GPIO5_10,
 474         DA830_GPIO5_11,
 475         DA830_GPIO5_12,
 476         DA830_NSPI1_SCS_0,
 477         DA830_USB0_DRVVBUS,
 478         DA830_AHCLKX0,
 479         DA830_ACLKX0,
 480         DA830_AFSX0,
 481         DA830_AHCLKR0,
 482         DA830_ACLKR0,
 483         DA830_AFSR0,
 484         DA830_UART2_TXD,
 485         DA830_AHCLKX2,
 486         DA830_ECAP0_APWM0,
 487         DA830_RMII_MHZ_50_CLK,
 488         DA830_ECAP1_APWM1,
 489         DA830_USB_REFCLKIN,
 490         DA830_GPIO5_13,
 491         DA830_GPIO4_15,
 492         DA830_GPIO2_11,
 493         DA830_GPIO2_12,
 494         DA830_GPIO2_13,
 495         DA830_GPIO2_14,
 496         DA830_GPIO2_15,
 497         DA830_GPIO3_12,
 498         DA830_AMUTE0,
 499         DA830_AXR0_0,
 500         DA830_AXR0_1,
 501         DA830_AXR0_2,
 502         DA830_AXR0_3,
 503         DA830_AXR0_4,
 504         DA830_AXR0_5,
 505         DA830_AXR0_6,
 506         DA830_RMII_TXD_0,
 507         DA830_RMII_TXD_1,
 508         DA830_RMII_TXEN,
 509         DA830_RMII_CRS_DV,
 510         DA830_RMII_RXD_0,
 511         DA830_RMII_RXD_1,
 512         DA830_RMII_RXER,
 513         DA830_AFSR2,
 514         DA830_ACLKX2,
 515         DA830_AXR2_3,
 516         DA830_AXR2_2,
 517         DA830_AXR2_1,
 518         DA830_AFSX2,
 519         DA830_ACLKR2,
 520         DA830_NRESETOUT,
 521         DA830_GPIO3_0,
 522         DA830_GPIO3_1,
 523         DA830_GPIO3_2,
 524         DA830_GPIO3_3,
 525         DA830_GPIO3_4,
 526         DA830_GPIO3_5,
 527         DA830_GPIO3_6,
 528         DA830_AXR0_7,
 529         DA830_AXR0_8,
 530         DA830_UART1_RXD,
 531         DA830_UART1_TXD,
 532         DA830_AXR0_11,
 533         DA830_AHCLKX1,
 534         DA830_ACLKX1,
 535         DA830_AFSX1,
 536         DA830_MDIO_CLK,
 537         DA830_MDIO_D,
 538         DA830_AXR0_9,
 539         DA830_AXR0_10,
 540         DA830_EPWM0B,
 541         DA830_EPWM0A,
 542         DA830_EPWMSYNCI,
 543         DA830_AXR2_0,
 544         DA830_EPWMSYNC0,
 545         DA830_GPIO3_7,
 546         DA830_GPIO3_8,
 547         DA830_GPIO3_9,
 548         DA830_GPIO3_10,
 549         DA830_GPIO3_11,
 550         DA830_GPIO3_14,
 551         DA830_GPIO3_15,
 552         DA830_GPIO4_10,
 553         DA830_AHCLKR1,
 554         DA830_ACLKR1,
 555         DA830_AFSR1,
 556         DA830_AMUTE1,
 557         DA830_AXR1_0,
 558         DA830_AXR1_1,
 559         DA830_AXR1_2,
 560         DA830_AXR1_3,
 561         DA830_ECAP2_APWM2,
 562         DA830_EHRPWMGLUETZ,
 563         DA830_EQEP1A,
 564         DA830_GPIO4_11,
 565         DA830_GPIO4_12,
 566         DA830_GPIO4_13,
 567         DA830_GPIO4_14,
 568         DA830_GPIO4_0,
 569         DA830_GPIO4_1,
 570         DA830_GPIO4_2,
 571         DA830_GPIO4_3,
 572         DA830_AXR1_4,
 573         DA830_AXR1_5,
 574         DA830_AXR1_6,
 575         DA830_AXR1_7,
 576         DA830_AXR1_8,
 577         DA830_AXR1_9,
 578         DA830_EMA_D_0,
 579         DA830_EMA_D_1,
 580         DA830_EQEP1B,
 581         DA830_EPWM2B,
 582         DA830_EPWM2A,
 583         DA830_EPWM1B,
 584         DA830_EPWM1A,
 585         DA830_MMCSD_DAT_0,
 586         DA830_MMCSD_DAT_1,
 587         DA830_UHPI_HD_0,
 588         DA830_UHPI_HD_1,
 589         DA830_GPIO4_4,
 590         DA830_GPIO4_5,
 591         DA830_GPIO4_6,
 592         DA830_GPIO4_7,
 593         DA830_GPIO4_8,
 594         DA830_GPIO4_9,
 595         DA830_GPIO0_0,
 596         DA830_GPIO0_1,
 597         DA830_EMA_D_2,
 598         DA830_EMA_D_3,
 599         DA830_EMA_D_4,
 600         DA830_EMA_D_5,
 601         DA830_EMA_D_6,
 602         DA830_EMA_D_7,
 603         DA830_EMA_D_8,
 604         DA830_EMA_D_9,
 605         DA830_MMCSD_DAT_2,
 606         DA830_MMCSD_DAT_3,
 607         DA830_MMCSD_DAT_4,
 608         DA830_MMCSD_DAT_5,
 609         DA830_MMCSD_DAT_6,
 610         DA830_MMCSD_DAT_7,
 611         DA830_UHPI_HD_8,
 612         DA830_UHPI_HD_9,
 613         DA830_UHPI_HD_2,
 614         DA830_UHPI_HD_3,
 615         DA830_UHPI_HD_4,
 616         DA830_UHPI_HD_5,
 617         DA830_UHPI_HD_6,
 618         DA830_UHPI_HD_7,
 619         DA830_LCD_D_8,
 620         DA830_LCD_D_9,
 621         DA830_GPIO0_2,
 622         DA830_GPIO0_3,
 623         DA830_GPIO0_4,
 624         DA830_GPIO0_5,
 625         DA830_GPIO0_6,
 626         DA830_GPIO0_7,
 627         DA830_GPIO0_8,
 628         DA830_GPIO0_9,
 629         DA830_EMA_D_10,
 630         DA830_EMA_D_11,
 631         DA830_EMA_D_12,
 632         DA830_EMA_D_13,
 633         DA830_EMA_D_14,
 634         DA830_EMA_D_15,
 635         DA830_EMA_A_0,
 636         DA830_EMA_A_1,
 637         DA830_UHPI_HD_10,
 638         DA830_UHPI_HD_11,
 639         DA830_UHPI_HD_12,
 640         DA830_UHPI_HD_13,
 641         DA830_UHPI_HD_14,
 642         DA830_UHPI_HD_15,
 643         DA830_LCD_D_7,
 644         DA830_MMCSD_CLK,
 645         DA830_LCD_D_10,
 646         DA830_LCD_D_11,
 647         DA830_LCD_D_12,
 648         DA830_LCD_D_13,
 649         DA830_LCD_D_14,
 650         DA830_LCD_D_15,
 651         DA830_UHPI_HCNTL0,
 652         DA830_GPIO0_10,
 653         DA830_GPIO0_11,
 654         DA830_GPIO0_12,
 655         DA830_GPIO0_13,
 656         DA830_GPIO0_14,
 657         DA830_GPIO0_15,
 658         DA830_GPIO1_0,
 659         DA830_GPIO1_1,
 660         DA830_EMA_A_2,
 661         DA830_EMA_A_3,
 662         DA830_EMA_A_4,
 663         DA830_EMA_A_5,
 664         DA830_EMA_A_6,
 665         DA830_EMA_A_7,
 666         DA830_EMA_A_8,
 667         DA830_EMA_A_9,
 668         DA830_MMCSD_CMD,
 669         DA830_LCD_D_6,
 670         DA830_LCD_D_3,
 671         DA830_LCD_D_2,
 672         DA830_LCD_D_1,
 673         DA830_LCD_D_0,
 674         DA830_LCD_PCLK,
 675         DA830_LCD_HSYNC,
 676         DA830_UHPI_HCNTL1,
 677         DA830_GPIO1_2,
 678         DA830_GPIO1_3,
 679         DA830_GPIO1_4,
 680         DA830_GPIO1_5,
 681         DA830_GPIO1_6,
 682         DA830_GPIO1_7,
 683         DA830_GPIO1_8,
 684         DA830_GPIO1_9,
 685         DA830_EMA_A_10,
 686         DA830_EMA_A_11,
 687         DA830_EMA_A_12,
 688         DA830_EMA_BA_1,
 689         DA830_EMA_BA_0,
 690         DA830_EMA_CLK,
 691         DA830_EMA_SDCKE,
 692         DA830_NEMA_CAS,
 693         DA830_LCD_VSYNC,
 694         DA830_NLCD_AC_ENB_CS,
 695         DA830_LCD_MCLK,
 696         DA830_LCD_D_5,
 697         DA830_LCD_D_4,
 698         DA830_OBSCLK,
 699         DA830_NEMA_CS_4,
 700         DA830_UHPI_HHWIL,
 701         DA830_AHCLKR2,
 702         DA830_GPIO1_10,
 703         DA830_GPIO1_11,
 704         DA830_GPIO1_12,
 705         DA830_GPIO1_13,
 706         DA830_GPIO1_14,
 707         DA830_GPIO1_15,
 708         DA830_GPIO2_0,
 709         DA830_GPIO2_1,
 710         DA830_NEMA_RAS,
 711         DA830_NEMA_WE,
 712         DA830_NEMA_CS_0,
 713         DA830_NEMA_CS_2,
 714         DA830_NEMA_CS_3,
 715         DA830_NEMA_OE,
 716         DA830_NEMA_WE_DQM_1,
 717         DA830_NEMA_WE_DQM_0,
 718         DA830_NEMA_CS_5,
 719         DA830_UHPI_HRNW,
 720         DA830_NUHPI_HAS,
 721         DA830_NUHPI_HCS,
 722         DA830_NUHPI_HDS1,
 723         DA830_NUHPI_HDS2,
 724         DA830_NUHPI_HINT,
 725         DA830_AXR0_12,
 726         DA830_AMUTE2,
 727         DA830_AXR0_13,
 728         DA830_AXR0_14,
 729         DA830_AXR0_15,
 730         DA830_GPIO2_2,
 731         DA830_GPIO2_3,
 732         DA830_GPIO2_4,
 733         DA830_GPIO2_5,
 734         DA830_GPIO2_6,
 735         DA830_GPIO2_7,
 736         DA830_GPIO2_8,
 737         DA830_GPIO2_9,
 738         DA830_EMA_WAIT_0,
 739         DA830_NUHPI_HRDY,
 740         DA830_GPIO2_10,
 741 };
 742
 743 enum davinci_da850_index {
 744         /* UART0 function */
 745         DA850_NUART0_CTS,
 746         DA850_NUART0_RTS,
 747         DA850_UART0_RXD,
 748         DA850_UART0_TXD,
 749
 750         /* UART1 function */
 751         DA850_NUART1_CTS,
 752         DA850_NUART1_RTS,
 753         DA850_UART1_RXD,
 754         DA850_UART1_TXD,
 755
 756         /* UART2 function */
 757         DA850_NUART2_CTS,
 758         DA850_NUART2_RTS,
 759         DA850_UART2_RXD,
 760         DA850_UART2_TXD,
 761
 762         /* I2C1 function */
 763         DA850_I2C1_SCL,
 764         DA850_I2C1_SDA,
 765
 766         /* I2C0 function */
 767         DA850_I2C0_SDA,
 768         DA850_I2C0_SCL,
 769
 770         /* EMAC function */
 771         DA850_MII_TXEN,
 772         DA850_MII_TXCLK,
 773         DA850_MII_COL,
 774         DA850_MII_TXD_3,
 775         DA850_MII_TXD_2,
 776         DA850_MII_TXD_1,
 777         DA850_MII_TXD_0,
 778         DA850_MII_RXER,
 779         DA850_MII_CRS,
 780         DA850_MII_RXCLK,
 781         DA850_MII_RXDV,
 782         DA850_MII_RXD_3,
 783         DA850_MII_RXD_2,
 784         DA850_MII_RXD_1,
 785         DA850_MII_RXD_0,
 786         DA850_MDIO_CLK,
 787         DA850_MDIO_D,
 788         DA850_RMII_TXD_0,
 789         DA850_RMII_TXD_1,
 790         DA850_RMII_TXEN,
 791         DA850_RMII_CRS_DV,
 792         DA850_RMII_RXD_0,
 793         DA850_RMII_RXD_1,
 794         DA850_RMII_RXER,
 795         DA850_RMII_MHZ_50_CLK,
 796
 797         /* McASP function */
 798         DA850_ACLKR,
 799         DA850_ACLKX,
 800         DA850_AFSR,
 801         DA850_AFSX,
 802         DA850_AHCLKR,
 803         DA850_AHCLKX,
 804         DA850_AMUTE,
 805         DA850_AXR_15,
 806         DA850_AXR_14,
 807         DA850_AXR_13,
 808         DA850_AXR_12,
 809         DA850_AXR_11,
 810         DA850_AXR_10,
 811         DA850_AXR_9,
 812         DA850_AXR_8,
 813         DA850_AXR_7,
 814         DA850_AXR_6,
 815         DA850_AXR_5,
 816         DA850_AXR_4,
 817         DA850_AXR_3,
 818         DA850_AXR_2,
 819         DA850_AXR_1,
 820         DA850_AXR_0,
 821
 822         /* LCD function */
 823         DA850_LCD_D_7,
 824         DA850_LCD_D_6,
 825         DA850_LCD_D_5,
 826         DA850_LCD_D_4,
 827         DA850_LCD_D_3,
 828         DA850_LCD_D_2,
 829         DA850_LCD_D_1,
 830         DA850_LCD_D_0,
 831         DA850_LCD_D_15,
 832         DA850_LCD_D_14,
 833         DA850_LCD_D_13,
 834         DA850_LCD_D_12,
 835         DA850_LCD_D_11,
 836         DA850_LCD_D_10,
 837         DA850_LCD_D_9,
 838         DA850_LCD_D_8,
 839         DA850_LCD_PCLK,
 840         DA850_LCD_HSYNC,
 841         DA850_LCD_VSYNC,
 842         DA850_NLCD_AC_ENB_CS,
 843
 844         /* MMC/SD0 function */
 845         DA850_MMCSD0_DAT_0,
 846         DA850_MMCSD0_DAT_1,
 847         DA850_MMCSD0_DAT_2,
 848         DA850_MMCSD0_DAT_3,
 849         DA850_MMCSD0_CLK,
 850         DA850_MMCSD0_CMD,
 851
 852         /* MMC/SD1 function */
 853         DA850_MMCSD1_DAT_0,
 854         DA850_MMCSD1_DAT_1,
 855         DA850_MMCSD1_DAT_2,
 856         DA850_MMCSD1_DAT_3,
 857         DA850_MMCSD1_CLK,
 858         DA850_MMCSD1_CMD,
 859
 860         /* EMIF2.5/EMIFA function */
 861         DA850_EMA_D_7,
 862         DA850_EMA_D_6,
 863         DA850_EMA_D_5,
 864         DA850_EMA_D_4,
 865         DA850_EMA_D_3,
 866         DA850_EMA_D_2,
 867         DA850_EMA_D_1,
 868         DA850_EMA_D_0,
 869         DA850_EMA_A_1,
 870         DA850_EMA_A_2,
 871         DA850_NEMA_CS_3,
 872         DA850_NEMA_CS_4,
 873         DA850_NEMA_WE,
 874         DA850_NEMA_OE,
 875         DA850_EMA_D_15,
 876         DA850_EMA_D_14,
 877         DA850_EMA_D_13,
 878         DA850_EMA_D_12,
 879         DA850_EMA_D_11,
 880         DA850_EMA_D_10,
 881         DA850_EMA_D_9,
 882         DA850_EMA_D_8,
 883         DA850_EMA_A_0,
 884         DA850_EMA_A_3,
 885         DA850_EMA_A_4,
 886         DA850_EMA_A_5,
 887         DA850_EMA_A_6,
 888         DA850_EMA_A_7,
 889         DA850_EMA_A_8,
 890         DA850_EMA_A_9,
 891         DA850_EMA_A_10,
 892         DA850_EMA_A_11,
 893         DA850_EMA_A_12,
 894         DA850_EMA_A_13,
 895         DA850_EMA_A_14,
 896         DA850_EMA_A_15,
 897         DA850_EMA_A_16,
 898         DA850_EMA_A_17,
 899         DA850_EMA_A_18,
 900         DA850_EMA_A_19,
 901         DA850_EMA_A_20,
 902         DA850_EMA_A_21,
 903         DA850_EMA_A_22,
 904         DA850_EMA_A_23,
 905         DA850_EMA_BA_1,
 906         DA850_EMA_CLK,
 907         DA850_EMA_WAIT_1,
 908         DA850_NEMA_CS_2,
 909
 910         /* GPIO function */
 911         DA850_GPIO2_4,
 912         DA850_GPIO2_6,
 913         DA850_GPIO2_8,
 914         DA850_GPIO2_15,
 915         DA850_GPIO3_12,
 916         DA850_GPIO3_13,
 917         DA850_GPIO4_0,
 918         DA850_GPIO4_1,
 919         DA850_GPIO6_9,
 920         DA850_GPIO6_10,
 921         DA850_GPIO6_13,
 922         DA850_RTC_ALARM,
 923
 924         /* VPIF Capture */
 925         DA850_VPIF_DIN0,
 926         DA850_VPIF_DIN1,
 927         DA850_VPIF_DIN2,
 928         DA850_VPIF_DIN3,
 929         DA850_VPIF_DIN4,
 930         DA850_VPIF_DIN5,
 931         DA850_VPIF_DIN6,
 932         DA850_VPIF_DIN7,
 933         DA850_VPIF_DIN8,
 934         DA850_VPIF_DIN9,
 935         DA850_VPIF_DIN10,
 936         DA850_VPIF_DIN11,
 937         DA850_VPIF_DIN12,
 938         DA850_VPIF_DIN13,
 939         DA850_VPIF_DIN14,
 940         DA850_VPIF_DIN15,
 941         DA850_VPIF_CLKIN0,
 942         DA850_VPIF_CLKIN1,
 943         DA850_VPIF_CLKIN2,
 944         DA850_VPIF_CLKIN3,
 945
 946         /* VPIF Display */
 947         DA850_VPIF_DOUT0,
 948         DA850_VPIF_DOUT1,
 949         DA850_VPIF_DOUT2,
 950         DA850_VPIF_DOUT3,
 951         DA850_VPIF_DOUT4,
 952         DA850_VPIF_DOUT5,
 953         DA850_VPIF_DOUT6,
 954         DA850_VPIF_DOUT7,
 955         DA850_VPIF_DOUT8,
 956         DA850_VPIF_DOUT9,
 957         DA850_VPIF_DOUT10,
 958         DA850_VPIF_DOUT11,
 959         DA850_VPIF_DOUT12,
 960         DA850_VPIF_DOUT13,
 961         DA850_VPIF_DOUT14,
 962         DA850_VPIF_DOUT15,
 963         DA850_VPIF_CLKO2,
 964         DA850_VPIF_CLKO3,
 965 };
 966
 967 #define PINMUX(x)               (4 * (x))
 968
 969 #ifdef CONFIG_DAVINCI_MUX
 970 /* setup pin muxing */
 971 extern int davinci_cfg_reg(unsigned long reg_cfg);
 972 extern int davinci_cfg_reg_list(const short pins[]);
 973 #else
 974 /* boot loader does it all (no warnings from CONFIG_DAVINCI_MUX_WARNINGS) */
 975 static inline int davinci_cfg_reg(unsigned long reg_cfg) { return 0; }
 976 static inline int davinci_cfg_reg_list(const short pins[])
 977 {
 978         return 0;
 979 }
 980 #endif
 981
 982
 983 #define MUX_CFG(soc, desc, muxreg, mode_offset, mode_mask, mux_mode, dbg)\
 984 [soc##_##desc] = {                                                      \
 985                         .name =  #desc,                                 \
 986                         .debug = dbg,                                   \
 987                         .mux_reg_name = "PINMUX"#muxreg,                \
 988                         .mux_reg = PINMUX(muxreg),                      \
 989                         .mask_offset = mode_offset,                     \
 990                         .mask = mode_mask,                              \
 991                         .mode = mux_mode,                               \
 992                 },
 993
 994 #define INT_CFG(soc, desc, mode_offset, mode_mask, mux_mode, dbg)       \
 995 [soc##_##desc] = {                                                      \
 996                         .name =  #desc,                                 \
 997                         .debug = dbg,                                   \
 998                         .mux_reg_name = "INTMUX",                       \
 999                         .mux_reg = INTMUX,                              \
1000                         .mask_offset = mode_offset,                     \
1001                         .mask = mode_mask,                              \
1002                         .mode = mux_mode,                               \
1003                 },
1004
1005 #define EVT_CFG(soc, desc, mode_offset, mode_mask, mux_mode, dbg)       \
1006 [soc##_##desc] = {                                                      \
1007                         .name =  #desc,                                 \
1008                         .debug = dbg,                                   \
1009                         .mux_reg_name = "EVTMUX",                       \
1010                         .mux_reg = EVTMUX,                              \
1011                         .mask_offset = mode_offset,                     \
1012                         .mask = mode_mask,                              \
1013                         .mode = mux_mode,                               \
1014                 },
1015
1016 #endif /* _MACH_DAVINCI_MUX_H */