2 * Chip specific defines for DA8XX/OMAP L1XX SoC
4 * Author: Mark A. Greer <mgreer@mvista.com>
6 * 2007, 2009-2010 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
11 #ifndef __ASM_ARCH_DAVINCI_DA8XX_H
12 #define __ASM_ARCH_DAVINCI_DA8XX_H
14 #include <video/da8xx-fb.h>
16 #include <linux/platform_device.h>
17 #include <linux/davinci_emac.h>
18 #include <linux/spi/spi.h>
19 #include <linux/platform_data/davinci_asp.h>
20 #include <linux/reboot.h>
21 #include <linux/videodev2.h>
23 #include <mach/serial.h>
25 #include <linux/platform_data/edma.h>
26 #include <linux/platform_data/i2c-davinci.h>
27 #include <linux/platform_data/mmc-davinci.h>
28 #include <linux/platform_data/usb-davinci.h>
29 #include <linux/platform_data/spi-davinci.h>
30 #include <linux/platform_data/uio_pruss.h>
32 #include <media/davinci/vpif_types.h>
34 extern void __iomem *da8xx_syscfg0_base;
35 extern void __iomem *da8xx_syscfg1_base;
38 * If the DA850/OMAP-L138/AM18x SoC on board is of a higher speed grade
39 * (than the regular 300MHz variant), the board code should set this up
40 * with the supported speed before calling da850_register_cpufreq().
42 extern unsigned int da850_max_speed;
45 * The cp_intc interrupt controller for the da8xx isn't in the same
46 * chunk of physical memory space as the other registers (like it is
47 * on the davincis) so it needs to be mapped separately. It will be
48 * mapped early on when the I/O space is mapped and we'll put it just
49 * before the I/O space in the processor's virtual memory space.
51 #define DA8XX_CP_INTC_BASE 0xfffee000
52 #define DA8XX_CP_INTC_SIZE SZ_8K
53 #define DA8XX_CP_INTC_VIRT (IO_VIRT - DA8XX_CP_INTC_SIZE - SZ_4K)
55 #define DA8XX_SYSCFG0_BASE (IO_PHYS + 0x14000)
56 #define DA8XX_SYSCFG0_VIRT(x) (da8xx_syscfg0_base + (x))
57 #define DA8XX_JTAG_ID_REG 0x18
58 #define DA8XX_HOST1CFG_REG 0x44
59 #define DA8XX_CHIPSIG_REG 0x174
60 #define DA8XX_CFGCHIP0_REG 0x17c
61 #define DA8XX_CFGCHIP1_REG 0x180
62 #define DA8XX_CFGCHIP2_REG 0x184
63 #define DA8XX_CFGCHIP3_REG 0x188
65 #define DA8XX_SYSCFG1_BASE (IO_PHYS + 0x22C000)
66 #define DA8XX_SYSCFG1_VIRT(x) (da8xx_syscfg1_base + (x))
67 #define DA8XX_DEEPSLEEP_REG 0x8
68 #define DA8XX_PWRDN_REG 0x18
70 #define DA8XX_PSC0_BASE 0x01c10000
71 #define DA8XX_PLL0_BASE 0x01c11000
72 #define DA8XX_TIMER64P0_BASE 0x01c20000
73 #define DA8XX_TIMER64P1_BASE 0x01c21000
74 #define DA8XX_VPIF_BASE 0x01e17000
75 #define DA8XX_GPIO_BASE 0x01e26000
76 #define DA8XX_PSC1_BASE 0x01e27000
77 #define DA8XX_AEMIF_CS2_BASE 0x60000000
78 #define DA8XX_AEMIF_CS3_BASE 0x62000000
79 #define DA8XX_AEMIF_CTL_BASE 0x68000000
80 #define DA8XX_SHARED_RAM_BASE 0x80000000
81 #define DA8XX_ARM_RAM_BASE 0xffff0000
83 void da830_init(void);
84 void da850_init(void);
86 int da830_register_edma(struct edma_rsv_info *rsv);
87 int da850_register_edma(struct edma_rsv_info *rsv[2]);
88 int da8xx_register_i2c(int instance, struct davinci_i2c_platform_data *pdata);
89 int da8xx_register_spi_bus(int instance, unsigned num_chipselect);
90 int da8xx_register_watchdog(void);
91 int da8xx_register_usb20(unsigned mA, unsigned potpgt);
92 int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata);
93 int da8xx_register_emac(void);
94 int da8xx_register_uio_pruss(void);
95 int da8xx_register_lcdc(struct da8xx_lcdc_platform_data *pdata);
96 int da8xx_register_mmcsd0(struct davinci_mmc_config *config);
97 int da850_register_mmcsd1(struct davinci_mmc_config *config);
98 void da8xx_register_mcasp(int id, struct snd_platform_data *pdata);
99 int da8xx_register_rtc(void);
100 int da8xx_register_gpio(void *pdata);
101 int da850_register_cpufreq(char *async_clk);
102 int da8xx_register_cpuidle(void);
103 void __iomem *da8xx_get_mem_ctlr(void);
104 int da850_register_pm(struct platform_device *pdev);
105 int da850_register_sata(unsigned long refclkpn);
106 int da850_register_vpif(void);
107 int da850_register_vpif_display
108 (struct vpif_display_config *display_config);
109 int da850_register_vpif_capture
110 (struct vpif_capture_config *capture_config);
111 void da8xx_restart(enum reboot_mode mode, const char *cmd);
112 void da8xx_rproc_reserve_cma(void);
113 int da8xx_register_rproc(void);
114 int da850_register_gpio(void);
115 int da830_register_gpio(void);
117 extern struct platform_device da8xx_serial_device[];
118 extern struct emac_platform_data da8xx_emac_pdata;
119 extern struct da8xx_lcdc_platform_data sharp_lcd035q3dg01_pdata;
120 extern struct da8xx_lcdc_platform_data sharp_lk043t1dg01_pdata;
123 extern const short da830_emif25_pins[];
124 extern const short da830_spi0_pins[];
125 extern const short da830_spi1_pins[];
126 extern const short da830_mmc_sd_pins[];
127 extern const short da830_uart0_pins[];
128 extern const short da830_uart1_pins[];
129 extern const short da830_uart2_pins[];
130 extern const short da830_usb20_pins[];
131 extern const short da830_usb11_pins[];
132 extern const short da830_uhpi_pins[];
133 extern const short da830_cpgmac_pins[];
134 extern const short da830_emif3c_pins[];
135 extern const short da830_mcasp0_pins[];
136 extern const short da830_mcasp1_pins[];
137 extern const short da830_mcasp2_pins[];
138 extern const short da830_i2c0_pins[];
139 extern const short da830_i2c1_pins[];
140 extern const short da830_lcdcntl_pins[];
141 extern const short da830_pwm_pins[];
142 extern const short da830_ecap0_pins[];
143 extern const short da830_ecap1_pins[];
144 extern const short da830_ecap2_pins[];
145 extern const short da830_eqep0_pins[];
146 extern const short da830_eqep1_pins[];
147 extern const short da850_vpif_capture_pins[];
148 extern const short da850_vpif_display_pins[];
150 extern const short da850_i2c0_pins[];
151 extern const short da850_i2c1_pins[];
152 extern const short da850_lcdcntl_pins[];
154 #endif /* __ASM_ARCH_DAVINCI_DA8XX_H */