2 * TI DaVinci DM646X EVM board
4 * Derived from: arch/arm/mach-davinci/board-evm.c
5 * Copyright (C) 2006 Texas Instruments.
7 * (C) 2007-2008, MontaVista Software, Inc.
9 * This file is licensed under the terms of the GNU General Public License
10 * version 2. This program is licensed "as is" without any warranty of any
11 * kind, whether express or implied.
15 /**************************************************************************
17 **************************************************************************/
19 #include <linux/kernel.h>
20 #include <linux/init.h>
21 #include <linux/leds.h>
22 #include <linux/gpio.h>
23 #include <linux/platform_device.h>
24 #include <linux/i2c.h>
25 #include <linux/platform_data/at24.h>
26 #include <linux/platform_data/pcf857x.h>
28 #include <media/i2c/tvp514x.h>
29 #include <media/i2c/adv7343.h>
31 #include <linux/mtd/mtd.h>
32 #include <linux/mtd/rawnand.h>
33 #include <linux/mtd/partitions.h>
34 #include <linux/clk.h>
35 #include <linux/export.h>
36 #include <linux/platform_data/gpio-davinci.h>
37 #include <linux/platform_data/i2c-davinci.h>
38 #include <linux/platform_data/mtd-davinci.h>
39 #include <linux/platform_data/mtd-davinci-aemif.h>
41 #include <asm/mach-types.h>
42 #include <asm/mach/arch.h>
44 #include <mach/common.h>
45 #include <mach/irqs.h>
46 #include <mach/serial.h>
47 #include <mach/clock.h>
52 #define NAND_BLOCK_SIZE SZ_128K
54 /* Note: We are setting first partition as 'bootloader' constituting UBL, U-Boot
55 * and U-Boot environment this avoids dependency on any particular combination
56 * of UBL, U-Boot or flashing tools etc.
58 static struct mtd_partition davinci_nand_partitions[] = {
60 /* UBL, U-Boot with environment */
62 .offset = MTDPART_OFS_APPEND,
63 .size = 16 * NAND_BLOCK_SIZE,
64 .mask_flags = MTD_WRITEABLE, /* force read-only */
67 .offset = MTDPART_OFS_APPEND,
72 .offset = MTDPART_OFS_APPEND,
73 .size = MTDPART_SIZ_FULL,
78 static struct davinci_aemif_timing dm6467tevm_nandflash_timing = {
88 static struct davinci_nand_pdata davinci_nand_data = {
91 .parts = davinci_nand_partitions,
92 .nr_parts = ARRAY_SIZE(davinci_nand_partitions),
93 .ecc_mode = NAND_ECC_HW,
98 static struct resource davinci_nand_resources[] = {
100 .start = DM646X_ASYNC_EMIF_CS2_SPACE_BASE,
101 .end = DM646X_ASYNC_EMIF_CS2_SPACE_BASE + SZ_32M - 1,
102 .flags = IORESOURCE_MEM,
104 .start = DM646X_ASYNC_EMIF_CONTROL_BASE,
105 .end = DM646X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
106 .flags = IORESOURCE_MEM,
110 static struct platform_device davinci_nand_device = {
111 .name = "davinci_nand",
114 .num_resources = ARRAY_SIZE(davinci_nand_resources),
115 .resource = davinci_nand_resources,
118 .platform_data = &davinci_nand_data,
122 #define HAS_ATA (IS_ENABLED(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
123 IS_ENABLED(CONFIG_PATA_BK3710))
126 /* CPLD Register 0 bits to control ATA */
127 #define DM646X_EVM_ATA_RST BIT(0)
128 #define DM646X_EVM_ATA_PWD BIT(1)
130 /* CPLD Register 0 Client: used for I/O Control */
131 static int cpld_reg0_probe(struct i2c_client *client,
132 const struct i2c_device_id *id)
136 struct i2c_msg msg[2] = {
138 .addr = client->addr,
144 .addr = client->addr,
151 /* Clear ATA_RSTn and ATA_PWD bits to enable ATA operation. */
152 i2c_transfer(client->adapter, msg, 1);
153 data &= ~(DM646X_EVM_ATA_RST | DM646X_EVM_ATA_PWD);
154 i2c_transfer(client->adapter, msg + 1, 1);
160 static const struct i2c_device_id cpld_reg_ids[] = {
165 static struct i2c_driver dm6467evm_cpld_driver = {
166 .driver.name = "cpld_reg0",
167 .id_table = cpld_reg_ids,
168 .probe = cpld_reg0_probe,
173 static struct gpio_led evm_leds[] = {
174 { .name = "DS1", .active_low = 1, },
175 { .name = "DS2", .active_low = 1, },
176 { .name = "DS3", .active_low = 1, },
177 { .name = "DS4", .active_low = 1, },
180 static const struct gpio_led_platform_data evm_led_data = {
181 .num_leds = ARRAY_SIZE(evm_leds),
185 static struct platform_device *evm_led_dev;
187 static int evm_led_setup(struct i2c_client *client, int gpio,
188 unsigned int ngpio, void *c)
190 struct gpio_led *leds = evm_leds;
198 evm_led_dev = platform_device_alloc("leds-gpio", 0);
199 platform_device_add_data(evm_led_dev, &evm_led_data,
200 sizeof(evm_led_data));
202 evm_led_dev->dev.parent = &client->dev;
203 status = platform_device_add(evm_led_dev);
205 platform_device_put(evm_led_dev);
211 static int evm_led_teardown(struct i2c_client *client, int gpio,
212 unsigned ngpio, void *c)
215 platform_device_unregister(evm_led_dev);
221 static int evm_sw_gpio[4] = { -EINVAL, -EINVAL, -EINVAL, -EINVAL };
223 static int evm_sw_setup(struct i2c_client *client, int gpio,
224 unsigned ngpio, void *c)
230 for (i = 0; i < 4; ++i) {
231 snprintf(label, 10, "user_sw%d", i);
232 status = gpio_request(gpio, label);
235 evm_sw_gpio[i] = gpio++;
237 status = gpio_direction_input(evm_sw_gpio[i]);
239 gpio_free(evm_sw_gpio[i]);
240 evm_sw_gpio[i] = -EINVAL;
244 status = gpio_export(evm_sw_gpio[i], 0);
246 gpio_free(evm_sw_gpio[i]);
247 evm_sw_gpio[i] = -EINVAL;
253 for (i = 0; i < 4; ++i) {
254 if (evm_sw_gpio[i] != -EINVAL) {
255 gpio_free(evm_sw_gpio[i]);
256 evm_sw_gpio[i] = -EINVAL;
262 static int evm_sw_teardown(struct i2c_client *client, int gpio,
263 unsigned ngpio, void *c)
267 for (i = 0; i < 4; ++i) {
268 if (evm_sw_gpio[i] != -EINVAL) {
269 gpio_unexport(evm_sw_gpio[i]);
270 gpio_free(evm_sw_gpio[i]);
271 evm_sw_gpio[i] = -EINVAL;
277 static int evm_pcf_setup(struct i2c_client *client, int gpio,
278 unsigned int ngpio, void *c)
285 status = evm_sw_setup(client, gpio, 4, c);
289 return evm_led_setup(client, gpio+4, 4, c);
292 static int evm_pcf_teardown(struct i2c_client *client, int gpio,
293 unsigned int ngpio, void *c)
297 evm_sw_teardown(client, gpio, 4, c);
298 evm_led_teardown(client, gpio+4, 4, c);
303 static struct pcf857x_platform_data pcf_data = {
304 .gpio_base = DAVINCI_N_GPIO+1,
305 .setup = evm_pcf_setup,
306 .teardown = evm_pcf_teardown,
309 /* Most of this EEPROM is unused, but U-Boot uses some data:
310 * - 0x7f00, 6 bytes Ethernet Address
311 * - ... newer boards may have more
314 static struct at24_platform_data eeprom_info = {
315 .byte_len = (256*1024) / 8,
317 .flags = AT24_FLAG_ADDR16,
318 .setup = davinci_get_mac_addr,
319 .context = (void *)0x7f00,
323 static u8 dm646x_iis_serializer_direction[] = {
324 TX_MODE, RX_MODE, INACTIVE_MODE, INACTIVE_MODE,
327 static u8 dm646x_dit_serializer_direction[] = {
331 static struct snd_platform_data dm646x_evm_snd_data[] = {
333 .tx_dma_offset = 0x400,
334 .rx_dma_offset = 0x400,
335 .op_mode = DAVINCI_MCASP_IIS_MODE,
336 .num_serializer = ARRAY_SIZE(dm646x_iis_serializer_direction),
338 .serial_dir = dm646x_iis_serializer_direction,
339 .asp_chan_q = EVENTQ_0,
342 .tx_dma_offset = 0x400,
344 .op_mode = DAVINCI_MCASP_DIT_MODE,
345 .num_serializer = ARRAY_SIZE(dm646x_dit_serializer_direction),
347 .serial_dir = dm646x_dit_serializer_direction,
348 .asp_chan_q = EVENTQ_0,
353 static struct i2c_client *cpld_client;
355 static int cpld_video_probe(struct i2c_client *client,
356 const struct i2c_device_id *id)
358 cpld_client = client;
362 static int cpld_video_remove(struct i2c_client *client)
368 static const struct i2c_device_id cpld_video_id[] = {
373 static struct i2c_driver cpld_video_driver = {
375 .name = "cpld_video",
377 .probe = cpld_video_probe,
378 .remove = cpld_video_remove,
379 .id_table = cpld_video_id,
382 static void evm_init_cpld(void)
384 i2c_add_driver(&cpld_video_driver);
387 static struct i2c_board_info __initdata i2c_info[] = {
389 I2C_BOARD_INFO("24c256", 0x50),
390 .platform_data = &eeprom_info,
393 I2C_BOARD_INFO("pcf8574a", 0x38),
394 .platform_data = &pcf_data,
397 I2C_BOARD_INFO("cpld_reg0", 0x3a),
400 I2C_BOARD_INFO("tlv320aic33", 0x18),
403 I2C_BOARD_INFO("cpld_video", 0x3b),
407 static struct davinci_i2c_platform_data i2c_pdata = {
408 .bus_freq = 100 /* kHz */,
409 .bus_delay = 0 /* usec */,
412 #define VCH2CLK_MASK (BIT_MASK(10) | BIT_MASK(9) | BIT_MASK(8))
413 #define VCH2CLK_SYSCLK8 (BIT(9))
414 #define VCH2CLK_AUXCLK (BIT(9) | BIT(8))
415 #define VCH3CLK_MASK (BIT_MASK(14) | BIT_MASK(13) | BIT_MASK(12))
416 #define VCH3CLK_SYSCLK8 (BIT(13))
417 #define VCH3CLK_AUXCLK (BIT(14) | BIT(13))
419 #define VIDCH2CLK (BIT(10))
420 #define VIDCH3CLK (BIT(11))
421 #define VIDCH1CLK (BIT(4))
422 #define TVP7002_INPUT (BIT(4))
423 #define TVP5147_INPUT (~BIT(4))
424 #define VPIF_INPUT_ONE_CHANNEL (BIT(5))
425 #define VPIF_INPUT_TWO_CHANNEL (~BIT(5))
426 #define TVP5147_CH0 "tvp514x-0"
427 #define TVP5147_CH1 "tvp514x-1"
429 /* spin lock for updating above registers */
430 static spinlock_t vpif_reg_lock;
432 static int set_vpif_clock(int mux_mode, int hd)
442 /* disable the clock */
443 spin_lock_irqsave(&vpif_reg_lock, flags);
444 value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
445 value |= (VIDCH3CLK | VIDCH2CLK);
446 __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
447 spin_unlock_irqrestore(&vpif_reg_lock, flags);
449 val = i2c_smbus_read_byte(cpld_client);
458 err = i2c_smbus_write_byte(cpld_client, val);
462 value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
463 value &= ~(VCH2CLK_MASK);
464 value &= ~(VCH3CLK_MASK);
467 value |= (VCH2CLK_SYSCLK8 | VCH3CLK_SYSCLK8);
469 value |= (VCH2CLK_AUXCLK | VCH3CLK_AUXCLK);
471 __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
473 spin_lock_irqsave(&vpif_reg_lock, flags);
474 value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
475 /* enable the clock */
476 value &= ~(VIDCH3CLK | VIDCH2CLK);
477 __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
478 spin_unlock_irqrestore(&vpif_reg_lock, flags);
483 static struct vpif_subdev_info dm646x_vpif_subdev[] = {
487 I2C_BOARD_INFO("adv7343", 0x2a),
493 I2C_BOARD_INFO("ths7303", 0x2c),
498 static const struct vpif_output dm6467_ch0_outputs[] = {
503 .type = V4L2_OUTPUT_TYPE_ANALOG,
504 .capabilities = V4L2_OUT_CAP_STD,
507 .subdev_name = "adv7343",
508 .output_route = ADV7343_COMPOSITE_ID,
514 .type = V4L2_OUTPUT_TYPE_ANALOG,
515 .capabilities = V4L2_OUT_CAP_DV_TIMINGS,
517 .subdev_name = "adv7343",
518 .output_route = ADV7343_COMPONENT_ID,
524 .type = V4L2_OUTPUT_TYPE_ANALOG,
525 .capabilities = V4L2_OUT_CAP_STD,
528 .subdev_name = "adv7343",
529 .output_route = ADV7343_SVIDEO_ID,
533 static struct vpif_display_config dm646x_vpif_display_config = {
534 .set_clock = set_vpif_clock,
535 .subdevinfo = dm646x_vpif_subdev,
536 .subdev_count = ARRAY_SIZE(dm646x_vpif_subdev),
539 .outputs = dm6467_ch0_outputs,
540 .output_count = ARRAY_SIZE(dm6467_ch0_outputs),
542 .card_name = "DM646x EVM Video Display",
546 * setup_vpif_input_path()
547 * @channel: channel id (0 - CH0, 1 - CH1)
548 * @sub_dev_name: ptr sub device name
550 * This will set vpif input to capture data from tvp514x or
553 static int setup_vpif_input_path(int channel, const char *sub_dev_name)
558 /* for channel 1, we don't do anything */
565 val = i2c_smbus_read_byte(cpld_client);
569 if (!strcmp(sub_dev_name, TVP5147_CH0) ||
570 !strcmp(sub_dev_name, TVP5147_CH1))
571 val &= TVP5147_INPUT;
573 val |= TVP7002_INPUT;
575 err = i2c_smbus_write_byte(cpld_client, val);
582 * setup_vpif_input_channel_mode()
583 * @mux_mode: mux mode. 0 - 1 channel or (1) - 2 channel
585 * This will setup input mode to one channel (TVP7002) or 2 channel (TVP5147)
587 static int setup_vpif_input_channel_mode(int mux_mode)
597 val = i2c_smbus_read_byte(cpld_client);
601 spin_lock_irqsave(&vpif_reg_lock, flags);
602 value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
604 val &= VPIF_INPUT_TWO_CHANNEL;
607 val |= VPIF_INPUT_ONE_CHANNEL;
610 __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
611 spin_unlock_irqrestore(&vpif_reg_lock, flags);
613 err = i2c_smbus_write_byte(cpld_client, val);
620 static struct tvp514x_platform_data tvp5146_pdata = {
626 #define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
628 static struct vpif_subdev_info vpif_capture_sdev_info[] = {
632 I2C_BOARD_INFO("tvp5146", 0x5d),
633 .platform_data = &tvp5146_pdata,
639 I2C_BOARD_INFO("tvp5146", 0x5c),
640 .platform_data = &tvp5146_pdata,
645 static struct vpif_input dm6467_ch0_inputs[] = {
650 .type = V4L2_INPUT_TYPE_CAMERA,
651 .capabilities = V4L2_IN_CAP_STD,
652 .std = TVP514X_STD_ALL,
654 .subdev_name = TVP5147_CH0,
655 .input_route = INPUT_CVBS_VI2B,
656 .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
660 static struct vpif_input dm6467_ch1_inputs[] = {
665 .type = V4L2_INPUT_TYPE_CAMERA,
666 .capabilities = V4L2_IN_CAP_STD,
667 .std = TVP514X_STD_ALL,
669 .subdev_name = TVP5147_CH1,
670 .input_route = INPUT_SVIDEO_VI2C_VI1C,
671 .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
675 static struct vpif_capture_config dm646x_vpif_capture_cfg = {
676 .setup_input_path = setup_vpif_input_path,
677 .setup_input_channel_mode = setup_vpif_input_channel_mode,
678 .subdev_info = vpif_capture_sdev_info,
679 .subdev_count = ARRAY_SIZE(vpif_capture_sdev_info),
682 .inputs = dm6467_ch0_inputs,
683 .input_count = ARRAY_SIZE(dm6467_ch0_inputs),
685 .if_type = VPIF_IF_BT656,
692 .inputs = dm6467_ch1_inputs,
693 .input_count = ARRAY_SIZE(dm6467_ch1_inputs),
695 .if_type = VPIF_IF_BT656,
701 .card_name = "DM646x EVM Video Capture",
704 static void __init evm_init_video(void)
706 spin_lock_init(&vpif_reg_lock);
708 dm646x_setup_vpif(&dm646x_vpif_display_config,
709 &dm646x_vpif_capture_cfg);
712 static void __init evm_init_i2c(void)
714 davinci_init_i2c(&i2c_pdata);
715 i2c_add_driver(&dm6467evm_cpld_driver);
716 i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
722 #define DM6467T_EVM_REF_FREQ 33000000
724 static void __init davinci_map_io(void)
728 if (machine_is_davinci_dm6467tevm())
729 davinci_set_refclk_rate(DM6467T_EVM_REF_FREQ);
732 #define DM646X_EVM_PHY_ID "davinci_mdio-0:01"
734 * The following EDMA channels/slots are not being used by drivers (for
735 * example: Timer, GPIO, UART events etc) on dm646x, hence they are being
736 * reserved for codecs on the DSP side.
738 static const s16 dm646x_dma_rsv_chans[][2] = {
739 /* (offset, number) */
748 static const s16 dm646x_dma_rsv_slots[][2] = {
749 /* (offset, number) */
759 static struct edma_rsv_info dm646x_edma_rsv[] = {
761 .rsv_chans = dm646x_dma_rsv_chans,
762 .rsv_slots = dm646x_dma_rsv_slots,
766 static __init void evm_init(void)
769 struct davinci_soc_info *soc_info = &davinci_soc_info;
771 ret = dm646x_gpio_register();
773 pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
779 davinci_serial_init(dm646x_serial_device);
780 dm646x_init_mcasp0(&dm646x_evm_snd_data[0]);
781 dm646x_init_mcasp1(&dm646x_evm_snd_data[1]);
783 if (machine_is_davinci_dm6467tevm())
784 davinci_nand_data.timing = &dm6467tevm_nandflash_timing;
786 platform_device_register(&davinci_nand_device);
788 if (davinci_aemif_setup(&davinci_nand_device))
789 pr_warn("%s: Cannot configure AEMIF.\n", __func__);
791 dm646x_init_edma(dm646x_edma_rsv);
796 soc_info->emac_pdata->phy_id = DM646X_EVM_PHY_ID;
799 MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM")
800 .atag_offset = 0x100,
801 .map_io = davinci_map_io,
802 .init_irq = davinci_irq_init,
803 .init_time = davinci_timer_init,
804 .init_machine = evm_init,
805 .init_late = davinci_init_late,
806 .dma_zone_size = SZ_128M,
807 .restart = davinci_restart,
810 MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM")
811 .atag_offset = 0x100,
812 .map_io = davinci_map_io,
813 .init_irq = davinci_irq_init,
814 .init_time = davinci_timer_init,
815 .init_machine = evm_init,
816 .init_late = davinci_init_late,
817 .dma_zone_size = SZ_128M,
818 .restart = davinci_restart,