GNU Linux-libre 5.19-rc6-gnu
[releases.git] / arch / arm / mach-davinci / board-dm644x-evm.c
1 /*
2  * TI DaVinci EVM board support
3  *
4  * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
5  *
6  * 2007 (c) MontaVista Software, Inc. This file is licensed under
7  * the terms of the GNU General Public License version 2. This program
8  * is licensed "as is" without any warranty of any kind, whether express
9  * or implied.
10  */
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/dma-mapping.h>
14 #include <linux/platform_device.h>
15 #include <linux/gpio.h>
16 #include <linux/gpio/machine.h>
17 #include <linux/i2c.h>
18 #include <linux/platform_data/pcf857x.h>
19 #include <linux/platform_data/gpio-davinci.h>
20 #include <linux/property.h>
21 #include <linux/mtd/mtd.h>
22 #include <linux/mtd/rawnand.h>
23 #include <linux/mtd/partitions.h>
24 #include <linux/mtd/physmap.h>
25 #include <linux/nvmem-provider.h>
26 #include <linux/phy.h>
27 #include <linux/clk.h>
28 #include <linux/videodev2.h>
29 #include <linux/v4l2-dv-timings.h>
30 #include <linux/export.h>
31 #include <linux/leds.h>
32 #include <linux/regulator/fixed.h>
33 #include <linux/regulator/machine.h>
34
35 #include <media/i2c/tvp514x.h>
36
37 #include <asm/mach-types.h>
38 #include <asm/mach/arch.h>
39
40 #include <linux/platform_data/i2c-davinci.h>
41 #include <linux/platform_data/mtd-davinci.h>
42 #include <linux/platform_data/mmc-davinci.h>
43 #include <linux/platform_data/usb-davinci.h>
44 #include <linux/platform_data/mtd-davinci-aemif.h>
45 #include <linux/platform_data/ti-aemif.h>
46
47 #include "davinci.h"
48 #include "common.h"
49 #include "mux.h"
50 #include "serial.h"
51 #include "irqs.h"
52
53 #define DM644X_EVM_PHY_ID               "davinci_mdio-0:01"
54 #define LXT971_PHY_ID   (0x001378e2)
55 #define LXT971_PHY_MASK (0xfffffff0)
56
57 static struct mtd_partition davinci_evm_norflash_partitions[] = {
58         /* bootloader (UBL, U-Boot, etc) in first 5 sectors */
59         {
60                 .name           = "bootloader",
61                 .offset         = 0,
62                 .size           = 5 * SZ_64K,
63                 .mask_flags     = MTD_WRITEABLE, /* force read-only */
64         },
65         /* bootloader params in the next 1 sectors */
66         {
67                 .name           = "params",
68                 .offset         = MTDPART_OFS_APPEND,
69                 .size           = SZ_64K,
70                 .mask_flags     = 0,
71         },
72         /* kernel */
73         {
74                 .name           = "kernel",
75                 .offset         = MTDPART_OFS_APPEND,
76                 .size           = SZ_2M,
77                 .mask_flags     = 0
78         },
79         /* file system */
80         {
81                 .name           = "filesystem",
82                 .offset         = MTDPART_OFS_APPEND,
83                 .size           = MTDPART_SIZ_FULL,
84                 .mask_flags     = 0
85         }
86 };
87
88 static struct physmap_flash_data davinci_evm_norflash_data = {
89         .width          = 2,
90         .parts          = davinci_evm_norflash_partitions,
91         .nr_parts       = ARRAY_SIZE(davinci_evm_norflash_partitions),
92 };
93
94 /* NOTE: CFI probe will correctly detect flash part as 32M, but EMIF
95  * limits addresses to 16M, so using addresses past 16M will wrap */
96 static struct resource davinci_evm_norflash_resource = {
97         .start          = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
98         .end            = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
99         .flags          = IORESOURCE_MEM,
100 };
101
102 static struct platform_device davinci_evm_norflash_device = {
103         .name           = "physmap-flash",
104         .id             = 0,
105         .dev            = {
106                 .platform_data  = &davinci_evm_norflash_data,
107         },
108         .num_resources  = 1,
109         .resource       = &davinci_evm_norflash_resource,
110 };
111
112 /* DM644x EVM includes a 64 MByte small-page NAND flash (16K blocks).
113  * It may used instead of the (default) NOR chip to boot, using TI's
114  * tools to install the secondary boot loader (UBL) and U-Boot.
115  */
116 static struct mtd_partition davinci_evm_nandflash_partition[] = {
117         /* Bootloader layout depends on whose u-boot is installed, but we
118          * can hide all the details.
119          *  - block 0 for u-boot environment ... in mainline u-boot
120          *  - block 1 for UBL (plus up to four backup copies in blocks 2..5)
121          *  - blocks 6...? for u-boot
122          *  - blocks 16..23 for u-boot environment ... in TI's u-boot
123          */
124         {
125                 .name           = "bootloader",
126                 .offset         = 0,
127                 .size           = SZ_256K + SZ_128K,
128                 .mask_flags     = MTD_WRITEABLE,        /* force read-only */
129         },
130         /* Kernel */
131         {
132                 .name           = "kernel",
133                 .offset         = MTDPART_OFS_APPEND,
134                 .size           = SZ_4M,
135                 .mask_flags     = 0,
136         },
137         /* File system (older GIT kernels started this on the 5MB mark) */
138         {
139                 .name           = "filesystem",
140                 .offset         = MTDPART_OFS_APPEND,
141                 .size           = MTDPART_SIZ_FULL,
142                 .mask_flags     = 0,
143         }
144         /* A few blocks at end hold a flash BBT ... created by TI's CCS
145          * using flashwriter_nand.out, but ignored by TI's versions of
146          * Linux and u-boot.  We boot faster by using them.
147          */
148 };
149
150 static struct davinci_aemif_timing davinci_evm_nandflash_timing = {
151         .wsetup         = 20,
152         .wstrobe        = 40,
153         .whold          = 20,
154         .rsetup         = 10,
155         .rstrobe        = 40,
156         .rhold          = 10,
157         .ta             = 40,
158 };
159
160 static struct davinci_nand_pdata davinci_evm_nandflash_data = {
161         .core_chipsel   = 0,
162         .parts          = davinci_evm_nandflash_partition,
163         .nr_parts       = ARRAY_SIZE(davinci_evm_nandflash_partition),
164         .engine_type    = NAND_ECC_ENGINE_TYPE_ON_HOST,
165         .ecc_bits       = 1,
166         .bbt_options    = NAND_BBT_USE_FLASH,
167         .timing         = &davinci_evm_nandflash_timing,
168 };
169
170 static struct resource davinci_evm_nandflash_resource[] = {
171         {
172                 .start          = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
173                 .end            = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
174                 .flags          = IORESOURCE_MEM,
175         }, {
176                 .start          = DM644X_ASYNC_EMIF_CONTROL_BASE,
177                 .end            = DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
178                 .flags          = IORESOURCE_MEM,
179         },
180 };
181
182 static struct resource davinci_evm_aemif_resource[] = {
183         {
184                 .start          = DM644X_ASYNC_EMIF_CONTROL_BASE,
185                 .end            = DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
186                 .flags          = IORESOURCE_MEM,
187         },
188 };
189
190 static struct aemif_abus_data davinci_evm_aemif_abus_data[] = {
191         {
192                 .cs             = 1,
193         },
194 };
195
196 static struct platform_device davinci_evm_nandflash_devices[] = {
197         {
198                 .name           = "davinci_nand",
199                 .id             = 0,
200                 .dev            = {
201                         .platform_data  = &davinci_evm_nandflash_data,
202                 },
203                 .num_resources  = ARRAY_SIZE(davinci_evm_nandflash_resource),
204                 .resource       = davinci_evm_nandflash_resource,
205         },
206 };
207
208 static struct aemif_platform_data davinci_evm_aemif_pdata = {
209         .abus_data = davinci_evm_aemif_abus_data,
210         .num_abus_data = ARRAY_SIZE(davinci_evm_aemif_abus_data),
211         .sub_devices = davinci_evm_nandflash_devices,
212         .num_sub_devices = ARRAY_SIZE(davinci_evm_nandflash_devices),
213 };
214
215 static struct platform_device davinci_evm_aemif_device = {
216         .name                   = "ti-aemif",
217         .id                     = -1,
218         .dev = {
219                 .platform_data  = &davinci_evm_aemif_pdata,
220         },
221         .resource               = davinci_evm_aemif_resource,
222         .num_resources          = ARRAY_SIZE(davinci_evm_aemif_resource),
223 };
224
225 static u64 davinci_fb_dma_mask = DMA_BIT_MASK(32);
226
227 static struct platform_device davinci_fb_device = {
228         .name           = "davincifb",
229         .id             = -1,
230         .dev = {
231                 .dma_mask               = &davinci_fb_dma_mask,
232                 .coherent_dma_mask      = DMA_BIT_MASK(32),
233         },
234         .num_resources = 0,
235 };
236
237 static struct tvp514x_platform_data dm644xevm_tvp5146_pdata = {
238         .clk_polarity = 0,
239         .hs_polarity = 1,
240         .vs_polarity = 1
241 };
242
243 #define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
244 /* Inputs available at the TVP5146 */
245 static struct v4l2_input dm644xevm_tvp5146_inputs[] = {
246         {
247                 .index = 0,
248                 .name = "Composite",
249                 .type = V4L2_INPUT_TYPE_CAMERA,
250                 .std = TVP514X_STD_ALL,
251         },
252         {
253                 .index = 1,
254                 .name = "S-Video",
255                 .type = V4L2_INPUT_TYPE_CAMERA,
256                 .std = TVP514X_STD_ALL,
257         },
258 };
259
260 /*
261  * this is the route info for connecting each input to decoder
262  * ouput that goes to vpfe. There is a one to one correspondence
263  * with tvp5146_inputs
264  */
265 static struct vpfe_route dm644xevm_tvp5146_routes[] = {
266         {
267                 .input = INPUT_CVBS_VI2B,
268                 .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
269         },
270         {
271                 .input = INPUT_SVIDEO_VI2C_VI1C,
272                 .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
273         },
274 };
275
276 static struct vpfe_subdev_info dm644xevm_vpfe_sub_devs[] = {
277         {
278                 .name = "tvp5146",
279                 .grp_id = 0,
280                 .num_inputs = ARRAY_SIZE(dm644xevm_tvp5146_inputs),
281                 .inputs = dm644xevm_tvp5146_inputs,
282                 .routes = dm644xevm_tvp5146_routes,
283                 .can_route = 1,
284                 .ccdc_if_params = {
285                         .if_type = VPFE_BT656,
286                         .hdpol = VPFE_PINPOL_POSITIVE,
287                         .vdpol = VPFE_PINPOL_POSITIVE,
288                 },
289                 .board_info = {
290                         I2C_BOARD_INFO("tvp5146", 0x5d),
291                         .platform_data = &dm644xevm_tvp5146_pdata,
292                 },
293         },
294 };
295
296 static struct vpfe_config dm644xevm_capture_cfg = {
297         .num_subdevs = ARRAY_SIZE(dm644xevm_vpfe_sub_devs),
298         .i2c_adapter_id = 1,
299         .sub_devs = dm644xevm_vpfe_sub_devs,
300         .card_name = "DM6446 EVM",
301         .ccdc = "DM6446 CCDC",
302 };
303
304 static struct platform_device rtc_dev = {
305         .name           = "rtc_davinci_evm",
306         .id             = -1,
307 };
308
309 /*----------------------------------------------------------------------*/
310 #ifdef CONFIG_I2C
311 /*
312  * I2C GPIO expanders
313  */
314
315 #define PCF_Uxx_BASE(x) (DAVINCI_N_GPIO + ((x) * 8))
316
317
318 /* U2 -- LEDs */
319
320 static struct gpio_led evm_leds[] = {
321         { .name = "DS8", .active_low = 1,
322                 .default_trigger = "heartbeat", },
323         { .name = "DS7", .active_low = 1, },
324         { .name = "DS6", .active_low = 1, },
325         { .name = "DS5", .active_low = 1, },
326         { .name = "DS4", .active_low = 1, },
327         { .name = "DS3", .active_low = 1, },
328         { .name = "DS2", .active_low = 1,
329                 .default_trigger = "mmc0", },
330         { .name = "DS1", .active_low = 1,
331                 .default_trigger = "disk-activity", },
332 };
333
334 static const struct gpio_led_platform_data evm_led_data = {
335         .num_leds       = ARRAY_SIZE(evm_leds),
336         .leds           = evm_leds,
337 };
338
339 static struct platform_device *evm_led_dev;
340
341 static int
342 evm_led_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
343 {
344         struct gpio_led *leds = evm_leds;
345         int status;
346
347         while (ngpio--) {
348                 leds->gpio = gpio++;
349                 leds++;
350         }
351
352         /* what an extremely annoying way to be forced to handle
353          * device unregistration ...
354          */
355         evm_led_dev = platform_device_alloc("leds-gpio", 0);
356         platform_device_add_data(evm_led_dev,
357                         &evm_led_data, sizeof evm_led_data);
358
359         evm_led_dev->dev.parent = &client->dev;
360         status = platform_device_add(evm_led_dev);
361         if (status < 0) {
362                 platform_device_put(evm_led_dev);
363                 evm_led_dev = NULL;
364         }
365         return status;
366 }
367
368 static void
369 evm_led_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
370 {
371         if (evm_led_dev) {
372                 platform_device_unregister(evm_led_dev);
373                 evm_led_dev = NULL;
374         }
375 }
376
377 static struct pcf857x_platform_data pcf_data_u2 = {
378         .gpio_base      = PCF_Uxx_BASE(0),
379         .setup          = evm_led_setup,
380         .teardown       = evm_led_teardown,
381 };
382
383
384 /* U18 - A/V clock generator and user switch */
385
386 static int sw_gpio;
387
388 static ssize_t
389 sw_show(struct device *d, struct device_attribute *a, char *buf)
390 {
391         char *s = gpio_get_value_cansleep(sw_gpio) ? "on\n" : "off\n";
392
393         strcpy(buf, s);
394         return strlen(s);
395 }
396
397 static DEVICE_ATTR(user_sw, S_IRUGO, sw_show, NULL);
398
399 static int
400 evm_u18_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
401 {
402         int     status;
403
404         /* export dip switch option */
405         sw_gpio = gpio + 7;
406         status = gpio_request(sw_gpio, "user_sw");
407         if (status == 0)
408                 status = gpio_direction_input(sw_gpio);
409         if (status == 0)
410                 status = device_create_file(&client->dev, &dev_attr_user_sw);
411         else
412                 gpio_free(sw_gpio);
413         if (status != 0)
414                 sw_gpio = -EINVAL;
415
416         /* audio PLL:  48 kHz (vs 44.1 or 32), single rate (vs double) */
417         gpio_request(gpio + 3, "pll_fs2");
418         gpio_direction_output(gpio + 3, 0);
419
420         gpio_request(gpio + 2, "pll_fs1");
421         gpio_direction_output(gpio + 2, 0);
422
423         gpio_request(gpio + 1, "pll_sr");
424         gpio_direction_output(gpio + 1, 0);
425
426         return 0;
427 }
428
429 static void
430 evm_u18_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
431 {
432         gpio_free(gpio + 1);
433         gpio_free(gpio + 2);
434         gpio_free(gpio + 3);
435
436         if (sw_gpio > 0) {
437                 device_remove_file(&client->dev, &dev_attr_user_sw);
438                 gpio_free(sw_gpio);
439         }
440 }
441
442 static struct pcf857x_platform_data pcf_data_u18 = {
443         .gpio_base      = PCF_Uxx_BASE(1),
444         .n_latch        = (1 << 3) | (1 << 2) | (1 << 1),
445         .setup          = evm_u18_setup,
446         .teardown       = evm_u18_teardown,
447 };
448
449
450 /* U35 - various I/O signals used to manage USB, CF, ATA, etc */
451
452 static int
453 evm_u35_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
454 {
455         /* p0 = nDRV_VBUS (initial:  don't supply it) */
456         gpio_request(gpio + 0, "nDRV_VBUS");
457         gpio_direction_output(gpio + 0, 1);
458
459         /* p1 = VDDIMX_EN */
460         gpio_request(gpio + 1, "VDDIMX_EN");
461         gpio_direction_output(gpio + 1, 1);
462
463         /* p2 = VLYNQ_EN */
464         gpio_request(gpio + 2, "VLYNQ_EN");
465         gpio_direction_output(gpio + 2, 1);
466
467         /* p3 = n3V3_CF_RESET (initial: stay in reset) */
468         gpio_request(gpio + 3, "nCF_RESET");
469         gpio_direction_output(gpio + 3, 0);
470
471         /* (p4 unused) */
472
473         /* p5 = 1V8_WLAN_RESET (initial: stay in reset) */
474         gpio_request(gpio + 5, "WLAN_RESET");
475         gpio_direction_output(gpio + 5, 1);
476
477         /* p6 = nATA_SEL (initial: select) */
478         gpio_request(gpio + 6, "nATA_SEL");
479         gpio_direction_output(gpio + 6, 0);
480
481         /* p7 = nCF_SEL (initial: deselect) */
482         gpio_request(gpio + 7, "nCF_SEL");
483         gpio_direction_output(gpio + 7, 1);
484
485         return 0;
486 }
487
488 static void
489 evm_u35_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
490 {
491         gpio_free(gpio + 7);
492         gpio_free(gpio + 6);
493         gpio_free(gpio + 5);
494         gpio_free(gpio + 3);
495         gpio_free(gpio + 2);
496         gpio_free(gpio + 1);
497         gpio_free(gpio + 0);
498 }
499
500 static struct pcf857x_platform_data pcf_data_u35 = {
501         .gpio_base      = PCF_Uxx_BASE(2),
502         .setup          = evm_u35_setup,
503         .teardown       = evm_u35_teardown,
504 };
505
506 /*----------------------------------------------------------------------*/
507
508 /* Most of this EEPROM is unused, but U-Boot uses some data:
509  *  - 0x7f00, 6 bytes Ethernet Address
510  *  - 0x0039, 1 byte NTSC vs PAL (bit 0x80 == PAL)
511  *  - ... newer boards may have more
512  */
513
514 static struct nvmem_cell_info dm644evm_nvmem_cells[] = {
515         {
516                 .name           = "macaddr",
517                 .offset         = 0x7f00,
518                 .bytes          = ETH_ALEN,
519         }
520 };
521
522 static struct nvmem_cell_table dm644evm_nvmem_cell_table = {
523         .nvmem_name     = "1-00500",
524         .cells          = dm644evm_nvmem_cells,
525         .ncells         = ARRAY_SIZE(dm644evm_nvmem_cells),
526 };
527
528 static struct nvmem_cell_lookup dm644evm_nvmem_cell_lookup = {
529         .nvmem_name     = "1-00500",
530         .cell_name      = "macaddr",
531         .dev_id         = "davinci_emac.1",
532         .con_id         = "mac-address",
533 };
534
535 static const struct property_entry eeprom_properties[] = {
536         PROPERTY_ENTRY_U32("pagesize", 64),
537         { }
538 };
539
540 static const struct software_node eeprom_node = {
541         .properties = eeprom_properties,
542 };
543
544 /*
545  * MSP430 supports RTC, card detection, input from IR remote, and
546  * a bit more.  It triggers interrupts on GPIO(7) from pressing
547  * buttons on the IR remote, and for card detect switches.
548  */
549 static struct i2c_client *dm6446evm_msp;
550
551 static int dm6446evm_msp_probe(struct i2c_client *client)
552 {
553         dm6446evm_msp = client;
554         return 0;
555 }
556
557 static int dm6446evm_msp_remove(struct i2c_client *client)
558 {
559         dm6446evm_msp = NULL;
560         return 0;
561 }
562
563 static const struct i2c_device_id dm6446evm_msp_ids[] = {
564         { "dm6446evm_msp", 0, },
565         { /* end of list */ },
566 };
567
568 static struct i2c_driver dm6446evm_msp_driver = {
569         .driver.name    = "dm6446evm_msp",
570         .id_table       = dm6446evm_msp_ids,
571         .probe_new      = dm6446evm_msp_probe,
572         .remove         = dm6446evm_msp_remove,
573 };
574
575 static int dm6444evm_msp430_get_pins(void)
576 {
577         static const char txbuf[2] = { 2, 4, };
578         char buf[4];
579         struct i2c_msg msg[2] = {
580                 {
581                         .flags = 0,
582                         .len = 2,
583                         .buf = (void __force *)txbuf,
584                 },
585                 {
586                         .flags = I2C_M_RD,
587                         .len = 4,
588                         .buf = buf,
589                 },
590         };
591         int status;
592
593         if (!dm6446evm_msp)
594                 return -ENXIO;
595
596         msg[0].addr = dm6446evm_msp->addr;
597         msg[1].addr = dm6446evm_msp->addr;
598
599         /* Command 4 == get input state, returns port 2 and port3 data
600          *   S Addr W [A] len=2 [A] cmd=4 [A]
601          *   RS Addr R [A] [len=4] A [cmd=4] A [port2] A [port3] N P
602          */
603         status = i2c_transfer(dm6446evm_msp->adapter, msg, 2);
604         if (status < 0)
605                 return status;
606
607         dev_dbg(&dm6446evm_msp->dev, "PINS: %4ph\n", buf);
608
609         return (buf[3] << 8) | buf[2];
610 }
611
612 static int dm6444evm_mmc_get_cd(int module)
613 {
614         int status = dm6444evm_msp430_get_pins();
615
616         return (status < 0) ? status : !(status & BIT(1));
617 }
618
619 static int dm6444evm_mmc_get_ro(int module)
620 {
621         int status = dm6444evm_msp430_get_pins();
622
623         return (status < 0) ? status : status & BIT(6 + 8);
624 }
625
626 static struct davinci_mmc_config dm6446evm_mmc_config = {
627         .get_cd         = dm6444evm_mmc_get_cd,
628         .get_ro         = dm6444evm_mmc_get_ro,
629         .wires          = 4,
630 };
631
632 static struct i2c_board_info __initdata i2c_info[] =  {
633         {
634                 I2C_BOARD_INFO("dm6446evm_msp", 0x23),
635         },
636         {
637                 I2C_BOARD_INFO("pcf8574", 0x38),
638                 .platform_data  = &pcf_data_u2,
639         },
640         {
641                 I2C_BOARD_INFO("pcf8574", 0x39),
642                 .platform_data  = &pcf_data_u18,
643         },
644         {
645                 I2C_BOARD_INFO("pcf8574", 0x3a),
646                 .platform_data  = &pcf_data_u35,
647         },
648         {
649                 I2C_BOARD_INFO("24c256", 0x50),
650                 .swnode = &eeprom_node,
651         },
652         {
653                 I2C_BOARD_INFO("tlv320aic33", 0x1b),
654         },
655 };
656
657 #define DM644X_I2C_SDA_PIN      GPIO_TO_PIN(2, 12)
658 #define DM644X_I2C_SCL_PIN      GPIO_TO_PIN(2, 11)
659
660 static struct gpiod_lookup_table i2c_recovery_gpiod_table = {
661         .dev_id = "i2c_davinci.1",
662         .table = {
663                 GPIO_LOOKUP("davinci_gpio", DM644X_I2C_SDA_PIN, "sda",
664                             GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
665                 GPIO_LOOKUP("davinci_gpio", DM644X_I2C_SCL_PIN, "scl",
666                             GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
667                 { }
668         },
669 };
670
671 /* The msp430 uses a slow bitbanged I2C implementation (ergo 20 KHz),
672  * which requires 100 usec of idle bus after i2c writes sent to it.
673  */
674 static struct davinci_i2c_platform_data i2c_pdata = {
675         .bus_freq       = 20 /* kHz */,
676         .bus_delay      = 100 /* usec */,
677         .gpio_recovery  = true,
678 };
679
680 static void __init evm_init_i2c(void)
681 {
682         gpiod_add_lookup_table(&i2c_recovery_gpiod_table);
683         davinci_init_i2c(&i2c_pdata);
684         i2c_add_driver(&dm6446evm_msp_driver);
685         i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
686 }
687 #endif
688
689 /* Fixed regulator support */
690 static struct regulator_consumer_supply fixed_supplies_3_3v[] = {
691         /* Baseboard 3.3V: 5V -> TPS54310PWP -> 3.3V */
692         REGULATOR_SUPPLY("AVDD", "1-001b"),
693         REGULATOR_SUPPLY("DRVDD", "1-001b"),
694 };
695
696 static struct regulator_consumer_supply fixed_supplies_1_8v[] = {
697         /* Baseboard 1.8V: 5V -> TPS54310PWP -> 1.8V */
698         REGULATOR_SUPPLY("IOVDD", "1-001b"),
699         REGULATOR_SUPPLY("DVDD", "1-001b"),
700 };
701
702 #define VENC_STD_ALL    (V4L2_STD_NTSC | V4L2_STD_PAL)
703
704 /* venc standard timings */
705 static struct vpbe_enc_mode_info dm644xevm_enc_std_timing[] = {
706         {
707                 .name           = "ntsc",
708                 .timings_type   = VPBE_ENC_STD,
709                 .std_id         = V4L2_STD_NTSC,
710                 .interlaced     = 1,
711                 .xres           = 720,
712                 .yres           = 480,
713                 .aspect         = {11, 10},
714                 .fps            = {30000, 1001},
715                 .left_margin    = 0x79,
716                 .upper_margin   = 0x10,
717         },
718         {
719                 .name           = "pal",
720                 .timings_type   = VPBE_ENC_STD,
721                 .std_id         = V4L2_STD_PAL,
722                 .interlaced     = 1,
723                 .xres           = 720,
724                 .yres           = 576,
725                 .aspect         = {54, 59},
726                 .fps            = {25, 1},
727                 .left_margin    = 0x7e,
728                 .upper_margin   = 0x16,
729         },
730 };
731
732 /* venc dv preset timings */
733 static struct vpbe_enc_mode_info dm644xevm_enc_preset_timing[] = {
734         {
735                 .name           = "480p59_94",
736                 .timings_type   = VPBE_ENC_DV_TIMINGS,
737                 .dv_timings     = V4L2_DV_BT_CEA_720X480P59_94,
738                 .interlaced     = 0,
739                 .xres           = 720,
740                 .yres           = 480,
741                 .aspect         = {1, 1},
742                 .fps            = {5994, 100},
743                 .left_margin    = 0x80,
744                 .upper_margin   = 0x20,
745         },
746         {
747                 .name           = "576p50",
748                 .timings_type   = VPBE_ENC_DV_TIMINGS,
749                 .dv_timings     = V4L2_DV_BT_CEA_720X576P50,
750                 .interlaced     = 0,
751                 .xres           = 720,
752                 .yres           = 576,
753                 .aspect         = {1, 1},
754                 .fps            = {50, 1},
755                 .left_margin    = 0x7e,
756                 .upper_margin   = 0x30,
757         },
758 };
759
760 /*
761  * The outputs available from VPBE + encoders. Keep the order same
762  * as that of encoders. First those from venc followed by that from
763  * encoders. Index in the output refers to index on a particular encoder.
764  * Driver uses this index to pass it to encoder when it supports more
765  * than one output. Userspace applications use index of the array to
766  * set an output.
767  */
768 static struct vpbe_output dm644xevm_vpbe_outputs[] = {
769         {
770                 .output         = {
771                         .index          = 0,
772                         .name           = "Composite",
773                         .type           = V4L2_OUTPUT_TYPE_ANALOG,
774                         .std            = VENC_STD_ALL,
775                         .capabilities   = V4L2_OUT_CAP_STD,
776                 },
777                 .subdev_name    = DM644X_VPBE_VENC_SUBDEV_NAME,
778                 .default_mode   = "ntsc",
779                 .num_modes      = ARRAY_SIZE(dm644xevm_enc_std_timing),
780                 .modes          = dm644xevm_enc_std_timing,
781         },
782         {
783                 .output         = {
784                         .index          = 1,
785                         .name           = "Component",
786                         .type           = V4L2_OUTPUT_TYPE_ANALOG,
787                         .capabilities   = V4L2_OUT_CAP_DV_TIMINGS,
788                 },
789                 .subdev_name    = DM644X_VPBE_VENC_SUBDEV_NAME,
790                 .default_mode   = "480p59_94",
791                 .num_modes      = ARRAY_SIZE(dm644xevm_enc_preset_timing),
792                 .modes          = dm644xevm_enc_preset_timing,
793         },
794 };
795
796 static struct vpbe_config dm644xevm_display_cfg = {
797         .module_name    = "dm644x-vpbe-display",
798         .i2c_adapter_id = 1,
799         .osd            = {
800                 .module_name    = DM644X_VPBE_OSD_SUBDEV_NAME,
801         },
802         .venc           = {
803                 .module_name    = DM644X_VPBE_VENC_SUBDEV_NAME,
804         },
805         .num_outputs    = ARRAY_SIZE(dm644xevm_vpbe_outputs),
806         .outputs        = dm644xevm_vpbe_outputs,
807 };
808
809 static struct platform_device *davinci_evm_devices[] __initdata = {
810         &davinci_fb_device,
811         &rtc_dev,
812 };
813
814 static void __init
815 davinci_evm_map_io(void)
816 {
817         dm644x_init();
818 }
819
820 static int davinci_phy_fixup(struct phy_device *phydev)
821 {
822         unsigned int control;
823         /* CRITICAL: Fix for increasing PHY signal drive strength for
824          * TX lockup issue. On DaVinci EVM, the Intel LXT971 PHY
825          * signal strength was low causing  TX to fail randomly. The
826          * fix is to Set bit 11 (Increased MII drive strength) of PHY
827          * register 26 (Digital Config register) on this phy. */
828         control = phy_read(phydev, 26);
829         phy_write(phydev, 26, (control | 0x800));
830         return 0;
831 }
832
833 #define HAS_ATA         (IS_ENABLED(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
834                          IS_ENABLED(CONFIG_PATA_BK3710))
835
836 #define HAS_NOR         IS_ENABLED(CONFIG_MTD_PHYSMAP)
837
838 #define HAS_NAND        IS_ENABLED(CONFIG_MTD_NAND_DAVINCI)
839
840 #define GPIO_nVBUS_DRV          160
841
842 static struct gpiod_lookup_table dm644evm_usb_gpio_table = {
843         .dev_id = "musb-davinci",
844         .table = {
845                 GPIO_LOOKUP("davinci_gpio", GPIO_nVBUS_DRV, NULL,
846                             GPIO_ACTIVE_HIGH),
847                 { }
848         },
849 };
850
851 static __init void davinci_evm_init(void)
852 {
853         int ret;
854         struct clk *aemif_clk;
855         struct davinci_soc_info *soc_info = &davinci_soc_info;
856
857         dm644x_register_clocks();
858
859         regulator_register_always_on(0, "fixed-dummy", fixed_supplies_1_8v,
860                                      ARRAY_SIZE(fixed_supplies_1_8v), 1800000);
861         regulator_register_always_on(1, "fixed-dummy", fixed_supplies_3_3v,
862                                      ARRAY_SIZE(fixed_supplies_3_3v), 3300000);
863
864         dm644x_init_devices();
865
866         ret = dm644x_gpio_register();
867         if (ret)
868                 pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
869
870         aemif_clk = clk_get(NULL, "aemif");
871         clk_prepare_enable(aemif_clk);
872
873         if (HAS_ATA) {
874                 if (HAS_NAND || HAS_NOR)
875                         pr_warn("WARNING: both IDE and Flash are enabled, but they share AEMIF pins\n"
876                                 "\tDisable IDE for NAND/NOR support\n");
877                 davinci_init_ide();
878         } else if (HAS_NAND || HAS_NOR) {
879                 davinci_cfg_reg(DM644X_HPIEN_DISABLE);
880                 davinci_cfg_reg(DM644X_ATAEN_DISABLE);
881
882                 /* only one device will be jumpered and detected */
883                 if (HAS_NAND) {
884                         platform_device_register(&davinci_evm_aemif_device);
885 #ifdef CONFIG_I2C
886                         evm_leds[7].default_trigger = "nand-disk";
887 #endif
888                         if (HAS_NOR)
889                                 pr_warn("WARNING: both NAND and NOR flash are enabled; disable one of them.\n");
890                 } else if (HAS_NOR)
891                         platform_device_register(&davinci_evm_norflash_device);
892         }
893
894         platform_add_devices(davinci_evm_devices,
895                              ARRAY_SIZE(davinci_evm_devices));
896 #ifdef CONFIG_I2C
897         nvmem_add_cell_table(&dm644evm_nvmem_cell_table);
898         nvmem_add_cell_lookups(&dm644evm_nvmem_cell_lookup, 1);
899         evm_init_i2c();
900         davinci_setup_mmc(0, &dm6446evm_mmc_config);
901 #endif
902         dm644x_init_video(&dm644xevm_capture_cfg, &dm644xevm_display_cfg);
903
904         davinci_serial_init(dm644x_serial_device);
905         dm644x_init_asp();
906
907         /* irlml6401 switches over 1A, in under 8 msec */
908         gpiod_add_lookup_table(&dm644evm_usb_gpio_table);
909         davinci_setup_usb(1000, 8);
910
911         if (IS_BUILTIN(CONFIG_PHYLIB)) {
912                 soc_info->emac_pdata->phy_id = DM644X_EVM_PHY_ID;
913                 /* Register the fixup for PHY on DaVinci */
914                 phy_register_fixup_for_uid(LXT971_PHY_ID, LXT971_PHY_MASK,
915                                                 davinci_phy_fixup);
916         }
917 }
918
919 MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM")
920         /* Maintainer: MontaVista Software <source@mvista.com> */
921         .atag_offset  = 0x100,
922         .map_io       = davinci_evm_map_io,
923         .init_irq     = dm644x_init_irq,
924         .init_time      = dm644x_init_time,
925         .init_machine = davinci_evm_init,
926         .init_late      = davinci_init_late,
927         .dma_zone_size  = SZ_128M,
928 MACHINE_END