arch/arm/mach-davinci/board-dm644x-evm.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * TI DaVinci EVM board support
   4  *
   5  * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
   6  *
   7  * 2007 (c) MontaVista Software, Inc.
   8  */
   9 #include <linux/kernel.h>
  10 #include <linux/init.h>
  11 #include <linux/dma-mapping.h>
  12 #include <linux/platform_device.h>
  13 #include <linux/gpio.h>
  14 #include <linux/gpio/machine.h>
  15 #include <linux/i2c.h>
  16 #include <linux/platform_data/pcf857x.h>
  17 #include <linux/platform_data/gpio-davinci.h>
  18 #include <linux/property.h>
  19 #include <linux/mtd/mtd.h>
  20 #include <linux/mtd/rawnand.h>
  21 #include <linux/mtd/partitions.h>
  22 #include <linux/mtd/physmap.h>
  23 #include <linux/nvmem-provider.h>
  24 #include <linux/phy.h>
  25 #include <linux/clk.h>
  26 #include <linux/videodev2.h>
  27 #include <linux/v4l2-dv-timings.h>
  28 #include <linux/export.h>
  29 #include <linux/leds.h>
  30 #include <linux/regulator/fixed.h>
  31 #include <linux/regulator/machine.h>
  32
  33 #include <media/i2c/tvp514x.h>
  34
  35 #include <asm/mach-types.h>
  36 #include <asm/mach/arch.h>
  37
  38 #include <mach/common.h>
  39 #include <mach/mux.h>
  40 #include <mach/serial.h>
  41
  42 #include <linux/platform_data/i2c-davinci.h>
  43 #include <linux/platform_data/mtd-davinci.h>
  44 #include <linux/platform_data/mmc-davinci.h>
  45 #include <linux/platform_data/usb-davinci.h>
  46 #include <linux/platform_data/mtd-davinci-aemif.h>
  47 #include <linux/platform_data/ti-aemif.h>
  48
  49 #include "davinci.h"
  50 #include "irqs.h"
  51
  52 #define DM644X_EVM_PHY_ID               "davinci_mdio-0:01"
  53 #define LXT971_PHY_ID   (0x001378e2)
  54 #define LXT971_PHY_MASK (0xfffffff0)
  55
  56 static struct mtd_partition davinci_evm_norflash_partitions[] = {
  57         /* bootloader (UBL, U-Boot, etc) in first 5 sectors */
  58         {
  59                 .name           = "bootloader",
  60                 .offset         = 0,
  61                 .size           = 5 * SZ_64K,
  62                 .mask_flags     = MTD_WRITEABLE, /* force read-only */
  63         },
  64         /* bootloader params in the next 1 sectors */
  65         {
  66                 .name           = "params",
  67                 .offset         = MTDPART_OFS_APPEND,
  68                 .size           = SZ_64K,
  69                 .mask_flags     = 0,
  70         },
  71         /* kernel */
  72         {
  73                 .name           = "kernel",
  74                 .offset         = MTDPART_OFS_APPEND,
  75                 .size           = SZ_2M,
  76                 .mask_flags     = 0
  77         },
  78         /* file system */
  79         {
  80                 .name           = "filesystem",
  81                 .offset         = MTDPART_OFS_APPEND,
  82                 .size           = MTDPART_SIZ_FULL,
  83                 .mask_flags     = 0
  84         }
  85 };
  86
  87 static struct physmap_flash_data davinci_evm_norflash_data = {
  88         .width          = 2,
  89         .parts          = davinci_evm_norflash_partitions,
  90         .nr_parts       = ARRAY_SIZE(davinci_evm_norflash_partitions),
  91 };
  92
  93 /* NOTE: CFI probe will correctly detect flash part as 32M, but EMIF
  94  * limits addresses to 16M, so using addresses past 16M will wrap */
  95 static struct resource davinci_evm_norflash_resource = {
  96         .start          = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
  97         .end            = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
  98         .flags          = IORESOURCE_MEM,
  99 };
 100
 101 static struct platform_device davinci_evm_norflash_device = {
 102         .name           = "physmap-flash",
 103         .id             = 0,
 104         .dev            = {
 105                 .platform_data  = &davinci_evm_norflash_data,
 106         },
 107         .num_resources  = 1,
 108         .resource       = &davinci_evm_norflash_resource,
 109 };
 110
 111 /* DM644x EVM includes a 64 MByte small-page NAND flash (16K blocks).
 112  * It may used instead of the (default) NOR chip to boot, using TI's
 113  * tools to install the secondary boot loader (UBL) and U-Boot.
 114  */
 115 static struct mtd_partition davinci_evm_nandflash_partition[] = {
 116         /* Bootloader layout depends on whose u-boot is installed, but we
 117          * can hide all the details.
 118          *  - block 0 for u-boot environment ... in mainline u-boot
 119          *  - block 1 for UBL (plus up to four backup copies in blocks 2..5)
 120          *  - blocks 6...? for u-boot
 121          *  - blocks 16..23 for u-boot environment ... in TI's u-boot
 122          */
 123         {
 124                 .name           = "bootloader",
 125                 .offset         = 0,
 126                 .size           = SZ_256K + SZ_128K,
 127                 .mask_flags     = MTD_WRITEABLE,        /* force read-only */
 128         },
 129         /* Kernel */
 130         {
 131                 .name           = "kernel",
 132                 .offset         = MTDPART_OFS_APPEND,
 133                 .size           = SZ_4M,
 134                 .mask_flags     = 0,
 135         },
 136         /* File system (older GIT kernels started this on the 5MB mark) */
 137         {
 138                 .name           = "filesystem",
 139                 .offset         = MTDPART_OFS_APPEND,
 140                 .size           = MTDPART_SIZ_FULL,
 141                 .mask_flags     = 0,
 142         }
 143         /* A few blocks at end hold a flash BBT ... created by TI's CCS
 144          * using flashwriter_nand.out, but ignored by TI's versions of
 145          * Linux and u-boot.  We boot faster by using them.
 146          */
 147 };
 148
 149 static struct davinci_aemif_timing davinci_evm_nandflash_timing = {
 150         .wsetup         = 20,
 151         .wstrobe        = 40,
 152         .whold          = 20,
 153         .rsetup         = 10,
 154         .rstrobe        = 40,
 155         .rhold          = 10,
 156         .ta             = 40,
 157 };
 158
 159 static struct davinci_nand_pdata davinci_evm_nandflash_data = {
 160         .core_chipsel   = 0,
 161         .parts          = davinci_evm_nandflash_partition,
 162         .nr_parts       = ARRAY_SIZE(davinci_evm_nandflash_partition),
 163         .engine_type    = NAND_ECC_ENGINE_TYPE_ON_HOST,
 164         .ecc_bits       = 1,
 165         .bbt_options    = NAND_BBT_USE_FLASH,
 166         .timing         = &davinci_evm_nandflash_timing,
 167 };
 168
 169 static struct resource davinci_evm_nandflash_resource[] = {
 170         {
 171                 .start          = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
 172                 .end            = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
 173                 .flags          = IORESOURCE_MEM,
 174         }, {
 175                 .start          = DM644X_ASYNC_EMIF_CONTROL_BASE,
 176                 .end            = DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
 177                 .flags          = IORESOURCE_MEM,
 178         },
 179 };
 180
 181 static struct resource davinci_evm_aemif_resource[] = {
 182         {
 183                 .start          = DM644X_ASYNC_EMIF_CONTROL_BASE,
 184                 .end            = DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
 185                 .flags          = IORESOURCE_MEM,
 186         },
 187 };
 188
 189 static struct aemif_abus_data davinci_evm_aemif_abus_data[] = {
 190         {
 191                 .cs             = 1,
 192         },
 193 };
 194
 195 static struct platform_device davinci_evm_nandflash_devices[] = {
 196         {
 197                 .name           = "davinci_nand",
 198                 .id             = 0,
 199                 .dev            = {
 200                         .platform_data  = &davinci_evm_nandflash_data,
 201                 },
 202                 .num_resources  = ARRAY_SIZE(davinci_evm_nandflash_resource),
 203                 .resource       = davinci_evm_nandflash_resource,
 204         },
 205 };
 206
 207 static struct aemif_platform_data davinci_evm_aemif_pdata = {
 208         .abus_data = davinci_evm_aemif_abus_data,
 209         .num_abus_data = ARRAY_SIZE(davinci_evm_aemif_abus_data),
 210         .sub_devices = davinci_evm_nandflash_devices,
 211         .num_sub_devices = ARRAY_SIZE(davinci_evm_nandflash_devices),
 212 };
 213
 214 static struct platform_device davinci_evm_aemif_device = {
 215         .name                   = "ti-aemif",
 216         .id                     = -1,
 217         .dev = {
 218                 .platform_data  = &davinci_evm_aemif_pdata,
 219         },
 220         .resource               = davinci_evm_aemif_resource,
 221         .num_resources          = ARRAY_SIZE(davinci_evm_aemif_resource),
 222 };
 223
 224 static u64 davinci_fb_dma_mask = DMA_BIT_MASK(32);
 225
 226 static struct platform_device davinci_fb_device = {
 227         .name           = "davincifb",
 228         .id             = -1,
 229         .dev = {
 230                 .dma_mask               = &davinci_fb_dma_mask,
 231                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 232         },
 233         .num_resources = 0,
 234 };
 235
 236 static struct tvp514x_platform_data dm644xevm_tvp5146_pdata = {
 237         .clk_polarity = 0,
 238         .hs_polarity = 1,
 239         .vs_polarity = 1
 240 };
 241
 242 #define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
 243 /* Inputs available at the TVP5146 */
 244 static struct v4l2_input dm644xevm_tvp5146_inputs[] = {
 245         {
 246                 .index = 0,
 247                 .name = "Composite",
 248                 .type = V4L2_INPUT_TYPE_CAMERA,
 249                 .std = TVP514X_STD_ALL,
 250         },
 251         {
 252                 .index = 1,
 253                 .name = "S-Video",
 254                 .type = V4L2_INPUT_TYPE_CAMERA,
 255                 .std = TVP514X_STD_ALL,
 256         },
 257 };
 258
 259 /*
 260  * this is the route info for connecting each input to decoder
 261  * ouput that goes to vpfe. There is a one to one correspondence
 262  * with tvp5146_inputs
 263  */
 264 static struct vpfe_route dm644xevm_tvp5146_routes[] = {
 265         {
 266                 .input = INPUT_CVBS_VI2B,
 267                 .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
 268         },
 269         {
 270                 .input = INPUT_SVIDEO_VI2C_VI1C,
 271                 .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
 272         },
 273 };
 274
 275 static struct vpfe_subdev_info dm644xevm_vpfe_sub_devs[] = {
 276         {
 277                 .name = "tvp5146",
 278                 .grp_id = 0,
 279                 .num_inputs = ARRAY_SIZE(dm644xevm_tvp5146_inputs),
 280                 .inputs = dm644xevm_tvp5146_inputs,
 281                 .routes = dm644xevm_tvp5146_routes,
 282                 .can_route = 1,
 283                 .ccdc_if_params = {
 284                         .if_type = VPFE_BT656,
 285                         .hdpol = VPFE_PINPOL_POSITIVE,
 286                         .vdpol = VPFE_PINPOL_POSITIVE,
 287                 },
 288                 .board_info = {
 289                         I2C_BOARD_INFO("tvp5146", 0x5d),
 290                         .platform_data = &dm644xevm_tvp5146_pdata,
 291                 },
 292         },
 293 };
 294
 295 static struct vpfe_config dm644xevm_capture_cfg = {
 296         .num_subdevs = ARRAY_SIZE(dm644xevm_vpfe_sub_devs),
 297         .i2c_adapter_id = 1,
 298         .sub_devs = dm644xevm_vpfe_sub_devs,
 299         .card_name = "DM6446 EVM",
 300         .ccdc = "DM6446 CCDC",
 301 };
 302
 303 static struct platform_device rtc_dev = {
 304         .name           = "rtc_davinci_evm",
 305         .id             = -1,
 306 };
 307
 308 /*----------------------------------------------------------------------*/
 309 #ifdef CONFIG_I2C
 310 /*
 311  * I2C GPIO expanders
 312  */
 313
 314 #define PCF_Uxx_BASE(x) (DAVINCI_N_GPIO + ((x) * 8))
 315
 316
 317 /* U2 -- LEDs */
 318
 319 static struct gpio_led evm_leds[] = {
 320         { .name = "DS8", .active_low = 1,
 321                 .default_trigger = "heartbeat", },
 322         { .name = "DS7", .active_low = 1, },
 323         { .name = "DS6", .active_low = 1, },
 324         { .name = "DS5", .active_low = 1, },
 325         { .name = "DS4", .active_low = 1, },
 326         { .name = "DS3", .active_low = 1, },
 327         { .name = "DS2", .active_low = 1,
 328                 .default_trigger = "mmc0", },
 329         { .name = "DS1", .active_low = 1,
 330                 .default_trigger = "disk-activity", },
 331 };
 332
 333 static const struct gpio_led_platform_data evm_led_data = {
 334         .num_leds       = ARRAY_SIZE(evm_leds),
 335         .leds           = evm_leds,
 336 };
 337
 338 static struct platform_device *evm_led_dev;
 339
 340 static int
 341 evm_led_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
 342 {
 343         struct gpio_led *leds = evm_leds;
 344         int status;
 345
 346         while (ngpio--) {
 347                 leds->gpio = gpio++;
 348                 leds++;
 349         }
 350
 351         /* what an extremely annoying way to be forced to handle
 352          * device unregistration ...
 353          */
 354         evm_led_dev = platform_device_alloc("leds-gpio", 0);
 355         platform_device_add_data(evm_led_dev,
 356                         &evm_led_data, sizeof evm_led_data);
 357
 358         evm_led_dev->dev.parent = &client->dev;
 359         status = platform_device_add(evm_led_dev);
 360         if (status < 0) {
 361                 platform_device_put(evm_led_dev);
 362                 evm_led_dev = NULL;
 363         }
 364         return status;
 365 }
 366
 367 static int
 368 evm_led_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
 369 {
 370         if (evm_led_dev) {
 371                 platform_device_unregister(evm_led_dev);
 372                 evm_led_dev = NULL;
 373         }
 374         return 0;
 375 }
 376
 377 static struct pcf857x_platform_data pcf_data_u2 = {
 378         .gpio_base      = PCF_Uxx_BASE(0),
 379         .setup          = evm_led_setup,
 380         .teardown       = evm_led_teardown,
 381 };
 382
 383
 384 /* U18 - A/V clock generator and user switch */
 385
 386 static int sw_gpio;
 387
 388 static ssize_t
 389 sw_show(struct device *d, struct device_attribute *a, char *buf)
 390 {
 391         char *s = gpio_get_value_cansleep(sw_gpio) ? "on\n" : "off\n";
 392
 393         strcpy(buf, s);
 394         return strlen(s);
 395 }
 396
 397 static DEVICE_ATTR(user_sw, S_IRUGO, sw_show, NULL);
 398
 399 static int
 400 evm_u18_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
 401 {
 402         int     status;
 403
 404         /* export dip switch option */
 405         sw_gpio = gpio + 7;
 406         status = gpio_request(sw_gpio, "user_sw");
 407         if (status == 0)
 408                 status = gpio_direction_input(sw_gpio);
 409         if (status == 0)
 410                 status = device_create_file(&client->dev, &dev_attr_user_sw);
 411         else
 412                 gpio_free(sw_gpio);
 413         if (status != 0)
 414                 sw_gpio = -EINVAL;
 415
 416         /* audio PLL:  48 kHz (vs 44.1 or 32), single rate (vs double) */
 417         gpio_request(gpio + 3, "pll_fs2");
 418         gpio_direction_output(gpio + 3, 0);
 419
 420         gpio_request(gpio + 2, "pll_fs1");
 421         gpio_direction_output(gpio + 2, 0);
 422
 423         gpio_request(gpio + 1, "pll_sr");
 424         gpio_direction_output(gpio + 1, 0);
 425
 426         return 0;
 427 }
 428
 429 static int
 430 evm_u18_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
 431 {
 432         gpio_free(gpio + 1);
 433         gpio_free(gpio + 2);
 434         gpio_free(gpio + 3);
 435
 436         if (sw_gpio > 0) {
 437                 device_remove_file(&client->dev, &dev_attr_user_sw);
 438                 gpio_free(sw_gpio);
 439         }
 440         return 0;
 441 }
 442
 443 static struct pcf857x_platform_data pcf_data_u18 = {
 444         .gpio_base      = PCF_Uxx_BASE(1),
 445         .n_latch        = (1 << 3) | (1 << 2) | (1 << 1),
 446         .setup          = evm_u18_setup,
 447         .teardown       = evm_u18_teardown,
 448 };
 449
 450
 451 /* U35 - various I/O signals used to manage USB, CF, ATA, etc */
 452
 453 static int
 454 evm_u35_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
 455 {
 456         /* p0 = nDRV_VBUS (initial:  don't supply it) */
 457         gpio_request(gpio + 0, "nDRV_VBUS");
 458         gpio_direction_output(gpio + 0, 1);
 459
 460         /* p1 = VDDIMX_EN */
 461         gpio_request(gpio + 1, "VDDIMX_EN");
 462         gpio_direction_output(gpio + 1, 1);
 463
 464         /* p2 = VLYNQ_EN */
 465         gpio_request(gpio + 2, "VLYNQ_EN");
 466         gpio_direction_output(gpio + 2, 1);
 467
 468         /* p3 = n3V3_CF_RESET (initial: stay in reset) */
 469         gpio_request(gpio + 3, "nCF_RESET");
 470         gpio_direction_output(gpio + 3, 0);
 471
 472         /* (p4 unused) */
 473
 474         /* p5 = 1V8_WLAN_RESET (initial: stay in reset) */
 475         gpio_request(gpio + 5, "WLAN_RESET");
 476         gpio_direction_output(gpio + 5, 1);
 477
 478         /* p6 = nATA_SEL (initial: select) */
 479         gpio_request(gpio + 6, "nATA_SEL");
 480         gpio_direction_output(gpio + 6, 0);
 481
 482         /* p7 = nCF_SEL (initial: deselect) */
 483         gpio_request(gpio + 7, "nCF_SEL");
 484         gpio_direction_output(gpio + 7, 1);
 485
 486         return 0;
 487 }
 488
 489 static int
 490 evm_u35_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
 491 {
 492         gpio_free(gpio + 7);
 493         gpio_free(gpio + 6);
 494         gpio_free(gpio + 5);
 495         gpio_free(gpio + 3);
 496         gpio_free(gpio + 2);
 497         gpio_free(gpio + 1);
 498         gpio_free(gpio + 0);
 499         return 0;
 500 }
 501
 502 static struct pcf857x_platform_data pcf_data_u35 = {
 503         .gpio_base      = PCF_Uxx_BASE(2),
 504         .setup          = evm_u35_setup,
 505         .teardown       = evm_u35_teardown,
 506 };
 507
 508 /*----------------------------------------------------------------------*/
 509
 510 /* Most of this EEPROM is unused, but U-Boot uses some data:
 511  *  - 0x7f00, 6 bytes Ethernet Address
 512  *  - 0x0039, 1 byte NTSC vs PAL (bit 0x80 == PAL)
 513  *  - ... newer boards may have more
 514  */
 515
 516 static struct nvmem_cell_info dm644evm_nvmem_cells[] = {
 517         {
 518                 .name           = "macaddr",
 519                 .offset         = 0x7f00,
 520                 .bytes          = ETH_ALEN,
 521         }
 522 };
 523
 524 static struct nvmem_cell_table dm644evm_nvmem_cell_table = {
 525         .nvmem_name     = "1-00500",
 526         .cells          = dm644evm_nvmem_cells,
 527         .ncells         = ARRAY_SIZE(dm644evm_nvmem_cells),
 528 };
 529
 530 static struct nvmem_cell_lookup dm644evm_nvmem_cell_lookup = {
 531         .nvmem_name     = "1-00500",
 532         .cell_name      = "macaddr",
 533         .dev_id         = "davinci_emac.1",
 534         .con_id         = "mac-address",
 535 };
 536
 537 static const struct property_entry eeprom_properties[] = {
 538         PROPERTY_ENTRY_U32("pagesize", 64),
 539         { }
 540 };
 541
 542 static const struct software_node eeprom_node = {
 543         .properties = eeprom_properties,
 544 };
 545
 546 /*
 547  * MSP430 supports RTC, card detection, input from IR remote, and
 548  * a bit more.  It triggers interrupts on GPIO(7) from pressing
 549  * buttons on the IR remote, and for card detect switches.
 550  */
 551 static struct i2c_client *dm6446evm_msp;
 552
 553 static int dm6446evm_msp_probe(struct i2c_client *client)
 554 {
 555         dm6446evm_msp = client;
 556         return 0;
 557 }
 558
 559 static int dm6446evm_msp_remove(struct i2c_client *client)
 560 {
 561         dm6446evm_msp = NULL;
 562         return 0;
 563 }
 564
 565 static const struct i2c_device_id dm6446evm_msp_ids[] = {
 566         { "dm6446evm_msp", 0, },
 567         { /* end of list */ },
 568 };
 569
 570 static struct i2c_driver dm6446evm_msp_driver = {
 571         .driver.name    = "dm6446evm_msp",
 572         .id_table       = dm6446evm_msp_ids,
 573         .probe_new      = dm6446evm_msp_probe,
 574         .remove         = dm6446evm_msp_remove,
 575 };
 576
 577 static int dm6444evm_msp430_get_pins(void)
 578 {
 579         static const char txbuf[2] = { 2, 4, };
 580         char buf[4];
 581         struct i2c_msg msg[2] = {
 582                 {
 583                         .flags = 0,
 584                         .len = 2,
 585                         .buf = (void __force *)txbuf,
 586                 },
 587                 {
 588                         .flags = I2C_M_RD,
 589                         .len = 4,
 590                         .buf = buf,
 591                 },
 592         };
 593         int status;
 594
 595         if (!dm6446evm_msp)
 596                 return -ENXIO;
 597
 598         msg[0].addr = dm6446evm_msp->addr;
 599         msg[1].addr = dm6446evm_msp->addr;
 600
 601         /* Command 4 == get input state, returns port 2 and port3 data
 602          *   S Addr W [A] len=2 [A] cmd=4 [A]
 603          *   RS Addr R [A] [len=4] A [cmd=4] A [port2] A [port3] N P
 604          */
 605         status = i2c_transfer(dm6446evm_msp->adapter, msg, 2);
 606         if (status < 0)
 607                 return status;
 608
 609         dev_dbg(&dm6446evm_msp->dev, "PINS: %4ph\n", buf);
 610
 611         return (buf[3] << 8) | buf[2];
 612 }
 613
 614 static int dm6444evm_mmc_get_cd(int module)
 615 {
 616         int status = dm6444evm_msp430_get_pins();
 617
 618         return (status < 0) ? status : !(status & BIT(1));
 619 }
 620
 621 static int dm6444evm_mmc_get_ro(int module)
 622 {
 623         int status = dm6444evm_msp430_get_pins();
 624
 625         return (status < 0) ? status : status & BIT(6 + 8);
 626 }
 627
 628 static struct davinci_mmc_config dm6446evm_mmc_config = {
 629         .get_cd         = dm6444evm_mmc_get_cd,
 630         .get_ro         = dm6444evm_mmc_get_ro,
 631         .wires          = 4,
 632 };
 633
 634 static struct i2c_board_info __initdata i2c_info[] =  {
 635         {
 636                 I2C_BOARD_INFO("dm6446evm_msp", 0x23),
 637         },
 638         {
 639                 I2C_BOARD_INFO("pcf8574", 0x38),
 640                 .platform_data  = &pcf_data_u2,
 641         },
 642         {
 643                 I2C_BOARD_INFO("pcf8574", 0x39),
 644                 .platform_data  = &pcf_data_u18,
 645         },
 646         {
 647                 I2C_BOARD_INFO("pcf8574", 0x3a),
 648                 .platform_data  = &pcf_data_u35,
 649         },
 650         {
 651                 I2C_BOARD_INFO("24c256", 0x50),
 652                 .swnode = &eeprom_node,
 653         },
 654         {
 655                 I2C_BOARD_INFO("tlv320aic33", 0x1b),
 656         },
 657 };
 658
 659 #define DM644X_I2C_SDA_PIN      GPIO_TO_PIN(2, 12)
 660 #define DM644X_I2C_SCL_PIN      GPIO_TO_PIN(2, 11)
 661
 662 static struct gpiod_lookup_table i2c_recovery_gpiod_table = {
 663         .dev_id = "i2c_davinci.1",
 664         .table = {
 665                 GPIO_LOOKUP("davinci_gpio", DM644X_I2C_SDA_PIN, "sda",
 666                             GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
 667                 GPIO_LOOKUP("davinci_gpio", DM644X_I2C_SCL_PIN, "scl",
 668                             GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
 669                 { }
 670         },
 671 };
 672
 673 /* The msp430 uses a slow bitbanged I2C implementation (ergo 20 KHz),
 674  * which requires 100 usec of idle bus after i2c writes sent to it.
 675  */
 676 static struct davinci_i2c_platform_data i2c_pdata = {
 677         .bus_freq       = 20 /* kHz */,
 678         .bus_delay      = 100 /* usec */,
 679         .gpio_recovery  = true,
 680 };
 681
 682 static void __init evm_init_i2c(void)
 683 {
 684         gpiod_add_lookup_table(&i2c_recovery_gpiod_table);
 685         davinci_init_i2c(&i2c_pdata);
 686         i2c_add_driver(&dm6446evm_msp_driver);
 687         i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
 688 }
 689 #endif
 690
 691 /* Fixed regulator support */
 692 static struct regulator_consumer_supply fixed_supplies_3_3v[] = {
 693         /* Baseboard 3.3V: 5V -> TPS54310PWP -> 3.3V */
 694         REGULATOR_SUPPLY("AVDD", "1-001b"),
 695         REGULATOR_SUPPLY("DRVDD", "1-001b"),
 696 };
 697
 698 static struct regulator_consumer_supply fixed_supplies_1_8v[] = {
 699         /* Baseboard 1.8V: 5V -> TPS54310PWP -> 1.8V */
 700         REGULATOR_SUPPLY("IOVDD", "1-001b"),
 701         REGULATOR_SUPPLY("DVDD", "1-001b"),
 702 };
 703
 704 #define VENC_STD_ALL    (V4L2_STD_NTSC | V4L2_STD_PAL)
 705
 706 /* venc standard timings */
 707 static struct vpbe_enc_mode_info dm644xevm_enc_std_timing[] = {
 708         {
 709                 .name           = "ntsc",
 710                 .timings_type   = VPBE_ENC_STD,
 711                 .std_id         = V4L2_STD_NTSC,
 712                 .interlaced     = 1,
 713                 .xres           = 720,
 714                 .yres           = 480,
 715                 .aspect         = {11, 10},
 716                 .fps            = {30000, 1001},
 717                 .left_margin    = 0x79,
 718                 .upper_margin   = 0x10,
 719         },
 720         {
 721                 .name           = "pal",
 722                 .timings_type   = VPBE_ENC_STD,
 723                 .std_id         = V4L2_STD_PAL,
 724                 .interlaced     = 1,
 725                 .xres           = 720,
 726                 .yres           = 576,
 727                 .aspect         = {54, 59},
 728                 .fps            = {25, 1},
 729                 .left_margin    = 0x7e,
 730                 .upper_margin   = 0x16,
 731         },
 732 };
 733
 734 /* venc dv preset timings */
 735 static struct vpbe_enc_mode_info dm644xevm_enc_preset_timing[] = {
 736         {
 737                 .name           = "480p59_94",
 738                 .timings_type   = VPBE_ENC_DV_TIMINGS,
 739                 .dv_timings     = V4L2_DV_BT_CEA_720X480P59_94,
 740                 .interlaced     = 0,
 741                 .xres           = 720,
 742                 .yres           = 480,
 743                 .aspect         = {1, 1},
 744                 .fps            = {5994, 100},
 745                 .left_margin    = 0x80,
 746                 .upper_margin   = 0x20,
 747         },
 748         {
 749                 .name           = "576p50",
 750                 .timings_type   = VPBE_ENC_DV_TIMINGS,
 751                 .dv_timings     = V4L2_DV_BT_CEA_720X576P50,
 752                 .interlaced     = 0,
 753                 .xres           = 720,
 754                 .yres           = 576,
 755                 .aspect         = {1, 1},
 756                 .fps            = {50, 1},
 757                 .left_margin    = 0x7e,
 758                 .upper_margin   = 0x30,
 759         },
 760 };
 761
 762 /*
 763  * The outputs available from VPBE + encoders. Keep the order same
 764  * as that of encoders. First those from venc followed by that from
 765  * encoders. Index in the output refers to index on a particular encoder.
 766  * Driver uses this index to pass it to encoder when it supports more
 767  * than one output. Userspace applications use index of the array to
 768  * set an output.
 769  */
 770 static struct vpbe_output dm644xevm_vpbe_outputs[] = {
 771         {
 772                 .output         = {
 773                         .index          = 0,
 774                         .name           = "Composite",
 775                         .type           = V4L2_OUTPUT_TYPE_ANALOG,
 776                         .std            = VENC_STD_ALL,
 777                         .capabilities   = V4L2_OUT_CAP_STD,
 778                 },
 779                 .subdev_name    = DM644X_VPBE_VENC_SUBDEV_NAME,
 780                 .default_mode   = "ntsc",
 781                 .num_modes      = ARRAY_SIZE(dm644xevm_enc_std_timing),
 782                 .modes          = dm644xevm_enc_std_timing,
 783         },
 784         {
 785                 .output         = {
 786                         .index          = 1,
 787                         .name           = "Component",
 788                         .type           = V4L2_OUTPUT_TYPE_ANALOG,
 789                         .capabilities   = V4L2_OUT_CAP_DV_TIMINGS,
 790                 },
 791                 .subdev_name    = DM644X_VPBE_VENC_SUBDEV_NAME,
 792                 .default_mode   = "480p59_94",
 793                 .num_modes      = ARRAY_SIZE(dm644xevm_enc_preset_timing),
 794                 .modes          = dm644xevm_enc_preset_timing,
 795         },
 796 };
 797
 798 static struct vpbe_config dm644xevm_display_cfg = {
 799         .module_name    = "dm644x-vpbe-display",
 800         .i2c_adapter_id = 1,
 801         .osd            = {
 802                 .module_name    = DM644X_VPBE_OSD_SUBDEV_NAME,
 803         },
 804         .venc           = {
 805                 .module_name    = DM644X_VPBE_VENC_SUBDEV_NAME,
 806         },
 807         .num_outputs    = ARRAY_SIZE(dm644xevm_vpbe_outputs),
 808         .outputs        = dm644xevm_vpbe_outputs,
 809 };
 810
 811 static struct platform_device *davinci_evm_devices[] __initdata = {
 812         &davinci_fb_device,
 813         &rtc_dev,
 814 };
 815
 816 static void __init
 817 davinci_evm_map_io(void)
 818 {
 819         dm644x_init();
 820 }
 821
 822 static int davinci_phy_fixup(struct phy_device *phydev)
 823 {
 824         unsigned int control;
 825         /* CRITICAL: Fix for increasing PHY signal drive strength for
 826          * TX lockup issue. On DaVinci EVM, the Intel LXT971 PHY
 827          * signal strength was low causing  TX to fail randomly. The
 828          * fix is to Set bit 11 (Increased MII drive strength) of PHY
 829          * register 26 (Digital Config register) on this phy. */
 830         control = phy_read(phydev, 26);
 831         phy_write(phydev, 26, (control | 0x800));
 832         return 0;
 833 }
 834
 835 #define HAS_ATA         (IS_ENABLED(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
 836                          IS_ENABLED(CONFIG_PATA_BK3710))
 837
 838 #define HAS_NOR         IS_ENABLED(CONFIG_MTD_PHYSMAP)
 839
 840 #define HAS_NAND        IS_ENABLED(CONFIG_MTD_NAND_DAVINCI)
 841
 842 #define GPIO_nVBUS_DRV          160
 843
 844 static struct gpiod_lookup_table dm644evm_usb_gpio_table = {
 845         .dev_id = "musb-davinci",
 846         .table = {
 847                 GPIO_LOOKUP("davinci_gpio", GPIO_nVBUS_DRV, NULL,
 848                             GPIO_ACTIVE_HIGH),
 849                 { }
 850         },
 851 };
 852
 853 static __init void davinci_evm_init(void)
 854 {
 855         int ret;
 856         struct clk *aemif_clk;
 857         struct davinci_soc_info *soc_info = &davinci_soc_info;
 858
 859         dm644x_register_clocks();
 860
 861         regulator_register_always_on(0, "fixed-dummy", fixed_supplies_1_8v,
 862                                      ARRAY_SIZE(fixed_supplies_1_8v), 1800000);
 863         regulator_register_always_on(1, "fixed-dummy", fixed_supplies_3_3v,
 864                                      ARRAY_SIZE(fixed_supplies_3_3v), 3300000);
 865
 866         dm644x_init_devices();
 867
 868         ret = dm644x_gpio_register();
 869         if (ret)
 870                 pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
 871
 872         aemif_clk = clk_get(NULL, "aemif");
 873         clk_prepare_enable(aemif_clk);
 874
 875         if (HAS_ATA) {
 876                 if (HAS_NAND || HAS_NOR)
 877                         pr_warn("WARNING: both IDE and Flash are enabled, but they share AEMIF pins\n"
 878                                 "\tDisable IDE for NAND/NOR support\n");
 879                 davinci_init_ide();
 880         } else if (HAS_NAND || HAS_NOR) {
 881                 davinci_cfg_reg(DM644X_HPIEN_DISABLE);
 882                 davinci_cfg_reg(DM644X_ATAEN_DISABLE);
 883
 884                 /* only one device will be jumpered and detected */
 885                 if (HAS_NAND) {
 886                         platform_device_register(&davinci_evm_aemif_device);
 887 #ifdef CONFIG_I2C
 888                         evm_leds[7].default_trigger = "nand-disk";
 889 #endif
 890                         if (HAS_NOR)
 891                                 pr_warn("WARNING: both NAND and NOR flash are enabled; disable one of them.\n");
 892                 } else if (HAS_NOR)
 893                         platform_device_register(&davinci_evm_norflash_device);
 894         }
 895
 896         platform_add_devices(davinci_evm_devices,
 897                              ARRAY_SIZE(davinci_evm_devices));
 898 #ifdef CONFIG_I2C
 899         nvmem_add_cell_table(&dm644evm_nvmem_cell_table);
 900         nvmem_add_cell_lookups(&dm644evm_nvmem_cell_lookup, 1);
 901         evm_init_i2c();
 902         davinci_setup_mmc(0, &dm6446evm_mmc_config);
 903 #endif
 904         dm644x_init_video(&dm644xevm_capture_cfg, &dm644xevm_display_cfg);
 905
 906         davinci_serial_init(dm644x_serial_device);
 907         dm644x_init_asp();
 908
 909         /* irlml6401 switches over 1A, in under 8 msec */
 910         gpiod_add_lookup_table(&dm644evm_usb_gpio_table);
 911         davinci_setup_usb(1000, 8);
 912
 913         if (IS_BUILTIN(CONFIG_PHYLIB)) {
 914                 soc_info->emac_pdata->phy_id = DM644X_EVM_PHY_ID;
 915                 /* Register the fixup for PHY on DaVinci */
 916                 phy_register_fixup_for_uid(LXT971_PHY_ID, LXT971_PHY_MASK,
 917                                                 davinci_phy_fixup);
 918         }
 919 }
 920
 921 MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM")
 922         /* Maintainer: MontaVista Software <source@mvista.com> */
 923         .atag_offset  = 0x100,
 924         .map_io       = davinci_evm_map_io,
 925         .init_irq     = dm644x_init_irq,
 926         .init_time      = dm644x_init_time,
 927         .init_machine = davinci_evm_init,
 928         .init_late      = davinci_init_late,
 929         .dma_zone_size  = SZ_128M,
 930 MACHINE_END