1 /* SPDX-License-Identifier: GPL-2.0 */
2 #include <asm/assembler.h>
3 #include <asm/unwind.h>
5 #if __LINUX_ARM_ARCH__ >= 6
6 .macro bitop, name, instr
10 strbne r1, [ip] @ assert word-aligned
12 and r3, r0, #31 @ Get bit offset
14 add r1, r1, r0, lsl #2 @ Get word offset
15 #if __LINUX_ARM_ARCH__ >= 7 && defined(CONFIG_SMP)
31 .macro __testop, name, instr, store, barrier
35 strbne r1, [ip] @ assert word-aligned
37 and r3, r0, #31 @ Get bit offset
39 add r1, r1, r0, lsl #2 @ Get word offset
40 mov r3, r2, lsl r3 @ create mask
42 #if __LINUX_ARM_ARCH__ >= 7 && defined(CONFIG_SMP)
48 ands r0, r2, r3 @ save old value of bit
49 \instr r2, r2, r3 @ toggle bit
61 .macro testop, name, instr, store
62 __testop \name, \instr, \store, smp_dmb
65 .macro sync_testop, name, instr, store
66 __testop \name, \instr, \store, __smp_dmb
69 .macro bitop, name, instr
73 strbne r1, [ip] @ assert word-aligned
78 save_and_disable_irqs ip
79 ldr r2, [r1, r0, lsl #2]
81 str r2, [r1, r0, lsl #2]
89 * testop - implement a test_and_xxx_bit operation.
90 * @instr: operational instruction
91 * @store: store instruction
93 * Note: we can trivially conditionalise the store instruction
94 * to avoid dirtying the data cache.
96 .macro testop, name, instr, store
100 strbne r1, [ip] @ assert word-aligned
103 save_and_disable_irqs ip
104 ldr r2, [r1, r0, lsl #2]!
107 \instr r2, r2, r0, lsl r3