arch/arm/kernel/irq.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  *  linux/arch/arm/kernel/irq.c
   4  *
   5  *  Copyright (C) 1992 Linus Torvalds
   6  *  Modifications for ARM processor Copyright (C) 1995-2000 Russell King.
   7  *
   8  *  Support for Dynamic Tick Timer Copyright (C) 2004-2005 Nokia Corporation.
   9  *  Dynamic Tick Timer written by Tony Lindgren <tony@atomide.com> and
  10  *  Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>.
  11  *
  12  *  This file contains the code used by various IRQ handling routines:
  13  *  asking for different IRQ's should be done through these routines
  14  *  instead of just grabbing them. Thus setups with different IRQ numbers
  15  *  shouldn't result in any weird surprises, and installing new handlers
  16  *  should be easier.
  17  *
  18  *  IRQ's are in fact implemented a bit like signal handlers for the kernel.
  19  *  Naturally it's not a 1:1 relation, but there are similarities.
  20  */
  21 #include <linux/signal.h>
  22 #include <linux/ioport.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/irq.h>
  25 #include <linux/irqchip.h>
  26 #include <linux/random.h>
  27 #include <linux/smp.h>
  28 #include <linux/init.h>
  29 #include <linux/seq_file.h>
  30 #include <linux/errno.h>
  31 #include <linux/list.h>
  32 #include <linux/kallsyms.h>
  33 #include <linux/proc_fs.h>
  34 #include <linux/export.h>
  35
  36 #include <asm/hardware/cache-l2x0.h>
  37 #include <asm/hardware/cache-uniphier.h>
  38 #include <asm/outercache.h>
  39 #include <asm/softirq_stack.h>
  40 #include <asm/exception.h>
  41 #include <asm/mach/arch.h>
  42 #include <asm/mach/irq.h>
  43 #include <asm/mach/time.h>
  44
  45 #include "reboot.h"
  46
  47 unsigned long irq_err_count;
  48
  49 #ifdef CONFIG_IRQSTACKS
  50
  51 asmlinkage DEFINE_PER_CPU_READ_MOSTLY(u8 *, irq_stack_ptr);
  52
  53 static void __init init_irq_stacks(void)
  54 {
  55         u8 *stack;
  56         int cpu;
  57
  58         for_each_possible_cpu(cpu) {
  59                 if (!IS_ENABLED(CONFIG_VMAP_STACK))
  60                         stack = (u8 *)__get_free_pages(GFP_KERNEL,
  61                                                        THREAD_SIZE_ORDER);
  62                 else
  63                         stack = __vmalloc_node(THREAD_SIZE, THREAD_ALIGN,
  64                                                THREADINFO_GFP, NUMA_NO_NODE,
  65                                                __builtin_return_address(0));
  66
  67                 if (WARN_ON(!stack))
  68                         break;
  69                 per_cpu(irq_stack_ptr, cpu) = &stack[THREAD_SIZE];
  70         }
  71 }
  72
  73 static void ____do_softirq(void *arg)
  74 {
  75         __do_softirq();
  76 }
  77
  78 void do_softirq_own_stack(void)
  79 {
  80         call_with_stack(____do_softirq, NULL,
  81                         __this_cpu_read(irq_stack_ptr));
  82 }
  83
  84 #endif
  85
  86 int arch_show_interrupts(struct seq_file *p, int prec)
  87 {
  88 #ifdef CONFIG_FIQ
  89         show_fiq_list(p, prec);
  90 #endif
  91 #ifdef CONFIG_SMP
  92         show_ipi_list(p, prec);
  93 #endif
  94         seq_printf(p, "%*s: %10lu\n", prec, "Err", irq_err_count);
  95         return 0;
  96 }
  97
  98 /*
  99  * handle_IRQ handles all hardware IRQ's.  Decoded IRQs should
 100  * not come via this function.  Instead, they should provide their
 101  * own 'handler'.  Used by platform code implementing C-based 1st
 102  * level decoding.
 103  */
 104 void handle_IRQ(unsigned int irq, struct pt_regs *regs)
 105 {
 106         struct irq_desc *desc;
 107
 108         /*
 109          * Some hardware gives randomly wrong interrupts.  Rather
 110          * than crashing, do something sensible.
 111          */
 112         if (unlikely(!irq || irq >= nr_irqs))
 113                 desc = NULL;
 114         else
 115                 desc = irq_to_desc(irq);
 116
 117         if (likely(desc))
 118                 handle_irq_desc(desc);
 119         else
 120                 ack_bad_irq(irq);
 121 }
 122
 123 void __init init_IRQ(void)
 124 {
 125         int ret;
 126
 127 #ifdef CONFIG_IRQSTACKS
 128         init_irq_stacks();
 129 #endif
 130
 131         if (IS_ENABLED(CONFIG_OF) && !machine_desc->init_irq)
 132                 irqchip_init();
 133         else
 134                 machine_desc->init_irq();
 135
 136         if (IS_ENABLED(CONFIG_OF) && IS_ENABLED(CONFIG_CACHE_L2X0) &&
 137             (machine_desc->l2c_aux_mask || machine_desc->l2c_aux_val)) {
 138                 if (!outer_cache.write_sec)
 139                         outer_cache.write_sec = machine_desc->l2c_write_sec;
 140                 ret = l2x0_of_init(machine_desc->l2c_aux_val,
 141                                    machine_desc->l2c_aux_mask);
 142                 if (ret && ret != -ENODEV)
 143                         pr_err("L2C: failed to init: %d\n", ret);
 144         }
 145
 146         uniphier_cache_init();
 147 }
 148
 149 #ifdef CONFIG_SPARSE_IRQ
 150 int __init arch_probe_nr_irqs(void)
 151 {
 152         nr_irqs = machine_desc->nr_irqs ? machine_desc->nr_irqs : NR_IRQS;
 153         return nr_irqs;
 154 }
 155 #endif