arch/arm/include/debug/brcmstb.S

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /* Copyright (C) 2016 Broadcom */
   3 #include <linux/serial_reg.h>
   4 #include <asm/cputype.h>
   5
   6 /* Physical register offset and virtual register offset */
   7 #define REG_PHYS_BASE           0xf0000000
   8 #define REG_PHYS_BASE_V7        0x08000000
   9 #define REG_VIRT_BASE           0xfc000000
  10 #define REG_PHYS_ADDR(x)        ((x) + REG_PHYS_BASE)
  11 #define REG_PHYS_ADDR_V7(x)     ((x) + REG_PHYS_BASE_V7)
  12
  13 /* Product id can be read from here */
  14 #define SUN_TOP_CTRL_BASE       REG_PHYS_ADDR(0x404000)
  15 #define SUN_TOP_CTRL_BASE_V7    REG_PHYS_ADDR_V7(0x404000)
  16
  17 #define UARTA_3390              REG_PHYS_ADDR(0x40a900)
  18 #define UARTA_72116             UARTA_7255
  19 #define UARTA_7250              REG_PHYS_ADDR(0x40b400)
  20 #define UARTA_7255              REG_PHYS_ADDR(0x40c000)
  21 #define UARTA_7260              UARTA_7255
  22 #define UARTA_7268              UARTA_7255
  23 #define UARTA_7271              UARTA_7268
  24 #define UARTA_7278              REG_PHYS_ADDR_V7(0x40c000)
  25 #define UARTA_7216              UARTA_7278
  26 #define UARTA_72164             UARTA_7278
  27 #define UARTA_72165             UARTA_7278
  28 #define UARTA_7364              REG_PHYS_ADDR(0x40b000)
  29 #define UARTA_7366              UARTA_7364
  30 #define UARTA_74371             REG_PHYS_ADDR(0x406b00)
  31 #define UARTA_7439              REG_PHYS_ADDR(0x40a900)
  32 #define UARTA_7445              REG_PHYS_ADDR(0x40ab00)
  33
  34 #define UART_SHIFT              2
  35
  36 #define checkuart(rp, rv, family_id, family) \
  37                 /* Load family id */ \
  38                 ldr     rp, =family_id ; \
  39                 /* Compare SUN_TOP_CTRL value against it */ \
  40                 cmp     rp, rv ; \
  41                 /* Passed test, load address */ \
  42                 ldreq   rp, =UARTA_##family ; \
  43                 /* Jump to save UART address */ \
  44                 beq     91f
  45
  46                 .macro  addruart, rp, rv, tmp
  47                 adr     \rp, 99f                @ actual addr of 99f
  48                 ldr     \rv, [\rp]              @ linked addr is stored there
  49                 sub     \rv, \rv, \rp           @ offset between the two
  50                 ldr     \rp, [\rp, #4]          @ linked brcmstb_uart_config
  51                 sub     \tmp, \rp, \rv          @ actual brcmstb_uart_config
  52                 ldr     \rp, [\tmp]             @ Load brcmstb_uart_config
  53                 cmp     \rp, #1                 @ needs initialization?
  54                 bne     100f                    @ no; go load the addresses
  55                 mov     \rv, #0                 @ yes; record init is done
  56                 str     \rv, [\tmp]
  57
  58                 /* Check for V7 memory map if B53 */
  59                 mrc     p15, 0, \rv, c0, c0, 0  @ get Main ID register
  60                 ldr     \rp, =ARM_CPU_PART_MASK
  61                 and     \rv, \rv, \rp
  62                 ldr     \rp, =ARM_CPU_PART_BRAHMA_B53   @ check for B53 CPU
  63                 cmp     \rv, \rp
  64                 bne     10f
  65
  66                 /* if PERIPHBASE doesn't overlap REG_PHYS_BASE use V7 map */
  67                 mrc     p15, 1, \rv, c15, c3, 0 @ get PERIPHBASE from CBAR
  68                 ands    \rv, \rv, #REG_PHYS_BASE
  69                 ldreq   \rp, =SUN_TOP_CTRL_BASE_V7
  70
  71                 /* Check SUN_TOP_CTRL base */
  72 10:             ldrne   \rp, =SUN_TOP_CTRL_BASE @ load SUN_TOP_CTRL PA
  73                 ldr     \rv, [\rp, #0]          @ get register contents
  74 ARM_BE8(        rev     \rv, \rv )
  75                 and     \rv, \rv, #0xffffff00   @ strip revision bits [7:0]
  76
  77                 /* Chip specific detection starts here */
  78 20:             checkuart(\rp, \rv, 0x33900000, 3390)
  79 21:             checkuart(\rp, \rv, 0x07211600, 72116)
  80 22:             checkuart(\rp, \rv, 0x72160000, 7216)
  81 23:             checkuart(\rp, \rv, 0x07216400, 72164)
  82 24:             checkuart(\rp, \rv, 0x07216500, 72165)
  83 25:             checkuart(\rp, \rv, 0x72500000, 7250)
  84 26:             checkuart(\rp, \rv, 0x72550000, 7255)
  85 27:             checkuart(\rp, \rv, 0x72600000, 7260)
  86 28:             checkuart(\rp, \rv, 0x72680000, 7268)
  87 29:             checkuart(\rp, \rv, 0x72710000, 7271)
  88 30:             checkuart(\rp, \rv, 0x72780000, 7278)
  89 31:             checkuart(\rp, \rv, 0x73640000, 7364)
  90 32:             checkuart(\rp, \rv, 0x73660000, 7366)
  91 33:             checkuart(\rp, \rv, 0x07437100, 74371)
  92 34:             checkuart(\rp, \rv, 0x74390000, 7439)
  93 35:             checkuart(\rp, \rv, 0x74450000, 7445)
  94
  95                 /* No valid UART found */
  96 90:             mov     \rp, #0
  97                 /* fall through */
  98
  99                 /* Record whichever UART we chose */
 100 91:             str     \rp, [\tmp, #4]         @ Store in brcmstb_uart_phys
 101                 cmp     \rp, #0                 @ Valid UART address?
 102                 bne     92f                     @ Yes, go process it
 103                 str     \rp, [\tmp, #8]         @ Store 0 in brcmstb_uart_virt
 104                 b       100f                    @ Done
 105 92:             and     \rv, \rp, #0xffffff     @ offset within 16MB section
 106                 add     \rv, \rv, #REG_VIRT_BASE
 107                 str     \rv, [\tmp, #8]         @ Store in brcmstb_uart_virt
 108                 b       100f
 109
 110                 .align
 111 99:             .word   .
 112                 .word   brcmstb_uart_config
 113                 .ltorg
 114
 115                 /* Load previously selected UART address */
 116 100:            ldr     \rp, [\tmp, #4]         @ Load brcmstb_uart_phys
 117                 ldr     \rv, [\tmp, #8]         @ Load brcmstb_uart_virt
 118                 .endm
 119
 120                 .macro  store, rd, rx:vararg
 121 ARM_BE8(        rev     \rd, \rd )
 122                 str     \rd, \rx
 123                 .endm
 124
 125                 .macro  load, rd, rx:vararg
 126                 ldr     \rd, \rx
 127 ARM_BE8(        rev     \rd, \rd )
 128                 .endm
 129
 130                 .macro  senduart,rd,rx
 131                 store   \rd, [\rx, #UART_TX << UART_SHIFT]
 132                 .endm
 133
 134                 .macro  busyuart,rd,rx
 135 1002:           load    \rd, [\rx, #UART_LSR << UART_SHIFT]
 136                 and     \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE
 137                 teq     \rd, #UART_LSR_TEMT | UART_LSR_THRE
 138                 bne     1002b
 139                 .endm
 140
 141                 .macro  waituarttxrdy,rd,rx
 142                 .endm
 143
 144                 .macro  waituartcts,rd,rx
 145                 .endm
 146
 147 /*
 148  * Storage for the state maintained by the macros above.
 149  *
 150  * In the kernel proper, this data is located in arch/arm/mach-bcm/brcmstb.c.
 151  * That's because this header is included from multiple files, and we only
 152  * want a single copy of the data. In particular, the UART probing code above
 153  * assumes it's running using physical addresses. This is true when this file
 154  * is included from head.o, but not when included from debug.o. So we need
 155  * to share the probe results between the two copies, rather than having
 156  * to re-run the probing again later.
 157  *
 158  * In the decompressor, we put the symbol/storage right here, since common.c
 159  * isn't included in the decompressor build. This symbol gets put in .text
 160  * even though it's really data, since .data is discarded from the
 161  * decompressor. Luckily, .text is writeable in the decompressor, unless
 162  * CONFIG_ZBOOT_ROM. That dependency is handled in arch/arm/Kconfig.debug.
 163  */
 164 #if defined(ZIMAGE)
 165 brcmstb_uart_config:
 166         /* Debug UART initialization required */
 167         .word 1
 168         /* Debug UART physical address */
 169         .word 0
 170         /* Debug UART virtual address */
 171         .word 0
 172 #endif