1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * arch/arm/include/asm/ptrace.h
5 * Copyright (C) 1996-2003 Russell King
7 #ifndef __ASM_ARM_PTRACE_H
8 #define __ASM_ARM_PTRACE_H
10 #include <uapi/asm/ptrace.h>
13 #include <linux/types.h>
16 unsigned long uregs[18];
24 #define to_svc_pt_regs(r) container_of(r, struct svc_pt_regs, regs)
26 #define user_mode(regs) \
27 (((regs)->ARM_cpsr & 0xf) == 0)
29 #ifdef CONFIG_ARM_THUMB
30 #define thumb_mode(regs) \
31 (((regs)->ARM_cpsr & PSR_T_BIT))
33 #define thumb_mode(regs) (0)
36 #ifndef CONFIG_CPU_V7M
37 #define isa_mode(regs) \
38 ((((regs)->ARM_cpsr & PSR_J_BIT) >> (__ffs(PSR_J_BIT) - 1)) | \
39 (((regs)->ARM_cpsr & PSR_T_BIT) >> (__ffs(PSR_T_BIT))))
41 #define isa_mode(regs) 1 /* Thumb */
44 #define processor_mode(regs) \
45 ((regs)->ARM_cpsr & MODE_MASK)
47 #define interrupts_enabled(regs) \
48 (!((regs)->ARM_cpsr & PSR_I_BIT))
50 #define fast_interrupts_enabled(regs) \
51 (!((regs)->ARM_cpsr & PSR_F_BIT))
53 /* Are the current registers suitable for user mode?
54 * (used to maintain security in signal handlers)
56 static inline int valid_user_regs(struct pt_regs *regs)
58 #ifndef CONFIG_CPU_V7M
59 unsigned long mode = regs->ARM_cpsr & MODE_MASK;
62 * Always clear the F (FIQ) and A (delayed abort) bits
64 regs->ARM_cpsr &= ~(PSR_F_BIT | PSR_A_BIT);
66 if ((regs->ARM_cpsr & PSR_I_BIT) == 0) {
69 if (elf_hwcap & HWCAP_26BIT && mode == USR26_MODE)
74 * Force CPSR to something logical...
76 regs->ARM_cpsr &= PSR_f | PSR_s | PSR_x | PSR_T_BIT | MODE32_BIT;
77 if (!(elf_hwcap & HWCAP_26BIT))
78 regs->ARM_cpsr |= USR_MODE;
81 #else /* ifndef CONFIG_CPU_V7M */
86 static inline long regs_return_value(struct pt_regs *regs)
91 #define instruction_pointer(regs) (regs)->ARM_pc
93 #ifdef CONFIG_THUMB2_KERNEL
94 #define frame_pointer(regs) (regs)->ARM_r7
96 #define frame_pointer(regs) (regs)->ARM_fp
99 static inline void instruction_pointer_set(struct pt_regs *regs,
102 instruction_pointer(regs) = val;
106 extern unsigned long profile_pc(struct pt_regs *regs);
108 #define profile_pc(regs) instruction_pointer(regs)
111 #define predicate(x) ((x) & 0xf0000000)
112 #define PREDICATE_ALWAYS 0xe0000000
115 * True if instr is a 32-bit thumb instruction. This works if instr
116 * is the first or only half-word of a thumb instruction. It also works
117 * when instr holds all 32-bits of a wide thumb instruction if stored
118 * in the form (first_half<<16)|(second_half)
120 #define is_wide_instruction(instr) ((unsigned)(instr) >= 0xe800)
123 * kprobe-based event tracer support
125 #include <linux/compiler.h>
126 #define MAX_REG_OFFSET (offsetof(struct pt_regs, ARM_ORIG_r0))
128 extern int regs_query_register_offset(const char *name);
129 extern const char *regs_query_register_name(unsigned int offset);
130 extern bool regs_within_kernel_stack(struct pt_regs *regs, unsigned long addr);
131 extern unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs,
135 * regs_get_register() - get register value from its offset
136 * @regs: pt_regs from which register value is gotten
137 * @offset: offset number of the register.
139 * regs_get_register returns the value of a register whose offset from @regs.
140 * The @offset is the offset of the register in struct pt_regs.
141 * If @offset is bigger than MAX_REG_OFFSET, this returns 0.
143 static inline unsigned long regs_get_register(struct pt_regs *regs,
146 if (unlikely(offset > MAX_REG_OFFSET))
148 return *(unsigned long *)((unsigned long)regs + offset);
151 /* Valid only for Kernel mode traps. */
152 static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
157 static inline unsigned long user_stack_pointer(struct pt_regs *regs)
162 #define current_pt_regs(void) ({ (struct pt_regs *) \
163 ((current_stack_pointer | (THREAD_SIZE - 1)) - 7) - 1; \
168 * Update ITSTATE after normal execution of an IT block instruction.
170 * The 8 IT state bits are split into two parts in CPSR:
171 * ITSTATE<1:0> are in CPSR<26:25>
172 * ITSTATE<7:2> are in CPSR<15:10>
174 static inline unsigned long it_advance(unsigned long cpsr)
176 if ((cpsr & 0x06000400) == 0) {
177 /* ITSTATE<2:0> == 0 means end of IT block, so clear IT state */
178 cpsr &= ~PSR_IT_MASK;
180 /* We need to shift left ITSTATE<4:0> */
181 const unsigned long mask = 0x06001c00; /* Mask ITSTATE<4:0> */
182 unsigned long it = cpsr & mask;
184 it |= it >> (27 - 10); /* Carry ITSTATE<2> to correct place */
192 #endif /* __ASSEMBLY__ */