1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright 2012 Calxeda, Inc.
5 #ifndef _ASM_ARM_PERCPU_H_
6 #define _ASM_ARM_PERCPU_H_
10 register unsigned long current_stack_pointer asm ("sp");
13 * Same as asm-generic/percpu.h, except that we store the per cpu offset
14 * in the TPIDRPRW. TPIDRPRW only exists on V6K and V7
17 static inline void set_my_cpu_offset(unsigned long off)
19 extern unsigned int smp_on_up;
21 if (IS_ENABLED(CONFIG_CPU_V6) && !smp_on_up)
25 asm volatile("mcr p15, 0, %0, c13, c0, 4" : : "r" (off) : "memory");
28 static __always_inline unsigned long __my_cpu_offset(void)
34 * We want to allow caching the value, so avoid using volatile and
35 * instead use a fake stack read to hazard against barrier().
37 asm("0: mrc p15, 0, %0, c13, c0, 4 \n\t"
41 #if defined(CONFIG_ARM_HAS_GROUP_RELOCS) && \
42 !(defined(MODULE) && defined(CONFIG_ARM_MODULE_PLTS))
43 "2: " LOAD_SYM_ARMV6(%0, __per_cpu_offset) " \n\t"
49 "3: .long __per_cpu_offset \n\t"
52 " .pushsection \".alt.smp.init\", \"a\" \n\t"
54 " b . + (2b - 0b) \n\t"
58 : "Q" (*(const unsigned long *)current_stack_pointer));
62 #define __my_cpu_offset __my_cpu_offset()
64 #define set_my_cpu_offset(x) do {} while(0)
66 #endif /* CONFIG_SMP */
68 #include <asm-generic/percpu.h>
70 #endif /* _ASM_ARM_PERCPU_H_ */