2 * Copyright (C) 2012 - Virtual Open Systems and Columbia University
3 * Author: Christoffer Dall <c.dall@virtualopensystems.com>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License, version 2, as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
19 #ifndef __ARM_KVM_HOST_H__
20 #define __ARM_KVM_HOST_H__
22 #include <linux/types.h>
23 #include <linux/kvm_types.h>
24 #include <asm/cputype.h>
26 #include <asm/kvm_asm.h>
27 #include <asm/kvm_mmio.h>
28 #include <asm/fpstate.h>
29 #include <asm/spectre.h>
30 #include <kvm/arm_arch_timer.h>
32 #define __KVM_HAVE_ARCH_INTC_INITIALIZED
34 #define KVM_USER_MEM_SLOTS 32
35 #define KVM_HAVE_ONE_REG
36 #define KVM_HALT_POLL_NS_DEFAULT 500000
38 #define KVM_VCPU_MAX_FEATURES 2
40 #include <kvm/arm_vgic.h>
43 #ifdef CONFIG_ARM_GIC_V3
44 #define KVM_MAX_VCPUS VGIC_V3_MAX_CPUS
46 #define KVM_MAX_VCPUS VGIC_V2_MAX_CPUS
49 #define KVM_REQ_SLEEP \
50 KVM_ARCH_REQ_FLAGS(0, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
51 #define KVM_REQ_IRQ_PENDING KVM_ARCH_REQ(1)
53 u32 *kvm_vcpu_reg(struct kvm_vcpu *vcpu, u8 reg_num, u32 mode);
54 int __attribute_const__ kvm_target_cpu(void);
55 int kvm_reset_vcpu(struct kvm_vcpu *vcpu);
56 void kvm_reset_coprocs(struct kvm_vcpu *vcpu);
59 /* VTTBR value associated with below pgd and vmid */
62 /* The last vcpu id that ran on each physical CPU */
63 int __percpu *last_vcpu_ran;
66 * Anything that is not used directly from assembly code goes
70 /* The VMID generation used for the virt. memory system */
74 /* Stage-2 page table */
77 /* Interrupt controller */
78 struct vgic_dist vgic;
81 /* Mandated version of PSCI */
85 #define KVM_NR_MEM_OBJS 40
88 * We don't want allocation failures within the mmu code, so we preallocate
89 * enough memory for a single page fault in a cache.
91 struct kvm_mmu_memory_cache {
93 void *objects[KVM_NR_MEM_OBJS];
96 struct kvm_vcpu_fault_info {
97 u32 hsr; /* Hyp Syndrome Register */
98 u32 hxfar; /* Hyp Data/Inst. Fault Address Register */
99 u32 hpfar; /* Hyp IPA Fault Address Register */
103 * 0 is reserved as an invalid value.
104 * Order should be kept in sync with the save/restore code.
108 c0_MPIDR, /* MultiProcessor ID Register */
109 c0_CSSELR, /* Cache Size Selection Register */
110 c1_SCTLR, /* System Control Register */
111 c1_ACTLR, /* Auxiliary Control Register */
112 c1_CPACR, /* Coprocessor Access Control */
113 c2_TTBR0, /* Translation Table Base Register 0 */
114 c2_TTBR0_high, /* TTBR0 top 32 bits */
115 c2_TTBR1, /* Translation Table Base Register 1 */
116 c2_TTBR1_high, /* TTBR1 top 32 bits */
117 c2_TTBCR, /* Translation Table Base Control R. */
118 c3_DACR, /* Domain Access Control Register */
119 c5_DFSR, /* Data Fault Status Register */
120 c5_IFSR, /* Instruction Fault Status Register */
121 c5_ADFSR, /* Auxilary Data Fault Status R */
122 c5_AIFSR, /* Auxilary Instrunction Fault Status R */
123 c6_DFAR, /* Data Fault Address Register */
124 c6_IFAR, /* Instruction Fault Address Register */
125 c7_PAR, /* Physical Address Register */
126 c7_PAR_high, /* PAR top 32 bits */
127 c9_L2CTLR, /* Cortex A15/A7 L2 Control Register */
128 c10_PRRR, /* Primary Region Remap Register */
129 c10_NMRR, /* Normal Memory Remap Register */
130 c12_VBAR, /* Vector Base Address Register */
131 c13_CID, /* Context ID Register */
132 c13_TID_URW, /* Thread ID, User R/W */
133 c13_TID_URO, /* Thread ID, User R/O */
134 c13_TID_PRIV, /* Thread ID, Privileged */
135 c14_CNTKCTL, /* Timer Control Register (PL1) */
136 c10_AMAIR0, /* Auxilary Memory Attribute Indirection Reg0 */
137 c10_AMAIR1, /* Auxilary Memory Attribute Indirection Reg1 */
138 NR_CP15_REGS /* Number of regs (incl. invalid) */
141 struct kvm_cpu_context {
142 struct kvm_regs gp_regs;
143 struct vfp_hard_struct vfp;
144 u32 cp15[NR_CP15_REGS];
147 typedef struct kvm_cpu_context kvm_cpu_context_t;
149 struct kvm_vcpu_arch {
150 struct kvm_cpu_context ctxt;
152 int target; /* Processor target */
153 DECLARE_BITMAP(features, KVM_VCPU_MAX_FEATURES);
155 /* The CPU type we expose to the VM */
158 /* HYP trapping configuration */
161 /* Interrupt related fields */
162 u32 irq_lines; /* IRQ and FIQ levels */
164 /* Exception Information */
165 struct kvm_vcpu_fault_info fault;
167 /* Host FP context */
168 kvm_cpu_context_t *host_cpu_context;
171 struct vgic_cpu vgic_cpu;
172 struct arch_timer_cpu timer_cpu;
175 * Anything that is not used directly from assembly code goes
179 /* vcpu power-off state */
182 /* Don't run the guest (internal implementation need) */
185 /* IO related fields */
186 struct kvm_decode mmio_decode;
188 /* Cache some mmu pages needed inside spinlock regions */
189 struct kvm_mmu_memory_cache mmu_page_cache;
191 /* Detect first run of a vcpu */
196 ulong remote_tlb_flush;
199 struct kvm_vcpu_stat {
200 u64 halt_successful_poll;
201 u64 halt_attempted_poll;
202 u64 halt_poll_invalid;
208 u64 mmio_exit_kernel;
212 #define vcpu_cp15(v,r) (v)->arch.ctxt.cp15[r]
214 int kvm_vcpu_preferred_target(struct kvm_vcpu_init *init);
215 unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu);
216 int kvm_arm_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *indices);
217 int kvm_arm_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg);
218 int kvm_arm_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg);
219 unsigned long kvm_call_hyp(void *hypfn, ...);
220 void force_vm_exit(const cpumask_t *mask);
222 #define KVM_ARCH_WANT_MMU_NOTIFIER
223 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva);
224 int kvm_unmap_hva_range(struct kvm *kvm,
225 unsigned long start, unsigned long end);
226 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
228 unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu);
229 int kvm_arm_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *indices);
230 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end);
231 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
233 struct kvm_vcpu *kvm_arm_get_running_vcpu(void);
234 struct kvm_vcpu __percpu **kvm_get_running_vcpus(void);
235 void kvm_arm_halt_guest(struct kvm *kvm);
236 void kvm_arm_resume_guest(struct kvm *kvm);
238 int kvm_arm_copy_coproc_indices(struct kvm_vcpu *vcpu, u64 __user *uindices);
239 unsigned long kvm_arm_num_coproc_regs(struct kvm_vcpu *vcpu);
240 int kvm_arm_coproc_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *);
241 int kvm_arm_coproc_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *);
243 int handle_exit(struct kvm_vcpu *vcpu, struct kvm_run *run,
244 int exception_index);
246 static inline void __cpu_init_hyp_mode(phys_addr_t pgd_ptr,
247 unsigned long hyp_stack_ptr,
248 unsigned long vector_ptr)
251 * Call initialization code, and switch to the full blown HYP
252 * code. The init code doesn't need to preserve these
253 * registers as r0-r3 are already callee saved according to
255 * Note that we slightly misuse the prototype by casting the
256 * stack pointer to a void *.
258 * The PGDs are always passed as the third argument, in order
259 * to be passed into r2-r3 to the init code (yes, this is
260 * compliant with the PCS!).
263 kvm_call_hyp((void*)hyp_stack_ptr, vector_ptr, pgd_ptr);
266 static inline void __cpu_init_stage2(void)
268 kvm_call_hyp(__init_stage2_translation);
271 static inline int kvm_arch_dev_ioctl_check_extension(struct kvm *kvm, long ext)
276 int kvm_perf_init(void);
277 int kvm_perf_teardown(void);
279 void kvm_mmu_wp_memory_region(struct kvm *kvm, int slot);
281 struct kvm_vcpu *kvm_mpidr_to_vcpu(struct kvm *kvm, unsigned long mpidr);
283 static inline void kvm_arch_hardware_unsetup(void) {}
284 static inline void kvm_arch_sync_events(struct kvm *kvm) {}
285 static inline void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu) {}
286 static inline void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu) {}
287 static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {}
289 static inline void kvm_arm_init_debug(void) {}
290 static inline void kvm_arm_setup_debug(struct kvm_vcpu *vcpu) {}
291 static inline void kvm_arm_clear_debug(struct kvm_vcpu *vcpu) {}
292 static inline void kvm_arm_reset_debug_ptr(struct kvm_vcpu *vcpu) {}
294 int kvm_arm_vcpu_arch_set_attr(struct kvm_vcpu *vcpu,
295 struct kvm_device_attr *attr);
296 int kvm_arm_vcpu_arch_get_attr(struct kvm_vcpu *vcpu,
297 struct kvm_device_attr *attr);
298 int kvm_arm_vcpu_arch_has_attr(struct kvm_vcpu *vcpu,
299 struct kvm_device_attr *attr);
301 static inline bool kvm_arm_harden_branch_predictor(void)
303 switch(read_cpuid_part()) {
304 #ifdef CONFIG_HARDEN_BRANCH_PREDICTOR
305 case ARM_CPU_PART_BRAHMA_B15:
306 case ARM_CPU_PART_CORTEX_A12:
307 case ARM_CPU_PART_CORTEX_A15:
308 case ARM_CPU_PART_CORTEX_A17:
316 #define KVM_SSBD_UNKNOWN -1
317 #define KVM_SSBD_FORCE_DISABLE 0
318 #define KVM_SSBD_KERNEL 1
319 #define KVM_SSBD_FORCE_ENABLE 2
320 #define KVM_SSBD_MITIGATED 3
322 static inline int kvm_arm_have_ssbd(void)
324 /* No way to detect it yet, pretend it is not there. */
325 return KVM_SSBD_UNKNOWN;
328 static inline int kvm_arm_get_spectre_bhb_state(void)
330 /* 32bit guests don't need firmware for this */
331 return SPECTRE_VULNERABLE; /* aka SMCCC_RET_NOT_SUPPORTED */
333 #endif /* __ARM_KVM_HOST_H__ */