2 * Copyright (C) 2012 - Virtual Open Systems and Columbia University
3 * Author: Christoffer Dall <c.dall@virtualopensystems.com>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License, version 2, as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
19 #ifndef __ARM_KVM_HOST_H__
20 #define __ARM_KVM_HOST_H__
22 #include <linux/types.h>
23 #include <linux/kvm_types.h>
24 #include <asm/cputype.h>
26 #include <asm/kvm_asm.h>
27 #include <asm/kvm_mmio.h>
28 #include <asm/fpstate.h>
29 #include <asm/spectre.h>
30 #include <kvm/arm_arch_timer.h>
32 #define __KVM_HAVE_ARCH_INTC_INITIALIZED
34 #define KVM_USER_MEM_SLOTS 32
35 #define KVM_HAVE_ONE_REG
36 #define KVM_HALT_POLL_NS_DEFAULT 500000
38 #define KVM_VCPU_MAX_FEATURES 2
40 #include <kvm/arm_vgic.h>
43 #ifdef CONFIG_ARM_GIC_V3
44 #define KVM_MAX_VCPUS VGIC_V3_MAX_CPUS
46 #define KVM_MAX_VCPUS VGIC_V2_MAX_CPUS
49 #define KVM_REQ_SLEEP \
50 KVM_ARCH_REQ_FLAGS(0, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
51 #define KVM_REQ_IRQ_PENDING KVM_ARCH_REQ(1)
52 #define KVM_REQ_VCPU_RESET KVM_ARCH_REQ(2)
54 DECLARE_STATIC_KEY_FALSE(userspace_irqchip_in_use);
56 u32 *kvm_vcpu_reg(struct kvm_vcpu *vcpu, u8 reg_num, u32 mode);
57 int __attribute_const__ kvm_target_cpu(void);
58 int kvm_reset_vcpu(struct kvm_vcpu *vcpu);
59 void kvm_reset_coprocs(struct kvm_vcpu *vcpu);
62 /* VTTBR value associated with below pgd and vmid */
65 /* The last vcpu id that ran on each physical CPU */
66 int __percpu *last_vcpu_ran;
69 * Anything that is not used directly from assembly code goes
73 /* The VMID generation used for the virt. memory system */
77 /* Stage-2 page table */
80 /* Interrupt controller */
81 struct vgic_dist vgic;
84 /* Mandated version of PSCI */
88 #define KVM_NR_MEM_OBJS 40
91 * We don't want allocation failures within the mmu code, so we preallocate
92 * enough memory for a single page fault in a cache.
94 struct kvm_mmu_memory_cache {
96 void *objects[KVM_NR_MEM_OBJS];
99 struct kvm_vcpu_fault_info {
100 u32 hsr; /* Hyp Syndrome Register */
101 u32 hxfar; /* Hyp Data/Inst. Fault Address Register */
102 u32 hpfar; /* Hyp IPA Fault Address Register */
106 * 0 is reserved as an invalid value.
107 * Order should be kept in sync with the save/restore code.
111 c0_MPIDR, /* MultiProcessor ID Register */
112 c0_CSSELR, /* Cache Size Selection Register */
113 c1_SCTLR, /* System Control Register */
114 c1_ACTLR, /* Auxiliary Control Register */
115 c1_CPACR, /* Coprocessor Access Control */
116 c2_TTBR0, /* Translation Table Base Register 0 */
117 c2_TTBR0_high, /* TTBR0 top 32 bits */
118 c2_TTBR1, /* Translation Table Base Register 1 */
119 c2_TTBR1_high, /* TTBR1 top 32 bits */
120 c2_TTBCR, /* Translation Table Base Control R. */
121 c3_DACR, /* Domain Access Control Register */
122 c5_DFSR, /* Data Fault Status Register */
123 c5_IFSR, /* Instruction Fault Status Register */
124 c5_ADFSR, /* Auxilary Data Fault Status R */
125 c5_AIFSR, /* Auxilary Instrunction Fault Status R */
126 c6_DFAR, /* Data Fault Address Register */
127 c6_IFAR, /* Instruction Fault Address Register */
128 c7_PAR, /* Physical Address Register */
129 c7_PAR_high, /* PAR top 32 bits */
130 c9_L2CTLR, /* Cortex A15/A7 L2 Control Register */
131 c10_PRRR, /* Primary Region Remap Register */
132 c10_NMRR, /* Normal Memory Remap Register */
133 c12_VBAR, /* Vector Base Address Register */
134 c13_CID, /* Context ID Register */
135 c13_TID_URW, /* Thread ID, User R/W */
136 c13_TID_URO, /* Thread ID, User R/O */
137 c13_TID_PRIV, /* Thread ID, Privileged */
138 c14_CNTKCTL, /* Timer Control Register (PL1) */
139 c10_AMAIR0, /* Auxilary Memory Attribute Indirection Reg0 */
140 c10_AMAIR1, /* Auxilary Memory Attribute Indirection Reg1 */
141 NR_CP15_REGS /* Number of regs (incl. invalid) */
144 struct kvm_cpu_context {
145 struct kvm_regs gp_regs;
146 struct vfp_hard_struct vfp;
147 u32 cp15[NR_CP15_REGS];
150 typedef struct kvm_cpu_context kvm_cpu_context_t;
152 struct vcpu_reset_state {
159 struct kvm_vcpu_arch {
160 struct kvm_cpu_context ctxt;
162 int target; /* Processor target */
163 DECLARE_BITMAP(features, KVM_VCPU_MAX_FEATURES);
165 /* The CPU type we expose to the VM */
168 /* HYP trapping configuration */
171 /* Exception Information */
172 struct kvm_vcpu_fault_info fault;
174 /* Host FP context */
175 kvm_cpu_context_t *host_cpu_context;
178 struct vgic_cpu vgic_cpu;
179 struct arch_timer_cpu timer_cpu;
182 * Anything that is not used directly from assembly code goes
186 /* vcpu power-off state */
189 /* Don't run the guest (internal implementation need) */
192 /* IO related fields */
193 struct kvm_decode mmio_decode;
195 /* Cache some mmu pages needed inside spinlock regions */
196 struct kvm_mmu_memory_cache mmu_page_cache;
198 struct vcpu_reset_state reset_state;
200 /* Detect first run of a vcpu */
205 ulong remote_tlb_flush;
208 struct kvm_vcpu_stat {
209 u64 halt_successful_poll;
210 u64 halt_attempted_poll;
211 u64 halt_poll_invalid;
217 u64 mmio_exit_kernel;
221 #define vcpu_cp15(v,r) (v)->arch.ctxt.cp15[r]
223 int kvm_vcpu_preferred_target(struct kvm_vcpu_init *init);
224 unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu);
225 int kvm_arm_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *indices);
226 int kvm_arm_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg);
227 int kvm_arm_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg);
228 unsigned long kvm_call_hyp(void *hypfn, ...);
229 void force_vm_exit(const cpumask_t *mask);
230 int __kvm_arm_vcpu_get_events(struct kvm_vcpu *vcpu,
231 struct kvm_vcpu_events *events);
233 int __kvm_arm_vcpu_set_events(struct kvm_vcpu *vcpu,
234 struct kvm_vcpu_events *events);
236 #define KVM_ARCH_WANT_MMU_NOTIFIER
237 int kvm_unmap_hva_range(struct kvm *kvm,
238 unsigned long start, unsigned long end, bool blockable);
239 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
241 unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu);
242 int kvm_arm_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *indices);
243 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end);
244 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
246 struct kvm_vcpu *kvm_arm_get_running_vcpu(void);
247 struct kvm_vcpu __percpu **kvm_get_running_vcpus(void);
248 void kvm_arm_halt_guest(struct kvm *kvm);
249 void kvm_arm_resume_guest(struct kvm *kvm);
251 int kvm_arm_copy_coproc_indices(struct kvm_vcpu *vcpu, u64 __user *uindices);
252 unsigned long kvm_arm_num_coproc_regs(struct kvm_vcpu *vcpu);
253 int kvm_arm_coproc_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *);
254 int kvm_arm_coproc_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *);
256 int handle_exit(struct kvm_vcpu *vcpu, struct kvm_run *run,
257 int exception_index);
259 static inline void handle_exit_early(struct kvm_vcpu *vcpu, struct kvm_run *run,
260 int exception_index) {}
262 static inline void __cpu_init_hyp_mode(phys_addr_t pgd_ptr,
263 unsigned long hyp_stack_ptr,
264 unsigned long vector_ptr)
267 * Call initialization code, and switch to the full blown HYP
268 * code. The init code doesn't need to preserve these
269 * registers as r0-r3 are already callee saved according to
271 * Note that we slightly misuse the prototype by casting the
272 * stack pointer to a void *.
274 * The PGDs are always passed as the third argument, in order
275 * to be passed into r2-r3 to the init code (yes, this is
276 * compliant with the PCS!).
279 kvm_call_hyp((void*)hyp_stack_ptr, vector_ptr, pgd_ptr);
282 static inline void __cpu_init_stage2(void)
284 kvm_call_hyp(__init_stage2_translation);
287 static inline int kvm_arch_dev_ioctl_check_extension(struct kvm *kvm, long ext)
292 int kvm_perf_init(void);
293 int kvm_perf_teardown(void);
295 void kvm_mmu_wp_memory_region(struct kvm *kvm, int slot);
297 struct kvm_vcpu *kvm_mpidr_to_vcpu(struct kvm *kvm, unsigned long mpidr);
299 static inline bool kvm_arch_check_sve_has_vhe(void) { return true; }
300 static inline void kvm_arch_hardware_unsetup(void) {}
301 static inline void kvm_arch_sync_events(struct kvm *kvm) {}
302 static inline void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu) {}
303 static inline void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu) {}
304 static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {}
306 static inline void kvm_arm_init_debug(void) {}
307 static inline void kvm_arm_vcpu_init_debug(struct kvm_vcpu *vcpu) {}
308 static inline void kvm_arm_setup_debug(struct kvm_vcpu *vcpu) {}
309 static inline void kvm_arm_clear_debug(struct kvm_vcpu *vcpu) {}
310 static inline void kvm_arm_reset_debug_ptr(struct kvm_vcpu *vcpu) {}
311 static inline bool kvm_arm_handle_step_debug(struct kvm_vcpu *vcpu,
317 int kvm_arm_vcpu_arch_set_attr(struct kvm_vcpu *vcpu,
318 struct kvm_device_attr *attr);
319 int kvm_arm_vcpu_arch_get_attr(struct kvm_vcpu *vcpu,
320 struct kvm_device_attr *attr);
321 int kvm_arm_vcpu_arch_has_attr(struct kvm_vcpu *vcpu,
322 struct kvm_device_attr *attr);
325 * VFP/NEON switching is all done by the hyp switch code, so no need to
326 * coordinate with host context handling for this state:
328 static inline void kvm_arch_vcpu_load_fp(struct kvm_vcpu *vcpu) {}
329 static inline void kvm_arch_vcpu_ctxsync_fp(struct kvm_vcpu *vcpu) {}
330 static inline void kvm_arch_vcpu_put_fp(struct kvm_vcpu *vcpu) {}
332 static inline void kvm_arm_vhe_guest_enter(void) {}
333 static inline void kvm_arm_vhe_guest_exit(void) {}
335 static inline bool kvm_arm_harden_branch_predictor(void)
337 switch(read_cpuid_part()) {
338 #ifdef CONFIG_HARDEN_BRANCH_PREDICTOR
339 case ARM_CPU_PART_BRAHMA_B15:
340 case ARM_CPU_PART_CORTEX_A12:
341 case ARM_CPU_PART_CORTEX_A15:
342 case ARM_CPU_PART_CORTEX_A17:
350 #define KVM_SSBD_UNKNOWN -1
351 #define KVM_SSBD_FORCE_DISABLE 0
352 #define KVM_SSBD_KERNEL 1
353 #define KVM_SSBD_FORCE_ENABLE 2
354 #define KVM_SSBD_MITIGATED 3
356 static inline int kvm_arm_have_ssbd(void)
358 /* No way to detect it yet, pretend it is not there. */
359 return KVM_SSBD_UNKNOWN;
362 static inline void kvm_vcpu_load_sysregs(struct kvm_vcpu *vcpu) {}
363 static inline void kvm_vcpu_put_sysregs(struct kvm_vcpu *vcpu) {}
365 #define __KVM_HAVE_ARCH_VM_ALLOC
366 struct kvm *kvm_arch_alloc_vm(void);
367 void kvm_arch_free_vm(struct kvm *kvm);
369 #define kvm_arm_vcpu_loaded(vcpu) (false)
371 static inline int kvm_arm_get_spectre_bhb_state(void)
373 /* 32bit guests don't need firmware for this */
374 return SPECTRE_VULNERABLE; /* aka SMCCC_RET_NOT_SUPPORTED */
377 #endif /* __ARM_KVM_HOST_H__ */