2 * Copyright (C) 2012 - Virtual Open Systems and Columbia University
3 * Author: Christoffer Dall <c.dall@virtualopensystems.com>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License, version 2, as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
19 #ifndef __ARM_KVM_HOST_H__
20 #define __ARM_KVM_HOST_H__
22 #include <linux/types.h>
23 #include <linux/kvm_types.h>
24 #include <asm/cputype.h>
26 #include <asm/kvm_asm.h>
27 #include <asm/kvm_mmio.h>
28 #include <asm/fpstate.h>
29 #include <kvm/arm_arch_timer.h>
31 #define __KVM_HAVE_ARCH_INTC_INITIALIZED
33 #define KVM_USER_MEM_SLOTS 32
34 #define KVM_PRIVATE_MEM_SLOTS 4
35 #define KVM_COALESCED_MMIO_PAGE_OFFSET 1
36 #define KVM_HAVE_ONE_REG
37 #define KVM_HALT_POLL_NS_DEFAULT 500000
39 #define KVM_VCPU_MAX_FEATURES 2
41 #include <kvm/arm_vgic.h>
44 #ifdef CONFIG_ARM_GIC_V3
45 #define KVM_MAX_VCPUS VGIC_V3_MAX_CPUS
47 #define KVM_MAX_VCPUS VGIC_V2_MAX_CPUS
50 #define KVM_REQ_VCPU_EXIT 8
52 u32 *kvm_vcpu_reg(struct kvm_vcpu *vcpu, u8 reg_num, u32 mode);
53 int __attribute_const__ kvm_target_cpu(void);
54 int kvm_reset_vcpu(struct kvm_vcpu *vcpu);
55 void kvm_reset_coprocs(struct kvm_vcpu *vcpu);
58 /* VTTBR value associated with below pgd and vmid */
61 /* The last vcpu id that ran on each physical CPU */
62 int __percpu *last_vcpu_ran;
65 struct arch_timer_kvm timer;
68 * Anything that is not used directly from assembly code goes
72 /* The VMID generation used for the virt. memory system */
76 /* Stage-2 page table */
79 /* Interrupt controller */
80 struct vgic_dist vgic;
83 /* Mandated version of PSCI */
87 #define KVM_NR_MEM_OBJS 40
90 * We don't want allocation failures within the mmu code, so we preallocate
91 * enough memory for a single page fault in a cache.
93 struct kvm_mmu_memory_cache {
95 void *objects[KVM_NR_MEM_OBJS];
98 struct kvm_vcpu_fault_info {
99 u32 hsr; /* Hyp Syndrome Register */
100 u32 hxfar; /* Hyp Data/Inst. Fault Address Register */
101 u32 hpfar; /* Hyp IPA Fault Address Register */
105 * 0 is reserved as an invalid value.
106 * Order should be kept in sync with the save/restore code.
110 c0_MPIDR, /* MultiProcessor ID Register */
111 c0_CSSELR, /* Cache Size Selection Register */
112 c1_SCTLR, /* System Control Register */
113 c1_ACTLR, /* Auxiliary Control Register */
114 c1_CPACR, /* Coprocessor Access Control */
115 c2_TTBR0, /* Translation Table Base Register 0 */
116 c2_TTBR0_high, /* TTBR0 top 32 bits */
117 c2_TTBR1, /* Translation Table Base Register 1 */
118 c2_TTBR1_high, /* TTBR1 top 32 bits */
119 c2_TTBCR, /* Translation Table Base Control R. */
120 c3_DACR, /* Domain Access Control Register */
121 c5_DFSR, /* Data Fault Status Register */
122 c5_IFSR, /* Instruction Fault Status Register */
123 c5_ADFSR, /* Auxilary Data Fault Status R */
124 c5_AIFSR, /* Auxilary Instrunction Fault Status R */
125 c6_DFAR, /* Data Fault Address Register */
126 c6_IFAR, /* Instruction Fault Address Register */
127 c7_PAR, /* Physical Address Register */
128 c7_PAR_high, /* PAR top 32 bits */
129 c9_L2CTLR, /* Cortex A15/A7 L2 Control Register */
130 c10_PRRR, /* Primary Region Remap Register */
131 c10_NMRR, /* Normal Memory Remap Register */
132 c12_VBAR, /* Vector Base Address Register */
133 c13_CID, /* Context ID Register */
134 c13_TID_URW, /* Thread ID, User R/W */
135 c13_TID_URO, /* Thread ID, User R/O */
136 c13_TID_PRIV, /* Thread ID, Privileged */
137 c14_CNTKCTL, /* Timer Control Register (PL1) */
138 c10_AMAIR0, /* Auxilary Memory Attribute Indirection Reg0 */
139 c10_AMAIR1, /* Auxilary Memory Attribute Indirection Reg1 */
140 NR_CP15_REGS /* Number of regs (incl. invalid) */
143 struct kvm_cpu_context {
144 struct kvm_regs gp_regs;
145 struct vfp_hard_struct vfp;
146 u32 cp15[NR_CP15_REGS];
149 typedef struct kvm_cpu_context kvm_cpu_context_t;
151 struct kvm_vcpu_arch {
152 struct kvm_cpu_context ctxt;
154 int target; /* Processor target */
155 DECLARE_BITMAP(features, KVM_VCPU_MAX_FEATURES);
157 /* The CPU type we expose to the VM */
160 /* HYP trapping configuration */
163 /* Interrupt related fields */
164 u32 irq_lines; /* IRQ and FIQ levels */
166 /* Exception Information */
167 struct kvm_vcpu_fault_info fault;
169 /* Host FP context */
170 kvm_cpu_context_t *host_cpu_context;
173 struct vgic_cpu vgic_cpu;
174 struct arch_timer_cpu timer_cpu;
177 * Anything that is not used directly from assembly code goes
181 /* vcpu power-off state */
184 /* Don't run the guest (internal implementation need) */
187 /* IO related fields */
188 struct kvm_decode mmio_decode;
190 /* Cache some mmu pages needed inside spinlock regions */
191 struct kvm_mmu_memory_cache mmu_page_cache;
193 /* Detect first run of a vcpu */
198 ulong remote_tlb_flush;
201 struct kvm_vcpu_stat {
202 u64 halt_successful_poll;
203 u64 halt_attempted_poll;
204 u64 halt_poll_invalid;
210 u64 mmio_exit_kernel;
214 #define vcpu_cp15(v,r) (v)->arch.ctxt.cp15[r]
216 int kvm_vcpu_preferred_target(struct kvm_vcpu_init *init);
217 unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu);
218 int kvm_arm_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *indices);
219 int kvm_arm_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg);
220 int kvm_arm_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg);
221 unsigned long kvm_call_hyp(void *hypfn, ...);
222 void force_vm_exit(const cpumask_t *mask);
224 #define KVM_ARCH_WANT_MMU_NOTIFIER
225 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva);
226 int kvm_unmap_hva_range(struct kvm *kvm,
227 unsigned long start, unsigned long end);
228 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
230 unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu);
231 int kvm_arm_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *indices);
232 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end);
233 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
235 /* We do not have shadow page tables, hence the empty hooks */
236 static inline void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
237 unsigned long address)
241 struct kvm_vcpu *kvm_arm_get_running_vcpu(void);
242 struct kvm_vcpu __percpu **kvm_get_running_vcpus(void);
243 void kvm_arm_halt_guest(struct kvm *kvm);
244 void kvm_arm_resume_guest(struct kvm *kvm);
245 void kvm_arm_halt_vcpu(struct kvm_vcpu *vcpu);
246 void kvm_arm_resume_vcpu(struct kvm_vcpu *vcpu);
248 int kvm_arm_copy_coproc_indices(struct kvm_vcpu *vcpu, u64 __user *uindices);
249 unsigned long kvm_arm_num_coproc_regs(struct kvm_vcpu *vcpu);
250 int kvm_arm_coproc_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *);
251 int kvm_arm_coproc_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *);
253 int handle_exit(struct kvm_vcpu *vcpu, struct kvm_run *run,
254 int exception_index);
256 static inline void __cpu_init_hyp_mode(phys_addr_t pgd_ptr,
257 unsigned long hyp_stack_ptr,
258 unsigned long vector_ptr)
261 * Call initialization code, and switch to the full blown HYP
262 * code. The init code doesn't need to preserve these
263 * registers as r0-r3 are already callee saved according to
265 * Note that we slightly misuse the prototype by casting the
266 * stack pointer to a void *.
268 * The PGDs are always passed as the third argument, in order
269 * to be passed into r2-r3 to the init code (yes, this is
270 * compliant with the PCS!).
273 kvm_call_hyp((void*)hyp_stack_ptr, vector_ptr, pgd_ptr);
276 static inline void __cpu_init_stage2(void)
278 kvm_call_hyp(__init_stage2_translation);
281 static inline void __cpu_reset_hyp_mode(unsigned long vector_ptr,
282 phys_addr_t phys_idmap_start)
284 kvm_call_hyp((void *)virt_to_idmap(__kvm_hyp_reset), vector_ptr);
287 static inline int kvm_arch_dev_ioctl_check_extension(struct kvm *kvm, long ext)
292 int kvm_perf_init(void);
293 int kvm_perf_teardown(void);
295 void kvm_mmu_wp_memory_region(struct kvm *kvm, int slot);
297 struct kvm_vcpu *kvm_mpidr_to_vcpu(struct kvm *kvm, unsigned long mpidr);
299 static inline void kvm_arch_hardware_unsetup(void) {}
300 static inline void kvm_arch_sync_events(struct kvm *kvm) {}
301 static inline void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu) {}
302 static inline void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu) {}
303 static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {}
305 static inline void kvm_arm_init_debug(void) {}
306 static inline void kvm_arm_setup_debug(struct kvm_vcpu *vcpu) {}
307 static inline void kvm_arm_clear_debug(struct kvm_vcpu *vcpu) {}
308 static inline void kvm_arm_reset_debug_ptr(struct kvm_vcpu *vcpu) {}
309 static inline int kvm_arm_vcpu_arch_set_attr(struct kvm_vcpu *vcpu,
310 struct kvm_device_attr *attr)
314 static inline int kvm_arm_vcpu_arch_get_attr(struct kvm_vcpu *vcpu,
315 struct kvm_device_attr *attr)
319 static inline int kvm_arm_vcpu_arch_has_attr(struct kvm_vcpu *vcpu,
320 struct kvm_device_attr *attr)
325 static inline bool kvm_arm_harden_branch_predictor(void)
327 switch(read_cpuid_part()) {
328 #ifdef CONFIG_HARDEN_BRANCH_PREDICTOR
329 case ARM_CPU_PART_BRAHMA_B15:
330 case ARM_CPU_PART_CORTEX_A12:
331 case ARM_CPU_PART_CORTEX_A15:
332 case ARM_CPU_PART_CORTEX_A17:
340 #define KVM_SSBD_UNKNOWN -1
341 #define KVM_SSBD_FORCE_DISABLE 0
342 #define KVM_SSBD_KERNEL 1
343 #define KVM_SSBD_FORCE_ENABLE 2
344 #define KVM_SSBD_MITIGATED 3
346 static inline int kvm_arm_have_ssbd(void)
348 /* No way to detect it yet, pretend it is not there. */
349 return KVM_SSBD_UNKNOWN;
352 #endif /* __ARM_KVM_HOST_H__ */