GNU Linux-libre 4.19.264-gnu1
[releases.git] / arch / arm / boot / dts / wm8505.dtsi
1 /*
2  * wm8505.dtsi - Device tree file for Wondermedia WM8505 SoC
3  *
4  * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
5  *
6  * Licensed under GPLv2 or later
7  */
8
9 /include/ "skeleton.dtsi"
10
11 / {
12         compatible = "wm,wm8505";
13
14         cpus {
15                 #address-cells = <0>;
16                 #size-cells = <0>;
17
18                 cpu {
19                         device_type = "cpu";
20                         compatible = "arm,arm926ej-s";
21                 };
22         };
23
24         aliases {
25                 serial0 = &uart0;
26                 serial1 = &uart1;
27                 serial2 = &uart2;
28                 serial3 = &uart3;
29                 serial4 = &uart4;
30                 serial5 = &uart5;
31         };
32
33         soc {
34                 #address-cells = <1>;
35                 #size-cells = <1>;
36                 compatible = "simple-bus";
37                 ranges;
38                 interrupt-parent = <&intc0>;
39
40                 intc0: interrupt-controller@d8140000 {
41                         compatible = "via,vt8500-intc";
42                         interrupt-controller;
43                         reg = <0xd8140000 0x10000>;
44                         #interrupt-cells = <1>;
45                 };
46
47                 /* Secondary IC cascaded to intc0 */
48                 intc1: interrupt-controller@d8150000 {
49                         compatible = "via,vt8500-intc";
50                         interrupt-controller;
51                         #interrupt-cells = <1>;
52                         reg = <0xD8150000 0x10000>;
53                         interrupts = <56 57 58 59 60 61 62 63>;
54                 };
55
56                 pinctrl: pinctrl@d8110000 {
57                         compatible = "wm,wm8505-pinctrl";
58                         reg = <0xd8110000 0x10000>;
59                         interrupt-controller;
60                         #interrupt-cells = <2>;
61                         gpio-controller;
62                         #gpio-cells = <2>;
63                 };
64
65                 pmc@d8130000 {
66                         compatible = "via,vt8500-pmc";
67                         reg = <0xd8130000 0x1000>;
68                         clocks {
69                                 #address-cells = <1>;
70                                 #size-cells = <0>;
71
72                                 ref24: ref24M {
73                                         #clock-cells = <0>;
74                                         compatible = "fixed-clock";
75                                         clock-frequency = <24000000>;
76                                 };
77
78                                 ref25: ref25M {
79                                         #clock-cells = <0>;
80                                         compatible = "fixed-clock";
81                                         clock-frequency = <25000000>;
82                                 };
83
84                                 plla: plla {
85                                         #clock-cells = <0>;
86                                         compatible = "via,vt8500-pll-clock";
87                                         clocks = <&ref25>;
88                                         reg = <0x200>;
89                                 };
90
91                                 pllb: pllb {
92                                         #clock-cells = <0>;
93                                         compatible = "via,vt8500-pll-clock";
94                                         clocks = <&ref25>;
95                                         reg = <0x204>;
96                                 };
97
98                                 pllc: pllc {
99                                         #clock-cells = <0>;
100                                         compatible = "via,vt8500-pll-clock";
101                                         clocks = <&ref25>;
102                                         reg = <0x208>;
103                                 };
104
105                                 plld: plld {
106                                         #clock-cells = <0>;
107                                         compatible = "via,vt8500-pll-clock";
108                                         clocks = <&ref25>;
109                                         reg = <0x20c>;
110                                 };
111
112                                 clkarm: arm {
113                                         #clock-cells = <0>;
114                                         compatible = "via,vt8500-device-clock";
115                                         clocks = <&plla>;
116                                         divisor-reg = <0x300>;
117                                 };
118
119                                 clkahb: ahb {
120                                         #clock-cells = <0>;
121                                         compatible = "via,vt8500-device-clock";
122                                         clocks = <&pllb>;
123                                         divisor-reg = <0x304>;
124                                 };
125
126                                 clkapb: apb {
127                                         #clock-cells = <0>;
128                                         compatible = "via,vt8500-device-clock";
129                                         clocks = <&pllb>;
130                                         divisor-reg = <0x350>;
131                                 };
132
133                                 clkddr: ddr {
134                                         #clock-cells = <0>;
135                                         compatible = "via,vt8500-device-clock";
136                                         clocks = <&plld>;
137                                         divisor-reg = <0x310>;
138                                 };
139
140                                 clkuart0: uart0 {
141                                         #clock-cells = <0>;
142                                         compatible = "via,vt8500-device-clock";
143                                         clocks = <&ref24>;
144                                         enable-reg = <0x250>;
145                                         enable-bit = <1>;
146                                 };
147
148                                 clkuart1: uart1 {
149                                         #clock-cells = <0>;
150                                         compatible = "via,vt8500-device-clock";
151                                         clocks = <&ref24>;
152                                         enable-reg = <0x250>;
153                                         enable-bit = <2>;
154                                 };
155
156                                 clkuart2: uart2 {
157                                         #clock-cells = <0>;
158                                         compatible = "via,vt8500-device-clock";
159                                         clocks = <&ref24>;
160                                         enable-reg = <0x250>;
161                                         enable-bit = <3>;
162                                 };
163
164                                 clkuart3: uart3 {
165                                         #clock-cells = <0>;
166                                         compatible = "via,vt8500-device-clock";
167                                         clocks = <&ref24>;
168                                         enable-reg = <0x250>;
169                                         enable-bit = <4>;
170                                 };
171
172                                 clkuart4: uart4 {
173                                         #clock-cells = <0>;
174                                         compatible = "via,vt8500-device-clock";
175                                         clocks = <&ref24>;
176                                         enable-reg = <0x250>;
177                                         enable-bit = <22>;
178                                 };
179
180                                 clkuart5: uart5 {
181                                         #clock-cells = <0>;
182                                         compatible = "via,vt8500-device-clock";
183                                         clocks = <&ref24>;
184                                         enable-reg = <0x250>;
185                                         enable-bit = <23>;
186                                 };
187
188                                 clksdhc: sdhc {
189                                         #clock-cells = <0>;
190                                         compatible = "via,vt8500-device-clock";
191                                         clocks = <&pllb>;
192                                         divisor-reg = <0x328>;
193                                         divisor-mask = <0x3f>;
194                                         enable-reg = <0x254>;
195                                         enable-bit = <18>;
196                                 };
197                         };
198                 };
199
200                 timer@d8130100 {
201                         compatible = "via,vt8500-timer";
202                         reg = <0xd8130100 0x28>;
203                         interrupts = <36>;
204                 };
205
206                 ehci@d8007100 {
207                         compatible = "via,vt8500-ehci";
208                         reg = <0xd8007100 0x200>;
209                         interrupts = <1>;
210                 };
211
212                 uhci@d8007300 {
213                         compatible = "platform-uhci";
214                         reg = <0xd8007300 0x200>;
215                         interrupts = <0>;
216                 };
217
218                 fb: fb@d8050800 {
219                         compatible = "wm,wm8505-fb";
220                         reg = <0xd8050800 0x200>;
221                 };
222
223                 ge_rops@d8050400 {
224                         compatible = "wm,prizm-ge-rops";
225                         reg = <0xd8050400 0x100>;
226                 };
227
228                 uart0: serial@d8200000 {
229                         compatible = "via,vt8500-uart";
230                         reg = <0xd8200000 0x1040>;
231                         interrupts = <32>;
232                         clocks = <&clkuart0>;
233                         status = "disabled";
234                 };
235
236                 uart1: serial@d82b0000 {
237                         compatible = "via,vt8500-uart";
238                         reg = <0xd82b0000 0x1040>;
239                         interrupts = <33>;
240                         clocks = <&clkuart1>;
241                         status = "disabled";
242                 };
243
244                 uart2: serial@d8210000 {
245                         compatible = "via,vt8500-uart";
246                         reg = <0xd8210000 0x1040>;
247                         interrupts = <47>;
248                         clocks = <&clkuart2>;
249                         status = "disabled";
250                 };
251
252                 uart3: serial@d82c0000 {
253                         compatible = "via,vt8500-uart";
254                         reg = <0xd82c0000 0x1040>;
255                         interrupts = <50>;
256                         clocks = <&clkuart3>;
257                         status = "disabled";
258                 };
259
260                 uart4: serial@d8370000 {
261                         compatible = "via,vt8500-uart";
262                         reg = <0xd8370000 0x1040>;
263                         interrupts = <31>;
264                         clocks = <&clkuart4>;
265                         status = "disabled";
266                 };
267
268                 uart5: serial@d8380000 {
269                         compatible = "via,vt8500-uart";
270                         reg = <0xd8380000 0x1040>;
271                         interrupts = <30>;
272                         clocks = <&clkuart5>;
273                         status = "disabled";
274                 };
275
276                 rtc@d8100000 {
277                         compatible = "via,vt8500-rtc";
278                         reg = <0xd8100000 0x10000>;
279                         interrupts = <48>;
280                 };
281
282                 sdhc@d800a000 {
283                         compatible = "wm,wm8505-sdhc";
284                         reg = <0xd800a000 0x400>;
285                         interrupts = <20>, <21>;
286                         clocks = <&clksdhc>;
287                         bus-width = <4>;
288                 };
289         };
290 };