2 * Copyright (C) 2015, 2016 Zodiac Inflight Innovations
4 * Based on an original 'vf610-twr.dts' which is Copyright 2015,
5 * Freescale Semiconductor, Inc.
7 * This file is dual-licensed: you can use it either under the terms
8 * of the GPL or the X11 license, at your option. Note that this dual
9 * licensing only applies to this file, and not this project as a
12 * a) This file is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * version 2 as published by the Free Software Foundation.
16 * This file is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
23 * b) Permission is hereby granted, free of charge, to any person
24 * obtaining a copy of this software and associated documentation
25 * files (the "Software"), to deal in the Software without
26 * restriction, including without limitation the rights to use,
27 * copy, modify, merge, publish, distribute, sublicense, and/or
28 * sell copies of the Software, and to permit persons to whom the
29 * Software is furnished to do so, subject to the following
32 * The above copyright notice and this permission notice shall be
33 * included in all copies or substantial portions of the Software.
35 * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND,
36 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
37 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
38 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
39 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
40 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
41 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
42 * OTHER DEALINGS IN THE SOFTWARE.
46 #include "vf610-zii-dev.dtsi"
49 model = "ZII VF610 Development Board, Rev C";
50 compatible = "zii,vf610dev-c", "zii,vf610dev", "fsl,vf610";
53 compatible = "mdio-mux-gpio";
54 pinctrl-0 = <&pinctrl_mdio_mux>;
55 pinctrl-names = "default";
56 gpios = <&gpio0 8 GPIO_ACTIVE_HIGH
57 &gpio0 9 GPIO_ACTIVE_HIGH
58 &gpio0 25 GPIO_ACTIVE_HIGH>;
59 mdio-parent-bus = <&mdio1>;
69 compatible = "marvell,mv88e6190";
70 pinctrl-0 = <&pinctrl_gpio_switch0>;
71 pinctrl-names = "default";
74 eeprom-length = <65536>;
75 interrupt-parent = <&gpio0>;
76 interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
78 #interrupt-cells = <2>;
98 phy-handle = <&switch0phy1>;
104 phy-handle = <&switch0phy2>;
110 phy-handle = <&switch0phy3>;
116 phy-handle = <&switch0phy4>;
119 switch0port10: port@10 {
123 link = <&switch1port10>;
128 #address-cells = <1>;
131 switch0phy1: switch0phy@1 {
133 interrupt-parent = <&switch0>;
134 interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
137 switch0phy2: switch0phy@2 {
139 interrupt-parent = <&switch0>;
140 interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
143 switch0phy3: switch0phy@3 {
145 interrupt-parent = <&switch0>;
146 interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
149 switch0phy4: switch0phy@4 {
151 interrupt-parent = <&switch0>;
152 interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
160 #address-cells = <1>;
164 compatible = "marvell,mv88e6190";
165 pinctrl-0 = <&pinctrl_gpio_switch1>;
166 pinctrl-names = "default";
169 eeprom-length = <65536>;
170 interrupt-parent = <&gpio0>;
171 interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
172 interrupt-controller;
173 #interrupt-cells = <2>;
176 #address-cells = <1>;
182 phy-handle = <&switch1phy1>;
188 phy-handle = <&switch1phy2>;
194 phy-handle = <&switch1phy3>;
200 phy-handle = <&switch1phy4>;
204 switch1port10: port@10 {
208 link = <&switch0port10>;
212 #address-cells = <1>;
215 switch1phy1: switch1phy@1 {
217 interrupt-parent = <&switch1>;
218 interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
221 switch1phy2: switch1phy@2 {
223 interrupt-parent = <&switch1>;
224 interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
227 switch1phy3: switch1phy@3 {
229 interrupt-parent = <&switch1>;
230 interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
233 switch1phy4: switch1phy@4 {
235 interrupt-parent = <&switch1>;
236 interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
244 #address-cells = <1>;
252 pinctrl-names = "default";
253 pinctrl-0 = <&pinctrl_dspi0>;
255 spi-num-chipselects = <2>;
258 compatible = "m25p128", "jedec,spi-nor";
259 #address-cells = <1>;
262 spi-max-frequency = <1000000>;
266 compatible = "atmel,at86rf233";
268 pinctrl-names = "default";
269 pinctrl-0 = <&pinctr_atzb_rf_233>;
271 spi-max-frequency = <7500000>;
273 interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
274 interrupt-parent = <&gpio3>;
275 xtal-trim = /bits/ 8 <0x06>;
277 sleep-gpio = <&gpio0 24 GPIO_ACTIVE_HIGH>;
278 reset-gpio = <&gpio6 10 GPIO_ACTIVE_HIGH>;
280 fsl,spi-cs-sck-delay = <180>;
281 fsl,spi-sck-cs-delay = <250>;
294 compatible = "nxp,pca9557";
307 * I/O3 - DD1_IO_RESET
313 * I/O10 - WIFI_RESETn
317 * I/O14 - OPT1_TX_DIS
318 * I/O15 - OPT2_TX_DIS
321 compatible = "semtech,sx1503q";
323 pinctrl-names = "default";
324 pinctrl-0 = <&pinctrl_sx1503_20>;
326 #interrupt-cells = <2>;
328 interrupt-parent = <&gpio0>;
329 interrupts = <23 IRQ_TYPE_EDGE_FALLING>;
331 interrupt-controller;
335 gpios = <0 GPIO_ACTIVE_HIGH>;
337 line-name = "enet-swr-en";
349 compatible = "nxp,pca9554";
359 compatible = "atmel,24c02";
367 compatible = "nxp,pca9548";
368 pinctrl-0 = <&pinctrl_i2c_mux_reset>;
369 pinctrl-names = "default";
370 #address-cells = <1>;
373 reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
376 #address-cells = <1>;
382 #address-cells = <1>;
387 compatible = "atmel,24c02";
393 #address-cells = <1>;
398 compatible = "atmel,24c02";
404 #address-cells = <1>;
412 pinctrl-names = "default";
413 pinctrl-0 = <&pinctrl_uart3>;
420 gpios = <23 GPIO_ACTIVE_HIGH>;
422 line-name = "sx1503-irq";
429 gpios = <2 GPIO_ACTIVE_HIGH>;
431 line-name = "eth0-intrp";
437 #address-cells = <1>;
442 compatible = "ethernet-phy-ieee802.3-c22";
444 pinctrl-names = "default";
445 pinctrl-0 = <&pinctrl_fec0_phy_int>;
447 interrupt-parent = <&gpio3>;
448 interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
455 pinctr_atzb_rf_233: pinctrl-atzb-rf-233 {
457 VF610_PAD_PTB2__GPIO_24 0x31c2
458 VF610_PAD_PTE27__GPIO_132 0x33e2
463 pinctrl_sx1503_20: pinctrl-sx1503-20 {
465 VF610_PAD_PTB1__GPIO_23 0x219d
469 pinctrl_uart3: uart3grp {
471 VF610_PAD_PTA20__UART3_TX 0x21a2
472 VF610_PAD_PTA21__UART3_RX 0x21a1
476 pinctrl_mdio_mux: pinctrl-mdio-mux {
478 VF610_PAD_PTA18__GPIO_8 0x31c2
479 VF610_PAD_PTA19__GPIO_9 0x31c2
480 VF610_PAD_PTB3__GPIO_25 0x31c2
484 pinctrl_fec0_phy_int: pinctrl-fec0-phy-int {
486 VF610_PAD_PTB28__GPIO_98 0x219d