1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 * Copyright (C) 2018 Zodiac Inflight Innovations
11 model = "ZII VF610 CFU1 Board";
12 compatible = "zii,vf610cfu1", "zii,vf610dev", "fsl,vf610";
19 reg = <0x80000000 0x20000000>;
23 compatible = "gpio-leds";
24 pinctrl-0 = <&pinctrl_leds_debug>;
25 pinctrl-names = "default";
28 label = "zii:green:debug1";
29 gpios = <&gpio2 18 GPIO_ACTIVE_HIGH>;
30 linux,default-trigger = "heartbeat";
35 label = "zii:red:fail";
36 gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
37 default-state = "off";
42 label = "zii:green:status";
43 gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
44 default-state = "off";
49 label = "zii:green:debug_a";
50 gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
51 default-state = "off";
56 label = "zii:green:debug_b";
57 gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
58 default-state = "off";
63 reg_vcc_3v3_mcu: regulator-vcc-3v3-mcu {
64 compatible = "regulator-fixed";
65 regulator-name = "vcc_3v3_mcu";
66 regulator-min-microvolt = <3300000>;
67 regulator-max-microvolt = <3300000>;
72 vref-supply = <®_vcc_3v3_mcu>;
77 vref-supply = <®_vcc_3v3_mcu>;
83 pinctrl-names = "default";
84 pinctrl-0 = <&pinctrl_dspi1>;
90 compatible = "m25p128", "jedec,spi-nor";
92 spi-max-frequency = <50000000>;
96 reg = <0x0 0x01000000>;
110 pinctrl-names = "default";
111 pinctrl-0 = <&pinctrl_esdhc0>;
115 keep-power-in-suspend;
120 pinctrl-names = "default";
121 pinctrl-0 = <&pinctrl_esdhc1>;
128 pinctrl-names = "default";
129 pinctrl-0 = <&pinctrl_fec1>;
138 #address-cells = <1>;
143 compatible = "marvell,mv88e6085";
144 pinctrl-names = "default";
145 pinctrl-0 = <&pinctrl_switch>;
147 eeprom-length = <512>;
148 interrupt-parent = <&gpio3>;
149 interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
150 interrupt-controller;
151 #interrupt-cells = <2>;
152 reset-gpios = <&gpio3 11 GPIO_ACTIVE_LOW>;
155 #address-cells = <1>;
160 label = "eth_cu_1000_1";
165 label = "eth_cu_1000_2";
170 label = "eth_cu_1000_3";
189 clock-frequency = <100000>;
190 pinctrl-names = "default";
191 pinctrl-0 = <&pinctrl_i2c0>;
195 compatible = "nxp,pca9554";
201 compatible = "national,lm75";
206 compatible = "atmel,24c04";
212 compatible = "atmel,24c04";
219 pinctrl-names = "default";
220 pinctrl-0 = <&pinctrl_uart0>;
225 pinctrl_dspi1: dspi1grp {
227 VF610_PAD_PTD5__DSPI1_CS0 0x1182
228 VF610_PAD_PTC6__DSPI1_SIN 0x1181
229 VF610_PAD_PTC7__DSPI1_SOUT 0x1182
230 VF610_PAD_PTC8__DSPI1_SCK 0x1182
234 pinctrl_esdhc0: esdhc0grp {
236 VF610_PAD_PTC0__ESDHC0_CLK 0x31ef
237 VF610_PAD_PTC1__ESDHC0_CMD 0x31ef
238 VF610_PAD_PTC2__ESDHC0_DAT0 0x31ef
239 VF610_PAD_PTC3__ESDHC0_DAT1 0x31ef
240 VF610_PAD_PTC4__ESDHC0_DAT2 0x31ef
241 VF610_PAD_PTC5__ESDHC0_DAT3 0x31ef
242 VF610_PAD_PTD23__ESDHC0_DAT4 0x31ef
243 VF610_PAD_PTD22__ESDHC0_DAT5 0x31ef
244 VF610_PAD_PTD21__ESDHC0_DAT6 0x31ef
245 VF610_PAD_PTD20__ESDHC0_DAT7 0x31ef
249 pinctrl_esdhc1: esdhc1grp {
251 VF610_PAD_PTA24__ESDHC1_CLK 0x31ef
252 VF610_PAD_PTA25__ESDHC1_CMD 0x31ef
253 VF610_PAD_PTA26__ESDHC1_DAT0 0x31ef
254 VF610_PAD_PTA27__ESDHC1_DAT1 0x31ef
255 VF610_PAD_PTA28__ESDHC1_DATA2 0x31ef
256 VF610_PAD_PTA29__ESDHC1_DAT3 0x31ef
260 pinctrl_fec1: fec1grp {
262 VF610_PAD_PTA6__RMII_CLKIN 0x30d1
263 VF610_PAD_PTC9__ENET_RMII1_MDC 0x30fe
264 VF610_PAD_PTC10__ENET_RMII1_MDIO 0x30d3
265 VF610_PAD_PTC11__ENET_RMII1_CRS 0x30d1
266 VF610_PAD_PTC12__ENET_RMII1_RXD1 0x30d1
267 VF610_PAD_PTC13__ENET_RMII1_RXD0 0x30d1
268 VF610_PAD_PTC14__ENET_RMII1_RXER 0x30d1
269 VF610_PAD_PTC15__ENET_RMII1_TXD1 0x30d2
270 VF610_PAD_PTC16__ENET_RMII1_TXD0 0x30d2
271 VF610_PAD_PTC17__ENET_RMII1_TXEN 0x30d2
275 pinctrl_i2c0: i2c0grp {
277 VF610_PAD_PTB14__I2C0_SCL 0x37ff
278 VF610_PAD_PTB15__I2C0_SDA 0x37ff
282 pinctrl_leds_debug: pinctrl-leds-debug {
284 VF610_PAD_PTD3__GPIO_82 0x31c2
285 VF610_PAD_PTE3__GPIO_108 0x31c2
286 VF610_PAD_PTE4__GPIO_109 0x31c2
287 VF610_PAD_PTE5__GPIO_110 0x31c2
288 VF610_PAD_PTE6__GPIO_111 0x31c2
292 pinctrl_switch: switch-grp {
294 VF610_PAD_PTB28__GPIO_98 0x3061
295 VF610_PAD_PTE2__GPIO_107 0x1042
299 pinctrl_uart0: uart0grp {
301 VF610_PAD_PTB10__UART0_TX 0x21a2
302 VF610_PAD_PTB11__UART0_RX 0x21a1