1 // SPDX-License-Identifier: GPL-2.0
3 * ARM Ltd. Versatile Express
5 * Motherboard Express uATX
10 * RS1 memory map ("ARM Cortex-A Series memory map" in the board's
11 * Technical Reference Manual)
13 * WARNING! The hardware described in this file is independent from the
14 * original variant (vexpress-v2m.dtsi), but there is a strong
15 * correspondence between the two configurations.
17 * TAKE CARE WHEN MAINTAINING THIS FILE TO PROPAGATE ANY RELEVANT
18 * CHANGES TO vexpress-v2m.dtsi!
20 #include <dt-bindings/interrupt-controller/arm-gic.h>
23 v2m_fixed_3v3: fixed-regulator-0 {
24 compatible = "regulator-fixed";
25 regulator-name = "3V3";
26 regulator-min-microvolt = <3300000>;
27 regulator-max-microvolt = <3300000>;
31 v2m_clk24mhz: clk24mhz {
32 compatible = "fixed-clock";
34 clock-frequency = <24000000>;
35 clock-output-names = "v2m:clk24mhz";
38 v2m_refclk1mhz: refclk1mhz {
39 compatible = "fixed-clock";
41 clock-frequency = <1000000>;
42 clock-output-names = "v2m:refclk1mhz";
45 v2m_refclk32khz: refclk32khz {
46 compatible = "fixed-clock";
48 clock-frequency = <32768>;
49 clock-output-names = "v2m:refclk32khz";
53 compatible = "gpio-leds";
56 label = "v2m:green:user1";
57 gpios = <&v2m_led_gpios 0 0>;
58 linux,default-trigger = "heartbeat";
62 label = "v2m:green:user2";
63 gpios = <&v2m_led_gpios 1 0>;
64 linux,default-trigger = "disk-activity";
68 label = "v2m:green:user3";
69 gpios = <&v2m_led_gpios 2 0>;
70 linux,default-trigger = "cpu0";
74 label = "v2m:green:user4";
75 gpios = <&v2m_led_gpios 3 0>;
76 linux,default-trigger = "cpu1";
80 label = "v2m:green:user5";
81 gpios = <&v2m_led_gpios 4 0>;
82 linux,default-trigger = "cpu2";
86 label = "v2m:green:user6";
87 gpios = <&v2m_led_gpios 5 0>;
88 linux,default-trigger = "cpu3";
92 label = "v2m:green:user7";
93 gpios = <&v2m_led_gpios 6 0>;
94 linux,default-trigger = "cpu4";
98 label = "v2m:green:user8";
99 gpios = <&v2m_led_gpios 7 0>;
100 linux,default-trigger = "cpu5";
105 compatible = "simple-bus";
106 #address-cells = <1>;
109 #interrupt-cells = <1>;
110 interrupt-map-mask = <0 63>;
111 interrupt-map = <0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
112 <0 1 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
113 <0 2 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
114 <0 3 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
115 <0 4 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
116 <0 5 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
117 <0 6 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
118 <0 7 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
119 <0 8 &gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
120 <0 9 &gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
121 <0 10 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
122 <0 11 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
123 <0 12 &gic GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
124 <0 13 &gic GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
125 <0 14 &gic GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
126 <0 15 &gic GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
127 <0 16 &gic GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
128 <0 17 &gic GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
129 <0 18 &gic GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
130 <0 19 &gic GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
131 <0 20 &gic GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
132 <0 21 &gic GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
133 <0 22 &gic GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
134 <0 23 &gic GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
135 <0 24 &gic GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
136 <0 25 &gic GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
137 <0 26 &gic GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
138 <0 27 &gic GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
139 <0 28 &gic GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
140 <0 29 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
141 <0 30 &gic GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
142 <0 31 &gic GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
143 <0 32 &gic GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
144 <0 33 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
145 <0 34 &gic GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
146 <0 35 &gic GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
147 <0 36 &gic GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
148 <0 37 &gic GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
149 <0 38 &gic GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
150 <0 39 &gic GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
151 <0 40 &gic GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
152 <0 41 &gic GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
153 <0 42 &gic GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
155 motherboard-bus@8000000 {
157 arm,vexpress,site = <0>;
158 compatible = "arm,vexpress,v2m-p1", "simple-bus";
159 #address-cells = <2>; /* SMB chipselect number and offset */
161 ranges = <0 0 0x08000000 0x04000000>,
162 <1 0 0x14000000 0x04000000>,
163 <2 0 0x18000000 0x04000000>,
164 <3 0 0x1c000000 0x04000000>,
165 <4 0 0x0c000000 0x04000000>,
166 <5 0 0x10000000 0x04000000>;
169 compatible = "arm,vexpress-flash", "cfi-flash";
170 reg = <0 0x00000000 0x04000000>,
171 <4 0x00000000 0x04000000>;
174 compatible = "arm,arm-firmware-suite";
179 compatible = "arm,vexpress-psram", "mtd-ram";
180 reg = <1 0x00000000 0x02000000>;
185 compatible = "smsc,lan9118", "smsc,lan9115";
186 reg = <2 0x02000000 0x10000>;
190 smsc,irq-active-high;
192 vdd33a-supply = <&v2m_fixed_3v3>;
193 vddvario-supply = <&v2m_fixed_3v3>;
197 compatible = "nxp,usb-isp1761";
198 reg = <2 0x03000000 0x20000>;
200 dr_mode = "peripheral";
203 iofpga-bus@300000000 {
204 compatible = "simple-bus";
205 #address-cells = <1>;
207 ranges = <0 3 0 0x200000>;
209 v2m_sysreg: sysreg@10000 {
210 compatible = "arm,vexpress-sysreg";
211 reg = <0x010000 0x1000>;
212 #address-cells = <1>;
214 ranges = <0 0x10000 0x1000>;
216 v2m_led_gpios: gpio@8 {
217 compatible = "arm,vexpress-sysreg,sys_led";
223 v2m_mmc_gpios: gpio@48 {
224 compatible = "arm,vexpress-sysreg,sys_mci";
230 v2m_flash_gpios: gpio@4c {
231 compatible = "arm,vexpress-sysreg,sys_flash";
238 v2m_sysctl: sysctl@20000 {
239 compatible = "arm,sp810", "arm,primecell";
240 reg = <0x020000 0x1000>;
241 clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&smbclk>;
242 clock-names = "refclk", "timclk", "apb_pclk";
244 clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3";
245 assigned-clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&v2m_sysctl 3>, <&v2m_sysctl 3>;
246 assigned-clock-parents = <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>;
250 v2m_i2c_pcie: i2c@30000 {
251 compatible = "arm,versatile-i2c";
252 reg = <0x030000 0x1000>;
254 #address-cells = <1>;
258 compatible = "idt,89hpes32h8";
264 compatible = "arm,pl041", "arm,primecell";
265 reg = <0x040000 0x1000>;
268 clock-names = "apb_pclk";
272 compatible = "arm,pl180", "arm,primecell";
273 reg = <0x050000 0x1000>;
274 interrupts = <9>, <10>;
275 cd-gpios = <&v2m_mmc_gpios 0 0>;
276 wp-gpios = <&v2m_mmc_gpios 1 0>;
277 max-frequency = <12000000>;
278 vmmc-supply = <&v2m_fixed_3v3>;
279 clocks = <&v2m_clk24mhz>, <&smbclk>;
280 clock-names = "mclk", "apb_pclk";
284 compatible = "arm,pl050", "arm,primecell";
285 reg = <0x060000 0x1000>;
287 clocks = <&v2m_clk24mhz>, <&smbclk>;
288 clock-names = "KMIREFCLK", "apb_pclk";
292 compatible = "arm,pl050", "arm,primecell";
293 reg = <0x070000 0x1000>;
295 clocks = <&v2m_clk24mhz>, <&smbclk>;
296 clock-names = "KMIREFCLK", "apb_pclk";
299 v2m_serial0: serial@90000 {
300 compatible = "arm,pl011", "arm,primecell";
301 reg = <0x090000 0x1000>;
303 clocks = <&v2m_oscclk2>, <&smbclk>;
304 clock-names = "uartclk", "apb_pclk";
307 v2m_serial1: serial@a0000 {
308 compatible = "arm,pl011", "arm,primecell";
309 reg = <0x0a0000 0x1000>;
311 clocks = <&v2m_oscclk2>, <&smbclk>;
312 clock-names = "uartclk", "apb_pclk";
315 v2m_serial2: serial@b0000 {
316 compatible = "arm,pl011", "arm,primecell";
317 reg = <0x0b0000 0x1000>;
319 clocks = <&v2m_oscclk2>, <&smbclk>;
320 clock-names = "uartclk", "apb_pclk";
323 v2m_serial3: serial@c0000 {
324 compatible = "arm,pl011", "arm,primecell";
325 reg = <0x0c0000 0x1000>;
327 clocks = <&v2m_oscclk2>, <&smbclk>;
328 clock-names = "uartclk", "apb_pclk";
332 compatible = "arm,sp805", "arm,primecell";
333 reg = <0x0f0000 0x1000>;
335 clocks = <&v2m_refclk32khz>, <&smbclk>;
336 clock-names = "wdog_clk", "apb_pclk";
339 v2m_timer01: timer@110000 {
340 compatible = "arm,sp804", "arm,primecell";
341 reg = <0x110000 0x1000>;
343 clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&smbclk>;
344 clock-names = "timclken1", "timclken2", "apb_pclk";
347 v2m_timer23: timer@120000 {
348 compatible = "arm,sp804", "arm,primecell";
349 reg = <0x120000 0x1000>;
351 clocks = <&v2m_sysctl 2>, <&v2m_sysctl 3>, <&smbclk>;
352 clock-names = "timclken1", "timclken2", "apb_pclk";
356 v2m_i2c_dvi: i2c@160000 {
357 compatible = "arm,versatile-i2c";
358 reg = <0x160000 0x1000>;
359 #address-cells = <1>;
363 compatible = "sil,sii9022-tpi", "sil,sii9022";
367 #address-cells = <1>;
372 dvi_bridge_in: endpoint {
373 remote-endpoint = <&clcd_pads>;
380 compatible = "sil,sii9022-cpi", "sil,sii9022";
386 compatible = "arm,pl031", "arm,primecell";
387 reg = <0x170000 0x1000>;
390 clock-names = "apb_pclk";
393 compact-flash@1a0000 {
394 compatible = "arm,vexpress-cf", "ata-generic";
395 reg = <0x1a0000 0x100
401 compatible = "arm,pl111", "arm,primecell";
402 reg = <0x1f0000 0x1000>;
403 interrupt-names = "combined";
405 clocks = <&v2m_oscclk1>, <&smbclk>;
406 clock-names = "clcdclk", "apb_pclk";
407 /* 800x600 16bpp @36MHz works fine */
408 max-memory-bandwidth = <54000000>;
409 memory-region = <&vram>;
412 clcd_pads: endpoint {
413 remote-endpoint = <&dvi_bridge_in>;
414 arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
420 compatible = "arm,vexpress,config-bus";
421 arm,vexpress,config-bridge = <&v2m_sysreg>;
424 /* MCC static memory clock */
425 compatible = "arm,vexpress-osc";
426 arm,vexpress-sysreg,func = <1 0>;
427 freq-range = <25000000 60000000>;
429 clock-output-names = "v2m:oscclk0";
432 v2m_oscclk1: oscclk1 {
434 compatible = "arm,vexpress-osc";
435 arm,vexpress-sysreg,func = <1 1>;
436 freq-range = <23750000 65000000>;
438 clock-output-names = "v2m:oscclk1";
441 v2m_oscclk2: oscclk2 {
442 /* IO FPGA peripheral clock */
443 compatible = "arm,vexpress-osc";
444 arm,vexpress-sysreg,func = <1 2>;
445 freq-range = <24000000 24000000>;
447 clock-output-names = "v2m:oscclk2";
451 /* Logic level voltage */
452 compatible = "arm,vexpress-volt";
453 arm,vexpress-sysreg,func = <2 0>;
454 regulator-name = "VIO";
460 /* MCC internal operating temperature */
461 compatible = "arm,vexpress-temp";
462 arm,vexpress-sysreg,func = <4 0>;
467 compatible = "arm,vexpress-reset";
468 arm,vexpress-sysreg,func = <5 0>;
472 compatible = "arm,vexpress-muxfpga";
473 arm,vexpress-sysreg,func = <7 0>;
477 compatible = "arm,vexpress-shutdown";
478 arm,vexpress-sysreg,func = <8 0>;
482 compatible = "arm,vexpress-reboot";
483 arm,vexpress-sysreg,func = <9 0>;
487 compatible = "arm,vexpress-dvimode";
488 arm,vexpress-sysreg,func = <11 0>;